int
imxuartclose(dev_t dev, int flag, int mode, struct proc *p)
{
int unit = DEVUNIT(dev);
struct imxuart_softc *sc = imxuart_cd.cd_devs[unit];
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct tty *tp = sc->sc_tty;
int s;
/* XXX This is for cons.c. */
if (!ISSET(tp->t_state, TS_ISOPEN))
return 0;
(*linesw[tp->t_line].l_close)(tp, flag, p);
s = spltty();
if (ISSET(tp->t_state, TS_WOPEN)) {
/* tty device is waiting for carrier; drop dtr then re-raise */
CLR(sc->sc_ucr3, IMXUART_CR3_DSR);
bus_space_write_2(iot, ioh, IMXUART_UCR3, sc->sc_ucr3);
timeout_add(&sc->sc_dtr_tmo, hz * 2);
} else {
/* no one else waiting; turn off the uart */
imxuart_pwroff(sc);
}
CLR(tp->t_state, TS_BUSY | TS_FLUSH);
sc->sc_cua = 0;
splx(s);
ttyclose(tp);
return 0;
}
struct imxuart_softc *
imxuart_sc(dev_t dev)
{
int unit;
struct imxuart_softc *sc;
unit = DEVUNIT(dev);
if (unit >= imxuart_cd.cd_ndevs)
return NULL;
sc = (struct imxuart_softc *)imxuart_cd.cd_devs[unit];
return sc;
}
void
imxuart_start(struct tty *tp)
{
struct imxuart_softc *sc = imxuart_cd.cd_devs[DEVUNIT(tp->t_dev)];
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int s;
s = spltty();
if (ISSET(tp->t_state, TS_BUSY)) {
splx(s);
return;
}
if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP))
goto stopped;
#ifdef DAMNFUCKSHIT
/* clear to send (IE the RTS pin on this shit) is not directly \
* readable - skip check for now
*/
if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, IMXUART_CTS))
goto stopped;
#endif
if (tp->t_outq.c_cc <= tp->t_lowat) {
if (ISSET(tp->t_state, TS_ASLEEP)) {
CLR(tp->t_state, TS_ASLEEP);
wakeup(&tp->t_outq);
}
if (tp->t_outq.c_cc == 0)
goto stopped;
selwakeup(&tp->t_wsel);
}
SET(tp->t_state, TS_BUSY);
if (!ISSET(sc->sc_ucr1, IMXUART_CR1_TXMPTYEN)) {
SET(sc->sc_ucr1, IMXUART_CR1_TXMPTYEN);
bus_space_write_2(iot, ioh, IMXUART_UCR1, sc->sc_ucr1);
}
{
u_char buf[32];
int n = q_to_b(&tp->t_outq, buf, 32/*XXX*/);
int i;
for (i = 0; i < n; i++)
bus_space_write_1(iot, ioh, IMXUART_UTXD, buf[i]);
}
splx(s);
return;
stopped:
if (ISSET(sc->sc_ucr1, IMXUART_CR1_TXMPTYEN)) {
CLR(sc->sc_ucr1, IMXUART_CR1_TXMPTYEN);
bus_space_write_2(iot, ioh, IMXUART_UCR1, sc->sc_ucr1);
}
splx(s);
}
struct tty *
imxuarttty(dev_t dev)
{
int unit;
struct imxuart_softc *sc;
unit = DEVUNIT(dev);
if (unit >= imxuart_cd.cd_ndevs)
return NULL;
sc = (struct imxuart_softc *)imxuart_cd.cd_devs[unit];
if (sc == NULL)
return NULL;
return sc->sc_tty;
}
int
comclose(dev_t dev, int flag, int mode, struct proc *p)
{
int unit = DEVUNIT(dev);
struct com_softc *sc = com_cd.cd_devs[unit];
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct tty *tp = sc->sc_tty;
int s;
#ifdef COM_CONSOLE
/* XXX This is for cons.c. */
if (!ISSET(tp->t_state, TS_ISOPEN))
return 0;
#endif
if(sc->sc_swflags & COM_SW_DEAD)
return 0;
(*linesw[tp->t_line].l_close)(tp, flag, p);
s = spltty();
if (ISSET(tp->t_state, TS_WOPEN)) {
/* tty device is waiting for carrier; drop dtr then re-raise */
CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
timeout_add_sec(&sc->sc_dtr_tmo, 2);
} else {
/* no one else waiting; turn off the uart */
compwroff(sc);
}
CLR(tp->t_state, TS_BUSY | TS_FLUSH);
sc->sc_cua = 0;
splx(s);
ttyclose(tp);
#ifdef COM_CONSOLE
#ifdef notyet /* XXXX */
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
ttyfree(tp);
sc->sc_tty = 0;
}
#endif
#endif
return 0;
}
int
sxiuart_param(struct tty *tp, struct termios *t)
{
struct sxiuart_softc *sc = sxiuart_cd.cd_devs[DEVUNIT(tp->t_dev)];
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int ospeed = t->c_ospeed;
int error;
tcflag_t oldcflag;
uint16_t ratediv;
uint8_t lcr;
if (t->c_ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
return (EINVAL);
/* XXX get prev state of SXIUART_LCR_SBREAK bit */
switch (ISSET(t->c_cflag, CSIZE)) {
case CS5:
SET(lcr, LCR_5BITS);
break;
case CS6:
SET(lcr, LCR_6BITS);
break;
case CS7:
SET(lcr, LCR_7BITS);
break;
case CS8:
SET(lcr, LCR_8BITS);
break;
}
if (ISSET(t->c_cflag, PARENB)) {
SET(lcr, LCR_PENAB);
if (!ISSET(t->c_cflag, PARODD))
SET(lcr, LCR_PEVEN);
}
if (ISSET(t->c_cflag, CSTOPB))
SET(lcr, LCR_STOPB);
sc->sc_lcr = lcr;
if (ospeed == 0) {
CLR(sc->sc_mcr, MCR_DTR);
bus_space_write_1(iot, ioh, SXIUART_MCR, sc->sc_mcr);
}
if (ospeed != 0) { /* XXX sc_initialize? */
while (ISSET(tp->t_state, TS_BUSY)) {
++sc->sc_halt;
error = ttysleep(tp, &tp->t_outq,
TTOPRI | PCATCH, "sxiuartprm", 0);
--sc->sc_halt;
if (error) {
sxiuart_start(tp);
return (error);
}
}
bus_space_write_1(iot, ioh, SXIUART_LCR, lcr | LCR_DLAB);
ratediv = 13;
bus_space_write_1(iot, ioh, SXIUART_DLL, ratediv);
bus_space_write_1(iot, ioh, SXIUART_DLH, ratediv >> 8);
bus_space_write_1(iot, ioh, SXIUART_LCR, lcr);
SET(sc->sc_mcr, MCR_DTR);
bus_space_write_1(iot, ioh, SXIUART_MCR, sc->sc_mcr);
} else
int
imxuartopen(dev_t dev, int flag, int mode, struct proc *p)
{
int unit = DEVUNIT(dev);
struct imxuart_softc *sc;
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct tty *tp;
int s;
int error = 0;
if (unit >= imxuart_cd.cd_ndevs)
return ENXIO;
sc = imxuart_cd.cd_devs[unit];
if (sc == NULL)
return ENXIO;
s = spltty();
if (sc->sc_tty == NULL)
tp = sc->sc_tty = ttymalloc(0);
else
tp = sc->sc_tty;
splx(s);
tp->t_oproc = imxuart_start;
tp->t_param = imxuart_param;
tp->t_dev = dev;
if (!ISSET(tp->t_state, TS_ISOPEN)) {
SET(tp->t_state, TS_WOPEN);
ttychars(tp);
tp->t_iflag = TTYDEF_IFLAG;
tp->t_oflag = TTYDEF_OFLAG;
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
tp->t_cflag = imxuartconscflag;
else
tp->t_cflag = TTYDEF_CFLAG;
if (ISSET(sc->sc_swflags, COM_SW_CLOCAL))
SET(tp->t_cflag, CLOCAL);
if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS))
SET(tp->t_cflag, CRTSCTS);
if (ISSET(sc->sc_swflags, COM_SW_MDMBUF))
SET(tp->t_cflag, MDMBUF);
tp->t_lflag = TTYDEF_LFLAG;
tp->t_ispeed = tp->t_ospeed = imxuartdefaultrate;
s = spltty();
sc->sc_initialize = 1;
imxuart_param(tp, &tp->t_termios);
ttsetwater(tp);
sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0];
sc->sc_ibufhigh = sc->sc_ibuf + IMXUART_IHIGHWATER;
sc->sc_ibufend = sc->sc_ibuf + IMXUART_IBUFSIZE;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
sc->sc_ucr1 = bus_space_read_2(iot, ioh, IMXUART_UCR1);
sc->sc_ucr2 = bus_space_read_2(iot, ioh, IMXUART_UCR2);
sc->sc_ucr3 = bus_space_read_2(iot, ioh, IMXUART_UCR3);
sc->sc_ucr4 = bus_space_read_2(iot, ioh, IMXUART_UCR4);
/* interrupt after one char on tx/rx */
/* reference frequency divider: 1 */
bus_space_write_2(iot, ioh, IMXUART_UFCR,
1 << IMXUART_FCR_TXTL_SH |
5 << IMXUART_FCR_RFDIV_SH |
1 << IMXUART_FCR_RXTL_SH);
bus_space_write_2(iot, ioh, IMXUART_UBIR,
(imxuartdefaultrate / 100) - 1);
/* formula: clk / (rfdiv * 1600) */
bus_space_write_2(iot, ioh, IMXUART_UBMR,
(imxccm_get_uartclk() * 1000) / 1600);
SET(sc->sc_ucr1, IMXUART_CR1_EN|IMXUART_CR1_RRDYEN);
SET(sc->sc_ucr2, IMXUART_CR2_TXEN|IMXUART_CR2_RXEN);
bus_space_write_2(iot, ioh, IMXUART_UCR1, sc->sc_ucr1);
bus_space_write_2(iot, ioh, IMXUART_UCR2, sc->sc_ucr2);
/* sc->sc_mcr = MCR_DTR | MCR_RTS; XXX */
SET(sc->sc_ucr3, IMXUART_CR3_DSR); /* XXX */
bus_space_write_2(iot, ioh, IMXUART_UCR3, sc->sc_ucr3);
SET(tp->t_state, TS_CARR_ON); /* XXX */
} else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0)
return EBUSY;
else
s = spltty();
if (DEVCUA(dev)) {
if (ISSET(tp->t_state, TS_ISOPEN)) {
splx(s);
return EBUSY;
}
sc->sc_cua = 1;
} else {
/* tty (not cua) device; wait for carrier if necessary */
if (ISSET(flag, O_NONBLOCK)) {
if (sc->sc_cua) {
/* Opening TTY non-blocking... but the CUA is busy */
splx(s);
return EBUSY;
}
} else {
while (sc->sc_cua ||
(!ISSET(tp->t_cflag, CLOCAL) &&
!ISSET(tp->t_state, TS_CARR_ON))) {
SET(tp->t_state, TS_WOPEN);
error = ttysleep(tp, &tp->t_rawq,
TTIPRI | PCATCH, ttopen, 0);
/*
* If TS_WOPEN has been reset, that means the
* cua device has been closed. We don't want
* to fail in that case,
* so just go around again.
*/
if (error && ISSET(tp->t_state, TS_WOPEN)) {
CLR(tp->t_state, TS_WOPEN);
if (!sc->sc_cua && !ISSET(tp->t_state,
TS_ISOPEN))
imxuart_pwroff(sc);
splx(s);
return error;
}
}
}
}
splx(s);
return (*linesw[tp->t_line].l_open)(dev,tp,p);
}
int
imxuart_param(struct tty *tp, struct termios *t)
{
struct imxuart_softc *sc = imxuart_cd.cd_devs[DEVUNIT(tp->t_dev)];
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int ospeed = t->c_ospeed;
int error;
tcflag_t oldcflag;
if (t->c_ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
return EINVAL;
switch (ISSET(t->c_cflag, CSIZE)) {
case CS5:
return EINVAL;
case CS6:
return EINVAL;
case CS7:
CLR(sc->sc_ucr2, IMXUART_CR2_WS);
break;
case CS8:
SET(sc->sc_ucr2, IMXUART_CR2_WS);
break;
}
// bus_space_write_2(iot, ioh, IMXUART_UCR2, sc->sc_ucr2);
if (ISSET(t->c_cflag, PARENB)) {
SET(sc->sc_ucr2, IMXUART_CR2_PREN);
bus_space_write_2(iot, ioh, IMXUART_UCR2, sc->sc_ucr2);
}
/* STOPB - XXX */
if (ospeed == 0) {
/* lower dtr */
}
if (ospeed != 0) {
while (ISSET(tp->t_state, TS_BUSY)) {
++sc->sc_halt;
error = ttysleep(tp, &tp->t_outq,
TTOPRI | PCATCH, "imxuartprm", 0);
--sc->sc_halt;
if (error) {
imxuart_start(tp);
return (error);
}
}
/* set speed */
}
/* setup fifo */
/* When not using CRTSCTS, RTS follows DTR. */
/* sc->sc_dtr = MCR_DTR; */
/* and copy to tty */
tp->t_ispeed = t->c_ispeed;
tp->t_ospeed = t->c_ospeed;
oldcflag = tp->t_cflag;
tp->t_cflag = t->c_cflag;
/*
* If DCD is off and MDMBUF is changed, ask the tty layer if we should
* stop the device.
*/
/* XXX */
imxuart_start(tp);
return 0;
}
int
com_activate(struct device *self, int act)
{
struct com_softc *sc = (struct com_softc *)self;
int s, rv = 0;
switch (act) {
case DVACT_SUSPEND:
if (timeout_del(&sc->sc_dtr_tmo)) {
/* Make sure DTR gets raised upon resume. */
SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
}
timeout_del(&sc->sc_diag_tmo);
break;
case DVACT_RESUME:
com_resume(sc);
break;
case DVACT_DEACTIVATE:
#ifdef KGDB
if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) {
#else
if (sc->sc_hwflags & COM_HW_CONSOLE) {
#endif /* KGDB */
rv = EBUSY;
break;
}
s = spltty();
if (sc->disable != NULL && sc->enabled != 0) {
(*sc->disable)(sc);
sc->enabled = 0;
}
splx(s);
break;
}
return (rv);
}
int
comopen(dev_t dev, int flag, int mode, struct proc *p)
{
int unit = DEVUNIT(dev);
struct com_softc *sc;
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct tty *tp;
int s;
int error = 0;
if (unit >= com_cd.cd_ndevs)
return ENXIO;
sc = com_cd.cd_devs[unit];
if (!sc)
return ENXIO;
#ifdef KGDB
/*
* If this is the kgdb port, no other use is permitted.
*/
if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
return (EBUSY);
#endif /* KGDB */
s = spltty();
if (!sc->sc_tty) {
tp = sc->sc_tty = ttymalloc(1000000);
} else
tp = sc->sc_tty;
splx(s);
tp->t_oproc = comstart;
tp->t_param = comparam;
tp->t_dev = dev;
if (!ISSET(tp->t_state, TS_ISOPEN)) {
SET(tp->t_state, TS_WOPEN);
ttychars(tp);
tp->t_iflag = TTYDEF_IFLAG;
tp->t_oflag = TTYDEF_OFLAG;
#ifdef COM_CONSOLE
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
tp->t_cflag = comconscflag;
tp->t_ispeed = tp->t_ospeed = comconsrate;
} else
#endif
{
tp->t_cflag = TTYDEF_CFLAG;
tp->t_ispeed = tp->t_ospeed = comdefaultrate;
}
if (ISSET(sc->sc_swflags, COM_SW_CLOCAL))
SET(tp->t_cflag, CLOCAL);
if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS))
SET(tp->t_cflag, CRTSCTS);
if (ISSET(sc->sc_swflags, COM_SW_MDMBUF))
SET(tp->t_cflag, MDMBUF);
tp->t_lflag = TTYDEF_LFLAG;
s = spltty();
sc->sc_initialize = 1;
comparam(tp, &tp->t_termios);
ttsetwater(tp);
sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0];
sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
/*
* Wake up the sleepy heads.
*/
if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
switch (sc->sc_uarttype) {
case COM_UART_ST16650:
case COM_UART_ST16650V2:
bus_space_write_1(iot, ioh, com_lcr, LCR_EFR);
bus_space_write_1(iot, ioh, com_efr, EFR_ECB);
bus_space_write_1(iot, ioh, com_ier, 0);
bus_space_write_1(iot, ioh, com_efr, 0);
bus_space_write_1(iot, ioh, com_lcr, 0);
break;
case COM_UART_TI16750:
bus_space_write_1(iot, ioh, com_ier, 0);
break;
case COM_UART_PXA2X0:
bus_space_write_1(iot, ioh, com_ier, IER_EUART);
break;
}
}
if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
u_int8_t fifo = FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST;
u_int8_t lcr;
if (tp->t_ispeed <= 1200)
fifo |= FIFO_TRIGGER_1;
else if (tp->t_ispeed <= 38400)
fifo |= FIFO_TRIGGER_4;
else
fifo |= FIFO_TRIGGER_8;
if (sc->sc_uarttype == COM_UART_TI16750) {
fifo |= FIFO_ENABLE_64BYTE;
lcr = bus_space_read_1(iot, ioh, com_lcr);
bus_space_write_1(iot, ioh, com_lcr,
lcr | LCR_DLAB);
}
/*
* (Re)enable and drain FIFOs.
*
* Certain SMC chips cause problems if the FIFOs are
* enabled while input is ready. Turn off the FIFO
* if necessary to clear the input. Test the input
* ready bit after enabling the FIFOs to handle races
* between enabling and fresh input.
*
* Set the FIFO threshold based on the receive speed.
*/
for (;;) {
bus_space_write_1(iot, ioh, com_fifo, 0);
delay(100);
(void) bus_space_read_1(iot, ioh, com_data);
bus_space_write_1(iot, ioh, com_fifo, fifo |
FIFO_RCV_RST | FIFO_XMT_RST);
delay(100);
if(!ISSET(bus_space_read_1(iot, ioh,
com_lsr), LSR_RXRDY))
break;
}
if (sc->sc_uarttype == COM_UART_TI16750)
bus_space_write_1(iot, ioh, com_lcr, lcr);
}
/* Flush any pending I/O. */
while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
(void) bus_space_read_1(iot, ioh, com_data);
/* You turn me on, baby! */
sc->sc_mcr = MCR_DTR | MCR_RTS;
if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
SET(sc->sc_mcr, MCR_IENABLE);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
#ifdef COM_PXA2X0
if (sc->sc_uarttype == COM_UART_PXA2X0)
sc->sc_ier |= IER_EUART | IER_ERXTOUT;
#endif
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc->sc_msr = bus_space_read_1(iot, ioh, com_msr);
if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || DEVCUA(dev) ||
ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
SET(tp->t_state, TS_CARR_ON);
else
CLR(tp->t_state, TS_CARR_ON);
#ifdef COM_PXA2X0
if (sc->sc_uarttype == COM_UART_PXA2X0 &&
ISSET(sc->sc_hwflags, COM_HW_SIR)) {
bus_space_write_1(iot, ioh, com_isr, ISR_RECV);
#ifdef __zaurus__
scoop_set_irled(1);
#endif
}
#endif
} else if (ISSET(tp->t_state, TS_XCLUDE) && suser(p, 0) != 0)
return EBUSY;
else
s = spltty();
if (DEVCUA(dev)) {
if (ISSET(tp->t_state, TS_ISOPEN)) {
/* Ah, but someone already is dialed in... */
splx(s);
return EBUSY;
}
sc->sc_cua = 1; /* We go into CUA mode. */
} else {
/* tty (not cua) device; wait for carrier if necessary. */
if (ISSET(flag, O_NONBLOCK)) {
if (sc->sc_cua) {
/* Opening TTY non-blocking... but the CUA is busy. */
splx(s);
return EBUSY;
}
} else {
while (sc->sc_cua ||
(!ISSET(tp->t_cflag, CLOCAL) &&
!ISSET(tp->t_state, TS_CARR_ON))) {
SET(tp->t_state, TS_WOPEN);
error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, ttopen, 0);
/*
* If TS_WOPEN has been reset, that means the cua device
* has been closed. We don't want to fail in that case,
* so just go around again.
*/
if (error && ISSET(tp->t_state, TS_WOPEN)) {
CLR(tp->t_state, TS_WOPEN);
if (!sc->sc_cua && !ISSET(tp->t_state, TS_ISOPEN))
compwroff(sc);
splx(s);
return error;
}
}
}
}
splx(s);
return (*linesw[tp->t_line].l_open)(dev, tp, p);
}
