Beispiel #1
0
void resetMemory2_ARM9() 
{
 	register int i;
 
	//clear out ARM9 DMA channels
	for (i=0; i<4; i++) {
		DMA_CR(i) = 0;
		DMA_SRC(i) = 0;
		DMA_DEST(i) = 0;
		TIMER_CR(i) = 0;
		TIMER_DATA(i) = 0;
	}
 
	VRAM_CR = 0x80808080;
	VRAM_E_CR = 0x80;
	VRAM_F_CR = 0x80;
	VRAM_G_CR = 0x80;
	VRAM_H_CR = 0x80;
	VRAM_I_CR = 0x80;
	
	// clear vram
	u16 * vram = 0x6800000;
	zeroMemory(vram, 656 * 1024 );
	// clear video palette
	zeroMemory( BG_PALETTE, 2048 );//BG_PALETTE[0] = RGB15(1,1,1);
	zeroMemory( BG_PALETTE_SUB, 2048 );
	// clear video object attribution memory
	zeroMemory( OAM, 2048 );
	zeroMemory( OAM_SUB, 2048 );
	// clear video object data memory
	zeroMemory( SPRITE_GFX, 128 * 1024 );
	zeroMemory( SPRITE_GFX_SUB, 128 * 1024 );
	// clear main display registers
	zeroMemory( (void*)0x04000000, 0x6c );
	// clear sub display registers
	zeroMemory( (void*)0x04001000, 0x6c );
	
	// clear maths registers
	zeroMemory( (void*)0x04000280, 0x40 );
 
	REG_DISPSTAT = 0;
	videoSetMode(0);
	videoSetModeSub(0);
	VRAM_A_CR = 0;
	VRAM_B_CR = 0;
	VRAM_C_CR = 0;
	VRAM_D_CR = 0;
	VRAM_E_CR = 0;
	VRAM_F_CR = 0;
	VRAM_G_CR = 0;
	VRAM_H_CR = 0;
	VRAM_I_CR = 0;
	VRAM_CR   = 0x03000000;
	REG_POWERCNT  = 0x820F;
 
	//set shared ram to ARM7
	WRAM_CR = 0x03;
 
}
Beispiel #2
0
void __attribute__ ((long_call)) resetArm9()
{
	int i, reg;
	
	for(i=0; i<4; i++)
	{
		DMA_CR(i) = 0;//Reset DMA.
		DMA_SRC(i) = 0;
		DMA_DEST(i) = 0;
		TIMER_CR(i) = 0;//Reset timers.
		TIMER_DATA(i) = 0;
		if(DSi_mode)
		{
			for(reg=0; reg<0x1c; reg+=4)*((u32*)(0x04004104 + ((i*0x1c)+reg))) = 0;//Reset NDMA.
		}
	}

	VRAM_CR = (VRAM_CR & 0xffff0000) | 0x00008080;//This is from bootloader.
	
	//This DMA gfx reset code is from bootloader boot.c.
	dmaFillWords( 0, (void*)0x04000000, 0x56);  //clear main display registers
	dmaFillWords( 0, (void*)0x04001000, 0x56);  //clear sub  display registers

	REG_DISPSTAT = 0;
	REG_DISPCNT = 0;
	REG_DISPCNT_SUB = 0;

	for(i=0; i<7; i++)//Clear VRAM.
	{
		if(i==2)continue;
		((vu8*)0x04000240)[i] = 0x80;
	}
	VRAM_H_CR = 0x80;
	VRAM_I_CR = 0x80;
	memset16((void*)0x6800000, 0, 0xa4000);

	for(i=0; i<7; i++)//Reset VRAM.
	{
		if(i==2)continue;
		((vu8*)0x04000240)[i] = 0;
	}
	VRAM_H_CR = 0;
	VRAM_I_CR = 0;

	memset((void*)0x05000000, 0, 0x800);//Clear palettes.
	memset((void*)0x07000000, 0, 0x800);//Clear OAM.
	memset(SPRITE_GFX, 0, 128 * 1024);
        memset(SPRITE_GFX_SUB, 0, 128 * 1024);

	REG_POWERCNT = 0x820f;
	WRAM_CR = 0x03;
	REG_EXMEMCNT = 0xE880;
}
ITCM_CODE void resetARM9Memory(void)
{
  // DMA & TIMERS
  for(u32 ii=0;ii<4;++ii)
  {
    DMA_CR(ii)=0;
    DMA_SRC(ii)=0;
    DMA_DEST(ii)=0;
    DMA_FILL(ii)=0;
    TIMER_CR(ii)=0;
    TIMER_DATA(ii)=0;
  }

  while(REG_DISPSTAT&DISP_IN_VBLANK) ;
  while((REG_DISPSTAT&DISP_IN_VBLANK)==0) ; // wait for VBLANK to avoid screen picture break

  // VIDEO
  VRAM_CR=0x80808080;
  VRAM_E_CR=0x80;
  VRAM_F_CR=0x80;
  VRAM_G_CR=0x80;
  VRAM_H_CR=0x80;
  VRAM_I_CR=0x80;

  zeroMemoryITCM(BG_PALETTE,2048); //0x05000000
  zeroMemoryITCM(OAM,2048); //0x07000000
  zeroMemoryITCM((void*)0x04000000,0x60);
  zeroMemoryITCM((void*)0x04001000,0x60);
  zeroMemoryITCM(VRAM,656*1024); //0x06800000..0x068a3fff

  VRAM_CR=0x00000000;
  VRAM_E_CR=0;
  VRAM_F_CR=0;
  VRAM_G_CR=0;
  VRAM_H_CR=0;
  VRAM_I_CR=0;

  REG_POWERCNT=0x820f; // turn on all engines
  REG_EXMEMCNT=0xe880; // restore memory control

  // Interrupt
  REG_IE=0;
  REG_IF=~0;
  REG_IPC_SYNC=0;

#if defined(_STORAGE_ak2i)
  *(u32*)0x27ffc00=0x0fc2;
  *(u16*)0x27ffc10=0x5835;
#endif
}
Beispiel #4
0
//---------------------------------------------------------------------------------
// Reset the DS registers to sensible defaults
//---------------------------------------------------------------------------------
void __attribute__((weak)) initSystem(void) {
//---------------------------------------------------------------------------------
	register int i;
	// stop timers and dma
	for (i=0; i<4; i++) 
	{
		DMA_CR(i) = 0;
		DMA_SRC(i) = 0;
		DMA_DEST(i) = 0;
		TIMER_CR(i) = 0;
		TIMER_DATA(i) = 0;
	}


	// clear video display registers
	dmaFillWords(0, (void*)0x04000000, 0x56);
	dmaFillWords(0, (void*)0x04001008, 0x56);

	videoSetModeSub(0);

	vramDefault();

	VRAM_E_CR = 0;
	VRAM_F_CR = 0;
	VRAM_G_CR = 0;
	VRAM_H_CR = 0;
	VRAM_I_CR = 0;

	irqInit();
	fifoInit();

	fifoSetValue32Handler(FIFO_PM, powerValueHandler, 0);
	fifoSetDatamsgHandler(FIFO_SYSTEM, systemMsgHandler, 0);

	if(REG_DSIMODE) {
		fifoSendValue32(FIFO_PM,PM_DSI_HACK);
		__dsimode = true;
	}
	__transferRegion()->buttons = 0xffff;

	punixTime = (time_t*)memUncached((void *)&__transferRegion()->unixTime);

	__syscalls.exit = __libnds_exit;
	extern  char *fake_heap_end;
	__transferRegion()->bootcode = (struct __bootstub *)fake_heap_end;
	irqEnable(IRQ_VBLANK);

}
Beispiel #5
0
extern "C" void handle_ipc(u32 type)
{
//	if (arm7_initialised)
//	{
//		keepalive++;
//		if (keepalive > 96)
//		{
//			ARM7_PRINT("keepalive\n");
//			keepalive = 0;
//		}
//	}
	
	
	//if (quake_ipc_9to7->message == 0xffffffff)
	//{
//		ARM7_PRINTF("message type %d\n", quake_ipc_9to7->message_type);
		
		switch (type)
		{
			case kPrintMessage:
			{
				ARM7_PRINTF((char *)quake_ipc_9to7_buf);
				break;
			}
			case kStopAllSounds:
			{
				ARM7_PRINT("ARM7: Stopping sounds...");
				stopAllSounds();
				ARM7_PRINT("...done\n");
				
				break;
			}
			case kPlayMP3:
			{
				ARM7_PRINT("arm7 mp3 start msg\ntrack: ");
				memcpy((void *)track_name, (void *)quake_ipc_9to7_buf, 100);
				ARM7_PRINT((char *)track_name);
				ARM7_PRINT("\n");
				do_mp3 = 1;
				
				break;
			}
			case kStopMP3:
			{
				ARM7_PRINT("arm7 mp3 stop msg\n");
				do_mp3 = 0;
				
//				if (decoder_stopped)
//					send_mp3_stop_message();
				
				break;
			}
			
			//sound subsystem
			case kS_Init:
			{
				S_Init7(((unsigned int *)quake_ipc_9to7_buf)[0], ((unsigned int *)quake_ipc_9to7_buf)[1]);
				break;
			}
			case kS_AmbientOff:
			{
				S_AmbientOff7();
				break;
			}
			case kS_AmbientOn:
			{
				S_AmbientOn7();
				break;
			}
			case kS_Shutdown:
			{
				S_Shutdown7();
				break;
			}
			case kS_TouchSound:
			{
				S_TouchSound7((char *)quake_ipc_9to7_buf);
				break;
			}
			case kS_ClearBuffer:
			{
				S_ClearBuffer7();
				break;
			}
			case kS_StaticSound:
			{
				float *floats = (float *)quake_ipc_9to7_buf;
				S_StaticSound7((void *)*(unsigned int *)quake_ipc_9to7_buf,
					&floats[1],
					floats[4],
					floats[5]);
				break;
			}
			case kS_StartSound:
			{
				float *floats = (float *)quake_ipc_9to7_buf;
				S_StartSound7(((unsigned int *)quake_ipc_9to7_buf)[0], ((unsigned int *)quake_ipc_9to7_buf)[1],
					(void *)((unsigned int *)quake_ipc_9to7_buf)[2],
					&floats[3], //floats[6], floats[7],
					((unsigned int *)quake_ipc_9to7_buf)[8], ((unsigned int *)quake_ipc_9to7_buf)[9]);
				break;
			}
			case kS_StopSound:
			{
				S_StopSound7(((unsigned int *)quake_ipc_9to7_buf)[0], ((unsigned int *)quake_ipc_9to7_buf)[1]);
				break;
			}
			case kS_StopAllSounds:
			{
				S_StopAllSounds7(((unsigned int *)quake_ipc_9to7_buf)[0]);
				break;
			}
			case kS_ClearPrecache:
			{
				S_ClearPrecache7();
				break;
			}
			case kS_BeginPrecaching:
			{
				S_BeginPrecaching7();
				break;
			}
			case kS_EndPrecaching:
			{
				S_EndPrecaching7();
				break;
			}
			case kS_PrecacheSound:
			{
				void *pc = S_PrecacheSound7((char *)quake_ipc_9to7_buf);
				*(unsigned int *)quake_ipc_7to9_buf = (unsigned int)pc;
				break;
			}
			case kS_Update:
			{
//				float *floats = (float *)quake_ipc_9to7_buf;
//				S_Update7(&floats[0], &floats[3], &floats[6], &floats[9]);
				S_UpdateStatics((void *)((unsigned int *)quake_ipc_9to7_buf)[12], ((unsigned int *)quake_ipc_9to7_buf)[13]);
				break;
			}
			case kS_ExtraUpdate:
			{
				S_ExtraUpdate7();
				break;
			}
			case kS_LocalSound:
			{
				S_LocalSound7((char *)quake_ipc_9to7_buf);
				break;
			}
			case kFreeTime:
			case kRunningOut:
			case kGetReady:
			{
				//free_time = quake_ipc_9to7->message_type;
//				ARM7_PRINTF("free time is %d\n", quake_ipc_9to7->message_type);
				break;
			}
			case kStartWifi:
			{
#ifdef WIFI_ON_DEMAND
//				ARM7_PRINT("ARM7 Initialising wifi...\n");
				wifi_go();
//				ARM7_PRINTF("ARM7 ...done\n");
#else
				ARM7_PRINT("Wifi has already been initialised\n");
#endif
				break;
			}
			case kDMATransfer:
			{
				unsigned int source = ((unsigned int *)quake_ipc_9to7_buf)[0];
				unsigned int size = ((unsigned int *)quake_ipc_9to7_buf)[1];
				unsigned int dest = ((unsigned int *)quake_ipc_9to7_buf)[2];
				
				while(DMA_CR(dma_channel & 0x3) & DMA_BUSY);

				DMA_SRC(dma_channel & 0x3) = source;
				DMA_DEST(dma_channel & 0x3) = dest;
				DMA_CR(dma_channel & 0x3) = (DMA_ENABLE | DMA_32_BIT  | DMA_DST_FIX | DMA_START_NOW) | size;
				
				while(DMA_CR(dma_channel & 0x3) & DMA_BUSY);
//				ARM7_PRINT("from ");
//				ARM7_PRINT_NUMBER(source);
//				ARM7_PRINT("to ");
//				ARM7_PRINT_NUMBER(dest);
//				ARM7_PRINT("size ");
//				ARM7_PRINT_NUMBER(size);
				
				dma_channel++;
				break;
			}
			case kPowerOff:
			{
				ARM7_PRINT("ARM7: Powering down...\n");
				SerialWaitBusy();

				REG_SPICNT = SPI_ENABLE | SPI_DEVICE_POWER | SPI_BAUD_1MHz | SPI_CONTINUOUS;
				REG_SPIDATA = 0;

				SerialWaitBusy();

				REG_SPICNT = SPI_ENABLE | SPI_DEVICE_POWER | SPI_BAUD_1MHz;
				REG_SPIDATA = 1 << 6;

				break;
			}
			case kBspRender:
			{
//				ARM7_PRINT("ARM7: BSP Render\n");
				
				setup_bsp_render((void *)((unsigned int *)quake_ipc_9to7_buf)[0],
					(void *)((unsigned int *)quake_ipc_9to7_buf)[1],
					((int *)quake_ipc_9to7_buf)[2],
					((int *)quake_ipc_9to7_buf)[3],
					(unsigned char *)((unsigned int *)quake_ipc_9to7_buf)[4],
					(int **)((unsigned int *)quake_ipc_9to7_buf)[5],
					(int *)((unsigned int *)quake_ipc_9to7_buf)[6],
					(unsigned int *)((unsigned int *)quake_ipc_9to7_buf)[7]);
//				ARM7_PRINT("ARM7: BSP Render done\n");
				break;
			}
			//
			default:
			{
				ARM7_PRINT("some other message, ");
				ARM7_PRINT_NUMBER(type);
				ARM7_PRINT("\n");
				break;
			}
		}
		//quake_ipc_9to7->message = 0;
		fifoSendValue32(FIFO_9to7,0);
	//}

low_mem:

	if (low_memory)
	{
		mark_freeable();
		free_marked();
		
		low_memory = false;
	}
}
Beispiel #6
0
//---------------------------------------------------------------------------------
int loadNDS(int socket, u32 remote) {
//---------------------------------------------------------------------------------
	int len;
	
	int i=0;
	ioctl(socket,FIONBIO,&i);

	len = recvall(socket,__NDSHeader,512,0);
	
	if (len != 512) {
		kprintf("Error reading header.\n");
		return 1;
	}

	int arm7dest = __NDSHeader->arm7destination;
	int arm7size = __NDSHeader->arm7binarySize;

	int arm9dest = __NDSHeader->arm9destination;
	int arm9size = __NDSHeader->arm9binarySize;
	
	volatile int response = 0;
	
	if (arm9dest + arm9size > (int)_start) response = 1;
	if (arm7dest >= 0x02000000 && arm7dest < 0x03000000 && arm7dest + arm7size > (int)_start) response = 2;

	send(socket,(int *)&response,sizeof(response),0);
	
	if(response) return 1;

	kprintf("Reading arm7 binary: ");
	if (progressRead(socket,(char *)memUncached((void*)0x02000000),arm7size)) {
		kprintf("\nReceive error.\n");
		return 1;
	}
	
	fifoSendValue32(FIFO_USER_01,1);

	while(!fifoCheckValue32(FIFO_USER_01)) {
		swiIntrWait(1,IRQ_FIFO_NOT_EMPTY);
	}
	fifoGetValue32(FIFO_USER_01);

	kprintf("Reading arm9 binary: ");
	if(progressRead(socket,(char *)arm9dest,arm9size)) {
		kprintf("\nReceive error.\n");
		return 1;
	}

	volatile int cmdlen=0;
	char *cmdline;
	if (arm9size != 0){
		cmdline = (char*)(arm9dest+arm9size);
	} else {
		cmdline = (char*)(arm7dest+arm7size);
	}
	len = recvall(socket,(char*)&cmdlen,4,0);

	if (cmdlen) {
		len = recvall(socket,cmdline,cmdlen,0);

		__system_argv->argvMagic = ARGV_MAGIC;
		__system_argv->commandLine = cmdline;
		__system_argv->length = cmdlen;
		__system_argv->host = remote;
	}

	Wifi_DisableWifi();

	DC_FlushAll();
	REG_IPC_SYNC = 0;

	fifoSendValue32(FIFO_USER_01,2);
	fifoSendValue32(FIFO_USER_01,__NDSHeader->arm9executeAddress);

	irqDisable(IRQ_ALL);
	REG_IME = 0;

	//clear out ARM9 DMA channels
	for (i=0; i<4; i++) {
		DMA_CR(i) = 0;
		DMA_SRC(i) = 0;
		DMA_DEST(i) = 0;
		TIMER_CR(i) = 0;
		TIMER_DATA(i) = 0;
	}

	u16 *mainregs = (u16*)0x04000000;
	u16 *subregs = (u16*)0x04001000;

	for (i=0; i<43; i++) {
		mainregs[i] = 0;
		subregs[i] = 0;
	}

	REG_DISPSTAT = 0;

	dmaFillWords(0, BG_PALETTE, (2*1024));
	VRAM_A_CR = 0x80;
	dmaFillWords(0, VRAM, 128*1024);
	VRAM_A_CR = 0;
	VRAM_B_CR = 0;
// Don't mess with the ARM7's VRAM
//	VRAM_C_CR = 0;
	VRAM_D_CR = 0;
	VRAM_E_CR = 0;
	VRAM_F_CR = 0;
	VRAM_G_CR = 0;
	VRAM_H_CR = 0;
	VRAM_I_CR = 0;
	REG_POWERCNT  = 0x820F;

	//set shared ram to ARM7
	WRAM_CR = 0x03;
	// Return to passme loop
	*((vu32*)0x02FFFE04) = (u32)0xE59FF018;		// ldr pc, 0x02FFFE24
	*((vu32*)0x02FFFE24) = (u32)0x02FFFE04;		// Set ARM9 Loop address

	REG_IPC_SYNC = 0x500;

	arm9Reset();
	while(1);
}