void usb_phy_switch_to_usb(void)
{
int var;
/* Set RG_UART_EN to 0 */
var = USB_PHY_Read_Register8(0x6E);
DBG(0, "[MUSB]addr: 0x6E, value: %x\n", var);
USB_PHY_Write_Register8(var & ~0x01, 0x6E);
DBG(0, "[MUSB]addr: 0x6E, value after: %x\n", USB_PHY_Read_Register8(0x6E));
/* Set RG_USB20_DM_100K_EN to 0 */
var = USB_PHY_Read_Register8(0x22);
DBG(0, "[MUSB]addr: 0x22, value: %x\n", var);
USB_PHY_Write_Register8(var & ~0x02, 0x22);
DBG(0, "[MUSB]addr: 0x22, value after: %x\n", USB_PHY_Read_Register8(0x22));
var = DRV_Reg8(UART1_BASE + 0x90);
DBG(0, "[MUSB]addr: 0x11002090 (UART1), value: %x\n", var);
DRV_WriteReg8(UART1_BASE + 0x90, var & ~0x01);
DBG(0, "[MUSB]addr: 0x11002090 (UART1), value after: %x\n\n", DRV_Reg8(UART1_BASE + 0x90));
#if 0
/* SW connect */
var = USB_PHY_Read_Register8(0x68);
DBG(0, "[MUSB]addr: 0x68, value: %x\n", var);
USB_PHY_Write_Register8(0x0, 0x68);
DBG(0, "[MUSB]addr: 0x68, value after: %x\n", USB_PHY_Read_Register8(0x68));
var = USB_PHY_Read_Register8(0x6A);
DBG(0, "[MUSB]addr: 0x6A, value: %x\n", var);
USB_PHY_Write_Register8(0x0, 0x6A);
DBG(0, "[MUSB]addr: 0x6A, value after: %x\n", USB_PHY_Read_Register8(0x6A));
/* SW connect */
#endif
/* SW connect */
mt_usb_connect();
}
void MT6302_Writer_LCD(kal_uint8 data)
{
kal_uint32 i, loopIndex;
if(0 != MT6302_getSPIInterface())
ASSERT(0);
i = SaveAndSetIRQMask();
if(DRVPDN_CON1_LCD & DRV_Reg(DRVPDN_CON1)){
RestoreIRQMask(i);
ASSERT(0);
}
if(0xc != REG_LCD_SERIAL_CONFIG){
RestoreIRQMask(i);
ASSERT(0);
}
if(KAL_FALSE == MT6302_checkSPIMode()){
RestoreIRQMask(i);
ASSERT(0);
}
/* becareful that SW will hang on here until LCD controller return RDY signal on bus
* accoring to the measurement, in the slowest timing setting, LCD takes 2us to send on byte
*/
//DRV_Reg8(MT6302_SPI_LCDSerialData) = data;
DRV_WriteReg8((MT6302_SPI_LCDSerialData), data);
/*dummy read to make sure former byte has been written on SPI*/
MT6302_LCD_dummyReadValue = DRV_Reg8(MT6302_SPI_LCDSerialData);
RestoreIRQMask(i);
// 285 OK
// 250 FAIL
if( 0x60 == (0xE0 & data))
//noke_drv_mt6302_delay_us(300);
noke_drv_mt6302_delay_us(450);
}
void usb_phy_switch_to_uart(void)
{
int var;
#if 0
/* SW disconnect */
var = USB_PHY_Read_Register8(0x68);
DBG(0, "[MUSB]addr: 0x68, value: %x\n", var);
USB_PHY_Write_Register8(0x15, 0x68);
DBG(0, "[MUSB]addr: 0x68, value after: %x\n", USB_PHY_Read_Register8(0x68));
var = USB_PHY_Read_Register8(0x6A);
DBG(0, "[MUSB]addr: 0x6A, value: %x\n", var);
USB_PHY_Write_Register8(0x0, 0x6A);
DBG(0, "[MUSB]addr: 0x6A, value after: %x\n", USB_PHY_Read_Register8(0x6A));
/* SW disconnect */
#endif
/* Set ru_uart_mode to 2'b01 */
var = USB_PHY_Read_Register8(0x6B);
DBG(0, "[MUSB]addr: 0x6B, value: %x\n", var);
USB_PHY_Write_Register8(var | 0x7C, 0x6B);
DBG(0, "[MUSB]addr: 0x6B, value after: %x\n", USB_PHY_Read_Register8(0x6B));
/* Set RG_UART_EN to 1 */
var = USB_PHY_Read_Register8(0x6E);
DBG(0, "[MUSB]addr: 0x6E, value: %x\n", var);
USB_PHY_Write_Register8(var | 0x07, 0x6E);
DBG(0, "[MUSB]addr: 0x6E, value after: %x\n", USB_PHY_Read_Register8(0x6E));
/* Set RG_USB20_DM_100K_EN to 1 */
var = USB_PHY_Read_Register8(0x22);
DBG(0, "[MUSB]addr: 0x22, value: %x\n", var);
USB_PHY_Write_Register8(var | 0x02, 0x22);
DBG(0, "[MUSB]addr: 0x22, value after: %x\n", USB_PHY_Read_Register8(0x22));
var = DRV_Reg8(UART1_BASE + 0x90);
DBG(0, "[MUSB]addr: 0x11002090 (UART1), value: %x\n", var);
DRV_WriteReg8(UART1_BASE + 0x90, var | 0x01);
DBG(0, "[MUSB]addr: 0x11002090 (UART1), value after: %x\n\n", DRV_Reg8(UART1_BASE + 0x90));
/* SW disconnect */
mt_usb_disconnect();
}
void drv_idc_close()
{
// stop all events before closing IDC
DRV_WriteReg32(IDC_BSI_SCH_STOP_3100, 0xFFFFFFFF);
DRV_WriteReg32(IDC_BSI_SCH_STOP_6332, 0xFFFFFFFF & ~0xFC000000);
// disable interrupt
IRQMask(MD_IRQID_IDC2ARM);
DRV_WriteReg8(IDC_UART_IER, IDC_UART_IER_ALLOFF);
IRQUnmask(MD_IRQID_IDC2ARM);
idc_port.intr_en = KAL_FALSE;
idc_port.rx_buf = 0;
// clear start/finish priority register
// clear start/finish priority bit enable register
// clear start/finish pattern register
// clear start/finish pattern bit enable register
DRV_WriteReg32(IDC_UART_START_PRI, 0);
DRV_WriteReg32(IDC_UART_START_PRI_BITEN, 0);
DRV_WriteReg32(IDC_UART_START_PAT, 0);
DRV_WriteReg32(IDC_UART_START_PAT_BITEN, 0);
DRV_WriteReg32(IDC_UART_FINISH_PRI, 0);
DRV_WriteReg32(IDC_UART_FINISH_PRI_BITEN, 0);
DRV_WriteReg32(IDC_UART_FINISH_PAT, 0);
DRV_WriteReg32(IDC_UART_FINISH_PAT_BITEN, 0);
idc_port.schedule_state[0] = IDC_PLAN;
idc_port.schedule_state[1] = IDC_PLAN;
idc_port.event_cnt[0] = 0;
idc_port.event_cnt[1] = 0;
idc_port.sram_usage_bit_map[0] = 0;
idc_port.sram_usage_bit_map[1] = 0;
idc_port.rx_buf = 0;
idc_port.owner_id = 0;
idc_port.main_state = IDC_CLOSED;
return;
}
static int usb_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
printk("usb_i2c_probe, start\n");
usb_i2c_client = client;
//disable usb mac suspend
DRV_WriteReg8(0xF126086a, 0x00);
//usb phy initial sequence
USB_PHY_Write_Register8(0x00, 0xFF);
USB_PHY_Write_Register8(0x04, 0x61);
USB_PHY_Write_Register8(0x00, 0x68);
USB_PHY_Write_Register8(0x00, 0x6a);
USB_PHY_Write_Register8(0x6e, 0x00);
USB_PHY_Write_Register8(0x0c, 0x1b);
USB_PHY_Write_Register8(0x44, 0x08);
USB_PHY_Write_Register8(0x55, 0x11);
USB_PHY_Write_Register8(0x68, 0x1a);
printk("addr: 0xFF, value: %x\n", USB_PHY_Read_Register8(0xFF));
printk("addr: 0x61, value: %x\n", USB_PHY_Read_Register8(0x61));
printk("addr: 0x68, value: %x\n", USB_PHY_Read_Register8(0x68));
printk("addr: 0x6a, value: %x\n", USB_PHY_Read_Register8(0x6a));
printk("addr: 0x00, value: %x\n", USB_PHY_Read_Register8(0x00));
printk("addr: 0x1b, value: %x\n", USB_PHY_Read_Register8(0x1b));
printk("addr: 0x08, value: %x\n", USB_PHY_Read_Register8(0x08));
printk("addr: 0x11, value: %x\n", USB_PHY_Read_Register8(0x11));
printk("addr: 0x1a, value: %x\n", USB_PHY_Read_Register8(0x1a));
printk("usb_i2c_probe, end\n");
return 0;
}
void drv_idc_set_dcb_config(IDC_CTRL_DCB_CONFIG_T idc_config)
{
kal_uint8 tmp_lcr, tmp_ier;
IRQMask(MD_IRQID_IDC2ARM);
tmp_ier = DRV_Reg8(IDC_UART_IER);
DRV_WriteReg8(IDC_UART_IER, IDC_UART_IER_ALLOFF);
IRQUnmask(MD_IRQID_IDC2ARM);
// set baud rate
drv_idc_set_baudrate(idc_config.u4Baud);
tmp_lcr = DRV_Reg32(IDC_UART_LCR);
tmp_lcr &= ~0x3F;
// set number of bits per character
switch(idc_config.u1DataBits)
{
case len_5:
tmp_lcr |= IDC_UART_WLS_5;
break;
case len_6:
tmp_lcr |= IDC_UART_WLS_6;
break;
case len_7:
tmp_lcr |= IDC_UART_WLS_7;
break;
case len_8:
tmp_lcr |= IDC_UART_WLS_8;
break;
default:
break;
}
switch(idc_config.u1StopBits)
{
case sb_1:
tmp_lcr |= IDC_UART_1_STOP;
break;
case sb_2:
tmp_lcr |= IDC_UART_2_STOP;
break;
case sb_1_5:
tmp_lcr |= IDC_UART_1_5_STOP;
break;
default:
break;
}
switch(idc_config.u1Parity)
{
case pa_none:
tmp_lcr |= IDC_UART_NONE_PARITY;
break;
case pa_odd:
tmp_lcr |= IDC_UART_ODD_PARITY;
break;
case pa_even:
tmp_lcr |= IDC_UART_EVEN_PARITY;
break;
default:
break;
}
DRV_WriteReg32(IDC_UART_LCR, tmp_lcr);
kal_mem_cpy((void *) &idc_port.DCB, (void *) &idc_config, sizeof(IDC_CTRL_DCB_CONFIG_T));
IRQMask(MD_IRQID_IDC2ARM);
DRV_WriteReg8(IDC_UART_IER, tmp_ier);
IRQUnmask(MD_IRQID_IDC2ARM);
}
