static inline int Interrupt(int nVal)
{
if ((Doze.iff&0xff)==0) return 0; // not enabled
// Get out of any halt opcodes
if (DozeAsmRead(Doze.pc)==0x76) Doze.pc++;
Doze.iff=0;
if (Doze.im==0)
{
DozeAsmCall((unsigned short)(nVal&0x38)); // rst nn
return 13; // cycles done
}
else if (Doze.im==2)
{
int nTabAddr=0,nIntAddr=0;
// Get interrupt address from table (I points to the table)
nTabAddr=(Doze.ir&0xff00)+nVal;
// Read 16-bit table value
nIntAddr =DozeAsmRead((unsigned short)(nTabAddr+1))<<8;
nIntAddr|=DozeAsmRead((unsigned short)(nTabAddr));
DozeAsmCall((unsigned short)(nIntAddr));
return 19; // cycles done
}
else
{
DozeAsmCall(0x38); // rst 38h
return 13; // cycles done
}
}
void DozeRun()
{
TryInt(); // Try the interrupt before we begin
if (nDozeCycles<0) return;
if (DozeAsmRead(Doze.pc)==0x76)
{
// cpu is halted (repeatedly doing halt inst.)
int nDid=0; nDid=(nDozeCycles>>2)+1;
Doze.ir= (unsigned short)( ((Doze.ir+nDid)&0x7f) | (Doze.ir&0xff80) ); // Increase R register
nDozeCycles-=nDid;
return;
}
void __cdecl DozeRun()
{
TryInt(); // Try the interrupt before we begin
if (Doze.nCyclesLeft < 0) {
return;
}
if (DozeAsmRead(Doze.pc) == 0x76) {
// cpu is halted (repeatedly doing halt inst.)
int nDid = (Doze.nCyclesLeft >> 2) + 1;
Doze.ir = (unsigned short)(((Doze.ir + nDid) & 0x7F) | (Doze.ir & 0xFF80)); // Increase R register
Doze.nCyclesLeft -= nDid;
return;
}