/*
** Main function.
*/
int main(void)
{
unsigned int numByteChunks = 0;
unsigned char *pBuffer = NULL;
unsigned int remainBytes = 0;
/* Configure and enable the MMU. */
MMUConfigAndEnable();
/* Enable all levels of Cache. */
CacheEnable(CACHE_ALL);
/* Configuring the system clocks for EDMA. */
EDMAModuleClkConfig();
/* Configuring the system clocks for UART0 instance. */
UART0ModuleClkConfig();
/* Performing Pin Multiplexing for UART0 instance. */
UARTPinMuxSetup(0);
/* Enabling IRQ in CPSR of ARM processor. */
IntMasterIRQEnable();
/* Initializing the ARM Interrupt Controller. */
IntAINTCInit();
/* Initializing the EDMA. */
EDMA3Initialize();
/* Initializing the UART0 instance for use. */
UARTInitialize();
/* Select the console type based on compile time check */
ConsoleUtilsSetType(CONSOLE_UART);
/*
** Configuring the EDMA.
*/
/* Request DMA Channel and TCC for UART Transmit*/
EDMA3RequestChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA,
EDMA3_UART_TX_CHA_NUM, EDMA3_UART_TX_CHA_NUM,
EVT_QUEUE_NUM);
/* Registering Callback Function for TX*/
cb_Fxn[EDMA3_UART_TX_CHA_NUM] = &callback;
/* Request DMA Channel and TCC for UART Receive */
EDMA3RequestChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA,
EDMA3_UART_RX_CHA_NUM, EDMA3_UART_RX_CHA_NUM,
EVT_QUEUE_NUM);
/* Registering Callback Function for RX*/
cb_Fxn[EDMA3_UART_RX_CHA_NUM] = &callback;
/******************** Transmission of a string **************************/
numByteChunks = (sizeof(welcome) - 1) / txBytesPerEvent;
remainBytes = (sizeof(welcome) - 1) % txBytesPerEvent;
/* Configuring EDMA PaRAM sets to transmit data. */
UARTTxEDMAPaRAMSetConfig(welcome,
numByteChunks * txBytesPerEvent,
EDMA3_UART_TX_CHA_NUM,
EDMA3CC_OPT(DUMMY_CH_NUM),
EDMA3_UART_TX_CHA_NUM);
/* Configuring the PaRAM set for Dummy Transfer. */
TxDummyPaRAMConfEnable();
/* Enable EDMA Transfer */
EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_TX_CHA_NUM,
EDMA3_TRIG_MODE_EVENT);
/* Wait for return from callback */
while(0 == clBackFlag);
clBackFlag = 0;
/* Remaining bytes are transferred through polling method. */
if(0 != remainBytes)
{
pBuffer = welcome + (sizeof(welcome) - 1) - remainBytes;
UARTPuts((char*)pBuffer, remainBytes);
}
/******************** Transmission of a string **************************/
numByteChunks = (sizeof(intent) - 1) / txBytesPerEvent;
remainBytes = (sizeof(intent) - 1) % txBytesPerEvent;
/* Enabling DMA Mode 1. */
UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE);
/* Configuring EDMA PaRAM sets to transmit data. */
UARTTxEDMAPaRAMSetConfig(intent,
numByteChunks * txBytesPerEvent,
EDMA3_UART_TX_CHA_NUM,
EDMA3CC_OPT(DUMMY_CH_NUM),
EDMA3_UART_TX_CHA_NUM);
/* Configuring the PaRAM set for Dummy Transfer. */
TxDummyPaRAMConfEnable();
/* Enable EDMA Transfer */
EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_TX_CHA_NUM,
EDMA3_TRIG_MODE_EVENT);
/* Wait for return from callback */
while(0 == clBackFlag);
clBackFlag = 0;
/* Remaining bytes are transferred through polling method. */
if(0 != remainBytes)
{
pBuffer = intent + (sizeof(intent) - 1) - remainBytes;
UARTPuts((char*)pBuffer, remainBytes);
}
/******************** Transmission of a string **************************/
numByteChunks = (sizeof(enter) - 1) / txBytesPerEvent;
remainBytes = (sizeof(enter) - 1) % txBytesPerEvent;
/* Enabling DMA Mode 1. */
UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE);
/* Configuring EDMA PaRAM sets to transmit data. */
UARTTxEDMAPaRAMSetConfig(enter,
numByteChunks * txBytesPerEvent,
EDMA3_UART_TX_CHA_NUM,
EDMA3CC_OPT(DUMMY_CH_NUM),
EDMA3_UART_TX_CHA_NUM);
/* Configuring the PaRAM set for Dummy Transfer. */
TxDummyPaRAMConfEnable();
/* Enable EDMA Transfer */
EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_TX_CHA_NUM,
EDMA3_TRIG_MODE_EVENT);
/* Wait for return from callback */
while(0 == clBackFlag);
clBackFlag = 0;
/* Remaining bytes are transferred through polling method. */
if(0 != remainBytes)
{
pBuffer = enter + (sizeof(enter) - 1) - remainBytes;
UARTPuts((char*)pBuffer, remainBytes);
}
/********************* Receiving Data from User *************************/
/* Enabling DMA Mode 1. */
UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE);
/* Configuring the PaRAM set for reception. */
UARTRxEDMAPaRAMSetConfig(rxBuffer,
NUM_RX_BYTES,
EDMA3_UART_RX_CHA_NUM,
0xFFFF,
EDMA3_UART_RX_CHA_NUM);
/* Enable EDMA Transfer */
EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_RX_CHA_NUM,
EDMA3_TRIG_MODE_EVENT);
/* Wait for return from callback */
while(0 == clBackFlag);
clBackFlag = 0;
/******************* Echoing received bytes *****************************/
numByteChunks = (NUM_RX_BYTES) / txBytesPerEvent;
remainBytes = (NUM_RX_BYTES) % txBytesPerEvent;
/* Enabling DMA Mode 1. */
UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE);
/* Configuring EDMA PaRAM sets to transmit data. */
UARTTxEDMAPaRAMSetConfig(rxBuffer,
numByteChunks * txBytesPerEvent,
EDMA3_UART_TX_CHA_NUM,
EDMA3CC_OPT(DUMMY_CH_NUM),
EDMA3_UART_TX_CHA_NUM);
/* Configuring the PaRAM set for Dummy Transfer. */
TxDummyPaRAMConfEnable();
/* Enable EDMA Transfer */
EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_TX_CHA_NUM,
EDMA3_TRIG_MODE_EVENT);
/* Wait for return from callback */
while(0 == clBackFlag);
clBackFlag = 0;
/* Remaining bytes are transferred through polling method. */
if(0 != remainBytes)
{
pBuffer = rxBuffer + NUM_RX_BYTES - remainBytes;
UARTPuts((char*)pBuffer, remainBytes);
}
/******************* Freeing of allocated channels **********************/
/* Free EDMA3 Channels for TX and RX */
EDMA3FreeChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA,
EDMA3_UART_TX_CHA_NUM, EDMA3_TRIG_MODE_EVENT,
EDMA3_UART_TX_CHA_NUM, EVT_QUEUE_NUM);
EDMA3FreeChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA,
EDMA3_UART_RX_CHA_NUM, EDMA3_TRIG_MODE_EVENT,
EDMA3_UART_RX_CHA_NUM, EVT_QUEUE_NUM);
/* Support for Automation Testing. */
PRINT_STATUS(S_PASS);
while(1);
}
/**
* @brief
* 在某个固定地址缓冲区和一连续的内存区域间传送数据
* @param [in] trigMode DMA触发方式
* -- EDMA3_TRIG_MODE_MANUAL 手动触发
* -- EDMA3_TRIG_MODE_EVENT 事件出发
* -- EDMA3_TRIG_MODE_IMMEDIATE 立即出发
* @param [in] chNum DMA通道号 \b EDMA3_CHA_XXX
* @param [in] entryAddr 固定地址缓冲区的地址
* @param [in] bufAddr 连续的内存区地址
* @param [in] rwFlag 读写标识
* -- 1 读
* -- 0 写
* @param [in] entryBitWidth 固定缓冲区位宽
* @param [in] blkSize 每次传送的字节数
* @param [in] nblks 传送的次数
* @param [in] handlerIndex
* 数据传送完成后执行的回调函数索引
* @return 总是 1
* @date 2013/6/19
* @note
* @code
* @endcode
* @pre
* @see
*/
unsigned int EDMARequestXferWithBufferEntry(unsigned int trigMode,
unsigned int chNum,
unsigned int entryAddr,
unsigned int bufAddr,
unsigned int rwFlag,
unsigned int entryBitWidth,
unsigned int blkSize,
unsigned int nblks,
unsigned int handlerIndex) {
unsigned int paramid, chtype;
volatile EDMA3CCPaRAMEntry *paramSet;
mdAssert(handlerIndex < 64);
//entryAddr should 5bit allign;
mdAssert((entryAddr&0x1fUL) == 0);
mdAssert((entryBitWidth == 8) || (entryBitWidth == 16) || (entryBitWidth == 32));
mdAssert(blkSize%(entryBitWidth/8)==0);
if (EDMA3_0_NUM_TC == ++evtqueue) {
evtqueue = 0;
}
if (EDMA3_TRIG_MODE_QDMA == trigMode) {
chtype = EDMA3_CHANNEL_TYPE_QDMA;
paramid = 64+chNum % 8;
} else {
chtype = EDMA3_CHANNEL_TYPE_DMA;
paramid = chNum;
}
EDMA3MapChToEvtQ(EDMA_INST_BASE, chtype, chNum, evtqueue);
/*if QDMA disable the channel to aviod trig when set paRam*/
if (EDMA3_TRIG_MODE_IMMEDIATE == trigMode) {
EDMA3DisableTransfer(EDMA_INST_BASE, chNum, EDMA3_TRIG_MODE_IMMEDIATE);
}
paramSet = (EDMA3CCPaRAMEntry *)(EDMA_INST_BASE + EDMA3CC_OPT(paramid));
paramSet->srcAddr = rwFlag ? entryAddr : bufAddr;
paramSet->dstAddr = rwFlag ? bufAddr: entryAddr;
unsigned int nbyte = entryBitWidth / 8;
paramSet->aCnt = nbyte;
paramSet->bCnt = (unsigned short)blkSize / nbyte;
paramSet->cCnt = nblks;
paramSet->opt = (handlerIndex << 12) |(numberToFwid(entryBitWidth) << 8) |
(1 << 20) | (1 << !rwFlag) |(1 << 2); // A-B SYNC,ENABLE INT,32BIT WIDTH
paramSet->srcBIdx = rwFlag ? 0 : nbyte;
paramSet->srcCIdx = rwFlag ? 0 : (unsigned short)blkSize;
paramSet->destBIdx = rwFlag ? nbyte : 0;
paramSet->destCIdx = rwFlag ? (unsigned short)blkSize : 0;
paramSet->bCntReload = 0x0;
paramSet->linkAddr = 0xffff;
EDMA3EnableTransfer(EDMA_INST_BASE, chNum, trigMode);
if (EDMA3_TRIG_MODE_IMMEDIATE == trigMode) {
EDMA3SetQdmaTrigWord(EDMA_INST_BASE, chNum, 0);
paramSet->opt = paramSet->opt; //trig qdma
}
return 1;
}
unsigned int EDMARequestXferArray(unsigned int trigMode,
unsigned int chNum,
unsigned int scrAddr,
unsigned int dstAddr,
unsigned int bytenumber,
unsigned int handleIndex) {
unsigned int synctype ,paramid,chtype;
volatile EDMA3CCPaRAMEntry *paramSet;
mdAssert(handleIndex < 64);
//scrAddr and destAddr shoud 4bit allign;
mdAssert((scrAddr&0x3 == 0) && (dstAddr&0x3 == 0));
if (EDMA3_0_NUM_TC == ++evtqueue) {
evtqueue = 0;
}
if (EDMA3_TRIG_MODE_QDMA == trigMode) {
chtype = EDMA3_CHANNEL_TYPE_QDMA;
paramid = 64 + chNum % 8;
} else {
chtype = EDMA3_CHANNEL_TYPE_DMA;
paramid = chNum;
}
EDMA3MapChToEvtQ(EDMA_INST_BASE,chtype,chNum,evtqueue);
paramSet = (EDMA3CCPaRAMEntry *)(EDMA_INST_BASE + EDMA3CC_OPT(paramid));
if (bytenumber <= 0xffff) {
synctype = 0;
} else {
synctype = 1;
}
if ((1==synctype)&&((bytenumber & 0x3ff)!=0)) {
return 0; //if bytenumber>0xffff, bytenumber should be multiple of 1k;
}
//if QDMA disable the channel to aviod trig when set paRam
if (EDMA3_TRIG_MODE_IMMEDIATE == trigMode) {
EDMA3DisableTransfer(EDMA_INST_BASE, chNum, EDMA3_TRIG_MODE_IMMEDIATE);
}
paramSet->srcAddr = (unsigned int)scrAddr;
paramSet->dstAddr = dstAddr;
if (0==synctype) {
paramSet->aCnt = bytenumber;
paramSet->bCnt = 1;
paramSet->cCnt = 1;
paramSet->opt = (handleIndex<<12)|(2 << 8)|(1<<20)|(1<<3); // set STATIC BIT,A SYNC
paramSet->srcBIdx = 0;
paramSet->destBIdx = 0;
} else {
paramSet->aCnt = 1024 ;
paramSet->bCnt = bytenumber/1024;
paramSet->cCnt = 1;
paramSet->opt = (handleIndex<<12)|(2 << 8)|(1<<20)|(1<<3)|(1<<2); //set STATIC BIT, A-B SYNC,ENABLE INT,32BIT WIDTH
paramSet->srcBIdx = 1024;
paramSet->destBIdx = 1024;
}
paramSet->srcCIdx = 0;
paramSet->destCIdx = 0;
paramSet->bCntReload = 0x0;
paramSet->linkAddr = 0xffff;
EDMA3EnableTransfer(EDMA_INST_BASE, chNum, trigMode);
if (EDMA3_TRIG_MODE_IMMEDIATE == trigMode) {
EDMA3SetQdmaTrigWord(EDMA_INST_BASE,chNum,0);
paramSet->opt = paramSet->opt; //trig qdma
}
return 1;
}
unsigned int EDMARequestXfer2D( unsigned int trigMode,
unsigned int chNum,
unsigned int scrAddr,
unsigned int dstAddr,
unsigned int bnOfScrRow,
unsigned int numOfScrColum,
unsigned int bnOfDstRow,
unsigned int numOfDstColum,
unsigned int bnOfRow,
unsigned int numOfColum,
unsigned int handlerIndex) {
unsigned int paramid,chtype;
mdAssert(handlerIndex < 64);
//scrAddr and destAddr shoud 4bit allign;
mdAssert((scrAddr&0x3 == 0) && (dstAddr&0x3 == 0));
if (EDMA3_0_NUM_TC==++evtqueue) {
evtqueue = 0;
}
if (EDMA3_TRIG_MODE_QDMA == trigMode) {
chtype = EDMA3_CHANNEL_TYPE_QDMA;
paramid = 64+chNum % 8;
} else {
chtype = EDMA3_CHANNEL_TYPE_DMA;
paramid = chNum;
}
EDMA3MapChToEvtQ(EDMA_INST_BASE,chtype,chNum,evtqueue);
//if QDMA disable the channel to aviod trig when set paRam
if (EDMA3_TRIG_MODE_IMMEDIATE == trigMode) {
EDMA3DisableTransfer(EDMA_INST_BASE, chNum, EDMA3_TRIG_MODE_IMMEDIATE);
}
EDMA3CCPaRAMEntry *paramSet = (EDMA3CCPaRAMEntry *)(EDMA_INST_BASE + EDMA3CC_OPT(paramid));
paramSet->srcAddr = (unsigned int)scrAddr;
paramSet->dstAddr = dstAddr;
paramSet->aCnt = bnOfRow ;
paramSet->bCnt = numOfColum;
paramSet->cCnt = 1;
paramSet->opt = (handlerIndex<<12)|(2 << 8)|(1<<20)|(1<<3)|(1<<2); //set STATIC BIT, A-B SYNC,32BIT WIDTH
paramSet->srcBIdx = bnOfScrRow;
paramSet->srcCIdx = 0;
paramSet->destBIdx = bnOfDstRow;
paramSet->destCIdx = 0;
paramSet->bCntReload = 0x0;
paramSet->linkAddr = 0xffff;
EDMA3EnableTransfer(EDMA_INST_BASE, chNum, trigMode);
if (EDMA3_TRIG_MODE_IMMEDIATE == trigMode) {
EDMA3SetQdmaTrigWord(EDMA_INST_BASE, chNum, 0);
paramSet->opt = paramSet->opt; //trig qdma
}
return 1;
}
/*
** This function is used to set the PaRAM entries of EDMA3 for the Transmit
** Channel 0 of SPI0 instance. The corresponding EDMA3 channel is also enabled
** for transmission.
*/
static void McSpiTxEdmaParamSet(unsigned int tccNum, unsigned int chNum,
volatile unsigned char *buffer,
unsigned short buffLength)
{
EDMA3CCPaRAMEntry paramSet;
unsigned char *p = (unsigned char *)¶mSet;
unsigned int index = 0;
/* Clean-up the contents of structure variable. */
for(index = 0; index < sizeof(paramSet); index++)
{
p[index] = 0;
}
/* Fill the PaRAM Set with transfer specific information. */
/* srcAddr holds address of memory location buffer. */
paramSet.srcAddr = (unsigned int) buffer;
/* destAddr holds address of McSPI_TX register. */
paramSet.destAddr = (unsigned int) (MCSPI_TX0_REG);
/* aCnt holds the number of bytes in an array. */
paramSet.aCnt = 1;
/* bCnt holds the number of such arrays to be transferred. */
paramSet.bCnt = buffLength;
/* cCnt holds the number of frames of aCnt*bBcnt bytes to be transferred. */
paramSet.cCnt = 1;
/*
** The srcBidx should be incremented by aCnt number of bytes since the
** source used here is memory.
*/
paramSet.srcBIdx = 1;
paramSet.destBIdx = 0;
/* Async Transfer Mode is set in OPT.*/
/* srCIdx and destCIdx set to zero since ASYNC Mode is used. */
paramSet.srcCIdx = 0;
paramSet.destCIdx = 0;
/* Linking transfers in EDMA3 are not used. */
paramSet.linkAddr = (EDMA3CC_OPT(DUMMY_CH_NUM));
paramSet.bCntReload = 0;
paramSet.opt = 0x00000000;
/* SAM and DAM fields both are set to 0 */
/* Set TCC field in OPT with the tccNum. */
paramSet.opt |= ((tccNum << EDMA3CC_OPT_TCC_SHIFT) & EDMA3CC_OPT_TCC);
/* EDMA3 Interrupt is enabled and Intermediate Interrupt Disabled.*/
paramSet.opt |= (1 << EDMA3CC_OPT_TCINTEN_SHIFT);
/* Now write the PaRam Set to EDMA3.*/
EDMA3SetPaRAM(SOC_EDMA30CC_0_REGS, chNum, ¶mSet);
/* Dummy param set is enabled */
TxDummyPaRAMConfEnable();
/* EDMA3 Transfer is Enabled. */
EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, chNum, EDMA3_TRIG_MODE_EVENT);
}
