int tegra_dc_set_dynamic_emc(struct tegra_dc_win *windows[], int n)
{
unsigned long new_rate;
struct tegra_dc *dc;
#ifdef CONFIG_MACH_DA2
const unsigned long threshold = 204000000;
#endif
if (!use_dynamic_emc)
return 0;
dc = windows[0]->dc;
/* calculate the new rate based on this POST */
new_rate = tegra_dc_get_bandwidth(windows, n);
if (WARN_ONCE(new_rate > (ULONG_MAX / 1000), "bandwidth maxed out\n"))
new_rate = ULONG_MAX;
else
new_rate = EMC_BW_TO_FREQ(new_rate * 1000);
#ifdef CONFIG_MACH_DA2
if (new_rate < threshold) {
new_rate = threshold;
}
#endif
if (tegra_dc_has_multiple_dc())
new_rate = ULONG_MAX;
trace_printk("%s:new_emc_clk_rate=%ld\n", dc->ndev->name, new_rate);
dc->new_emc_clk_rate = new_rate;
return 0;
}
int tegra_dc_set_dynamic_emc(struct tegra_dc_win *windows[], int n)
{
unsigned long new_rate;
struct tegra_dc *dc;
if (!use_dynamic_emc)
return 0;
dc = windows[0]->dc;
/* calculate the new rate based on this POST */
new_rate = tegra_dc_get_bandwidth(windows, n);
if (WARN_ONCE(new_rate > (ULONG_MAX / 1000), "bandwidth maxed out\n"))
new_rate = ULONG_MAX;
else
new_rate = EMC_BW_TO_FREQ(new_rate * 1000);
if (tegra_dc_has_multiple_dc())
new_rate = ULONG_MAX;
dc->new_emc_clk_rate = new_rate;
trace_set_dynamic_emc(dc);
return 0;
}
static void tegra_overlay_set_emc_freq(struct tegra_overlay_info *dev)
{
unsigned long new_rate;
int i;
struct tegra_dc_win *win;
struct tegra_dc_win *wins[DC_N_WINDOWS];
for (i = 0; i < DC_N_WINDOWS; i++) {
win = tegra_dc_get_window(dev->dc, i);
wins[i] = win;
}
new_rate = tegra_dc_get_bandwidth(wins, dev->dc->n_windows);
new_rate = EMC_BW_TO_FREQ(new_rate);
if (tegra_dc_has_multiple_dc())
new_rate = ULONG_MAX;
clk_set_rate(dev->dc->emc_clk, new_rate);
}