/* API to perform display fadein effect by changing the display PWM from 0 till 100 and finally 128 */
ft_void_t SAMAPP_fadein()
{
ft_int32_t i;
for (i = 0; i <=100 ; i += 3)
{
Ft_Gpu_Hal_Wr8(phost,REG_PWM_DUTY,i);
Ft_Gpu_Hal_Sleep(2);//sleep for 2 ms
}
/* Finally make the PWM 100% */
i = 128;
Ft_Gpu_Hal_Wr8(phost,REG_PWM_DUTY,i);
}
/* API to give fadeout effect by changing the display PWM from 100 till 0 */
ft_void_t SAMAPP_fadeout()
{
ft_int32_t i;
for (i = 100; i >= 0; i -= 3)
{
Ft_Gpu_Hal_Wr8(phost,REG_PWM_DUTY,i);
Ft_Gpu_Hal_Sleep(2);//sleep for 2 ms
}
}
int32 main(int32 argc,char *argv[]){
Ft_Gpu_HalInit_t halinit;
halinit.TotalChannelNum = 1;
printf("3.05.2014\n");
#ifdef USEDLL
if(NULL==installMPSSE()){
printf("libmpsse.dll not loaded\n");
exit(1);
}
printf("libmpsse.dll installed OK\n");
#endif
Init_libMPSSE(); //OK
Ft_Gpu_Hal_Init(&halinit);
host.hal_config.channel_no=0;
host.hal_config.spi_clockrate_khz=12000; //in KHz
Ft_Gpu_Hal_Open(&host);
phost=&host;
printf("po Ft_Gpu_Hal_Open: %x\n", host.hal_handle);
SAMAPP_BootupConfig();
printf("reg_touch_rz =0x%x ", Ft_Gpu_Hal_Rd16(phost, REG_TOUCH_RZ));
printf("reg_touch_rzthresh =0x%x ", Ft_Gpu_Hal_Rd32(phost, REG_TOUCH_RZTHRESH));
printf("reg_touch_tag_xy=0x%x",Ft_Gpu_Hal_Rd32(phost, REG_TOUCH_TAG_XY));
printf("reg_touch_tag=0x%x",Ft_Gpu_Hal_Rd32(phost, REG_TOUCH_TAG));
Ft_Gpu_Hal_WrMem(phost,RAM_DL,(uint8 *)FT_DLCODE_BOOTUP,sizeof(FT_DLCODE_BOOTUP));
Ft_Gpu_Hal_Wr8(phost,REG_DLSWAP,DLSWAP_FRAME);
Ft_Gpu_Hal_Sleep(1000);
SAMAPP_API_Screen("Lurch car system");
mainControler();
/* Close all the opened handles */
Ft_Gpu_Hal_Close(phost);
Ft_Gpu_Hal_DeInit();
return 0;
}
static void gpuInitLate(void) {
/* Do a power cycle for safer side */
Ft_Gpu_Hal_Powercycle(&Gpu, FT_TRUE);
//Ft_Gpu_Hal_Rd16(&Gpu, RAM_G);
/* Access address 0 to wake up the FT800 */
Ft_Gpu_HostCommand(&Gpu, FT_GPU_ACTIVE_M);
Ft_Gpu_Hal_Sleep(40);
/* Set the clk to external clock */
Ft_Gpu_HostCommand(&Gpu, FT_GPU_EXTERNAL_OSC);
Ft_Gpu_Hal_Sleep(20);
/* Switch PLL output to 48MHz */
Ft_Gpu_HostCommand(&Gpu, FT_GPU_PLL_48M);
Ft_Gpu_Hal_Sleep(20);
/* Do a core reset for safer side */
Ft_Gpu_HostCommand(&Gpu, FT_GPU_CORE_RESET);
Ft_Gpu_Hal_Sleep(40);
Ft_Gpu_Hal_Wr16(&Gpu, REG_HCYCLE, DISP_H_CYCLE);
Ft_Gpu_Hal_Wr16(&Gpu, REG_HOFFSET, DISP_H_OFFSET);
Ft_Gpu_Hal_Wr16(&Gpu, REG_HSYNC0, DISP_H_SYNC0);
Ft_Gpu_Hal_Wr16(&Gpu, REG_HSYNC1, DISP_H_SYNC1);
Ft_Gpu_Hal_Wr16(&Gpu, REG_VCYCLE, DISP_V_CYCLE);
Ft_Gpu_Hal_Wr16(&Gpu, REG_VOFFSET, DISP_V_OFFSET);
Ft_Gpu_Hal_Wr16(&Gpu, REG_VSYNC0, DISP_V_SYNC0);
Ft_Gpu_Hal_Wr16(&Gpu, REG_VSYNC1, DISP_V_SYNC1);
Ft_Gpu_Hal_Wr8(&Gpu, REG_SWIZZLE, DISP_SWIZZLE);
Ft_Gpu_Hal_Wr8(&Gpu, REG_PCLK_POL, DISP_PCLK_POL);
Ft_Gpu_Hal_Wr16(&Gpu, REG_HSIZE, DISP_WIDTH);
Ft_Gpu_Hal_Wr16(&Gpu, REG_VSIZE, DISP_HEIGHT);
Ft_Gpu_Hal_Wr8(&Gpu, REG_GPIO_DIR, 0x83 | Ft_Gpu_Hal_Rd8(&Gpu, REG_GPIO_DIR));
Ft_Gpu_Hal_Wr8(&Gpu, REG_GPIO, 0x83 | Ft_Gpu_Hal_Rd8(&Gpu, REG_GPIO));
/* Touch configuration - configure the resistance value to 1200 - this value is specific to customer requirement and derived by experiment */
Ft_Gpu_Hal_Wr16(&Gpu, REG_TOUCH_RZTHRESH,1200);
Ft_Gpu_Hal_Wr32(&Gpu, RAM_DL + 0, CLEAR_COLOR_RGB(0, 0, 0));//set the background to black
Ft_Gpu_Hal_Wr32(&Gpu, RAM_DL + 4, CLEAR(1,1,1));
Ft_Gpu_Hal_Wr32(&Gpu, RAM_DL + 8, DISPLAY());
Ft_Gpu_Hal_Wr8(&Gpu, REG_DLSWAP, DLSWAP_FRAME);
Ft_Gpu_Hal_Wr8(&Gpu, REG_PCLK, DISP_PCLK); /* After this display is visible on the LCD */
}
/* Check for the status of previous DLSWAP and if still not done wait for few ms and check again */
ft_void_t SAMAPP_GPU_DLSwap(ft_uint8_t DL_Swap_Type)
{
ft_uint8_t Swap_Type = DLSWAP_FRAME,Swap_Done = DLSWAP_FRAME;
if(DL_Swap_Type == DLSWAP_LINE)
{
Swap_Type = DLSWAP_LINE;
}
/* Perform a new DL swap */
Ft_Gpu_Hal_Wr8(phost,REG_DLSWAP,Swap_Type);
/* Wait till the swap is done */
while(Swap_Done)
{
Swap_Done = Ft_Gpu_Hal_Rd8(phost,REG_DLSWAP);
if(DLSWAP_DONE != Swap_Done)
{
Ft_Gpu_Hal_Sleep(10);//wait for 10ms
}
}
}
ft_void_t Ft_BootupConfig()
{
/* Do a power cycle for safer side */
Ft_Gpu_Hal_Powercycle(phost,FT_TRUE);
Ft_Gpu_Hal_Rd16(phost,RAM_G);
/* Set the clk to external clock */
Ft_Gpu_HostCommand(phost,FT_GPU_EXTERNAL_OSC);
Ft_Gpu_Hal_Sleep(10);
/* Switch PLL output to 48MHz */
Ft_Gpu_HostCommand(phost,FT_GPU_PLL_48M);
Ft_Gpu_Hal_Sleep(10);
/* Do a core reset for safer side */
Ft_Gpu_HostCommand(phost,FT_GPU_CORE_RESET);
/* Access address 0 to wake up the FT800 */
Ft_Gpu_HostCommand(phost,FT_GPU_ACTIVE_M);
Ft_Gpu_Hal_Wr8(phost, REG_GPIO_DIR,0x80 | Ft_Gpu_Hal_Rd8(phost,REG_GPIO_DIR));
Ft_Gpu_Hal_Wr8(phost, REG_GPIO,0x080 | Ft_Gpu_Hal_Rd8(phost,REG_GPIO));
{
ft_uint8_t chipid;
//Read Register ID to check if FT800 is ready.
chipid = Ft_Gpu_Hal_Rd8(phost, REG_ID);
while(chipid != 0x7C)
chipid = Ft_Gpu_Hal_Rd8(phost, REG_ID);
#ifdef MSVC_PLATFORM
printf("VC1 register ID after wake up %x\n",chipid);
#endif
}
/* Configuration of LCD display */
#ifdef SAMAPP_DISPLAY_QVGA
/* Values specific to QVGA LCD display */
FT_DispWidth = 320;
FT_DispHeight = 240;
FT_DispHCycle = 408;
FT_DispHOffset = 70;
FT_DispHSync0 = 0;
FT_DispHSync1 = 10;
FT_DispVCycle = 263;
FT_DispVOffset = 13;
FT_DispVSync0 = 0;
FT_DispVSync1 = 2;
FT_DispPCLK = 8;
FT_DispSwizzle = 2;
FT_DispPCLKPol = 0;
#endif
Ft_Gpu_Hal_Wr16(phost, REG_HCYCLE, FT_DispHCycle);
Ft_Gpu_Hal_Wr16(phost, REG_HOFFSET, FT_DispHOffset);
Ft_Gpu_Hal_Wr16(phost, REG_HSYNC0, FT_DispHSync0);
Ft_Gpu_Hal_Wr16(phost, REG_HSYNC1, FT_DispHSync1);
Ft_Gpu_Hal_Wr16(phost, REG_VCYCLE, FT_DispVCycle);
Ft_Gpu_Hal_Wr16(phost, REG_VOFFSET, FT_DispVOffset);
Ft_Gpu_Hal_Wr16(phost, REG_VSYNC0, FT_DispVSync0);
Ft_Gpu_Hal_Wr16(phost, REG_VSYNC1, FT_DispVSync1);
Ft_Gpu_Hal_Wr8(phost, REG_SWIZZLE, FT_DispSwizzle);
Ft_Gpu_Hal_Wr8(phost, REG_PCLK_POL, FT_DispPCLKPol);
Ft_Gpu_Hal_Wr8(phost, REG_PCLK,FT_DispPCLK);//after this display is visible on the LCD
Ft_Gpu_Hal_Wr16(phost, REG_HSIZE, FT_DispWidth);
Ft_Gpu_Hal_Wr16(phost, REG_VSIZE, FT_DispHeight);
/* Touch configuration - configure the resistance value to 1200 - this value is specific to customer requirement and derived by experiment */
Ft_Gpu_Hal_Wr16(phost, REG_TOUCH_RZTHRESH,1200);
Ft_Gpu_Hal_Wr8(phost, REG_GPIO_DIR,0xff);
Ft_Gpu_Hal_Wr8(phost, REG_GPIO,0x0ff);
}
