//------------------------------------------------------------------------
void uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
}
static isc_result_t
value_fromwire(isccc_region_t *source, isccc_sexpr_t **valuep)
{
unsigned int msgtype;
isc_uint32_t len;
isccc_sexpr_t *value;
isccc_region_t active;
isc_result_t result;
if (REGION_SIZE(*source) < 1 + 4)
return (ISC_R_UNEXPECTEDEND);
GET8(msgtype, source->rstart);
GET32(len, source->rstart);
if (REGION_SIZE(*source) < len)
return (ISC_R_UNEXPECTEDEND);
active.rstart = source->rstart;
active.rend = active.rstart + len;
source->rstart = active.rend;
if (msgtype == ISCCC_CCMSGTYPE_BINARYDATA) {
value = isccc_sexpr_frombinary(&active);
if (value != NULL) {
*valuep = value;
result = ISC_R_SUCCESS;
} else
result = ISC_R_NOMEMORY;
} else if (msgtype == ISCCC_CCMSGTYPE_TABLE)
result = table_fromwire(&active, NULL, valuep);
else if (msgtype == ISCCC_CCMSGTYPE_LIST)
result = list_fromwire(&active, valuep);
else
result = ISCCC_R_SYNTAX;
return (result);
}
//------------------------------------------------------------------------
void uart_flush ( void )
{
while(1)
{
if((GET32(AUX_MU_LSR_REG)&0x100)==0) break;
}
}
/*
* audio1575_write_ac97()
*
* Description:
* Set the specific AC97 Codec register.
*
* Arguments:
* void *arg The device's state structure
* uint8_t reg AC97 register number
* uint16_t data The data want to be set
*/
static void
audio1575_write_ac97(void *arg, uint8_t reg, uint16_t data)
{
audio1575_state_t *statep = arg;
int i;
if (audio1575_codec_sync(statep) != DDI_SUCCESS) {
return;
}
/* write the data to WRITE to the lo word of the CPR register */
PUT16(M1575_CPR_REG, data);
/* write the address to WRITE to the hi word of the CPR register */
PUT16(M1575_CPR_REG+2, reg);
/* wait until command is completed sucessfully */
for (i = 0; i < M1575_LOOP_CTR; i++) {
/* Wait for Write Ready 0x01 */
if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_WRRDY) {
break;
}
drv_usecwait(1);
}
if (i < M1575_LOOP_CTR) {
(void) audio1575_read_ac97(statep, reg);
}
}
int uart_putc (uint32_t c, ...) {
while(1) {
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
return c;
}
//-------------------------------------------------------------------
void notmain ( void )
{
unsigned int lastcount;
unsigned int nowcount;
unsigned int timeout;
pll_init(); //run clock at 60MHz.
PUT32(APBDIV,1); //run peripherals at 60MHz
uart_init();
hexstring(0x12345678,1);
//zero bits 30 and 31 (connect pin to GPIO)
PUT32(PINSEL0,GET32(PINSEL0)&(~(3<<(LEDBIT<<1))));
//make the pin an output
PUT32(IO0DIR,GET32(IO0DIR)|(1<<LEDBIT));
PUT32(T0CR,2); //reset timer
PUT32(T0CR,0); //reset timer
PUT32(T0PR,(1000000-1)); //divide by 1 million
PUT32(T0CR,1); //enable timer
timeout=60*3; //10 seconds
lastcount=GET32(T0TC);
while(1)
{
PUT32(IO0SET,(1<<LEDBIT));
//not too fast if you are just jamming these in
PUT32(U0THR,0x31);
while(1)
{
nowcount=GET32(T0TC);
nowcount-=lastcount; //upcounter
if(nowcount>=timeout) break;
}
lastcount+=timeout;
PUT32(IO0CLR,(1<<LEDBIT));
//not too fast if you are just jamming these in
PUT32(U0THR,0x30);
while(1)
{
nowcount=GET32(T0TC);
nowcount-=lastcount; //upcounter
if(nowcount>=timeout) break;
}
lastcount+=timeout;
}
}
/*--------------------------------------------------------------------------------*
* Reads SWF to memory
*--------------------------------------------------------------------------------*/
int swf_ReadSWF2(reader_t* reader, SWF* swf)
{
char b[32];
int len;
int tc; /* tag counter */
TAG* t;
TAG t1;
reader_t zreader;
if(NULL == swf) return -1;
memset(swf, 0x00, sizeof(SWF));
len = reader->read(reader, b, 8);
if(len < 8) return -1;
if(b[0] != 'F' && b[0] != 'C') return -1;
if(b[1] != 'W') return -1;
if(b[2] != 'S') return -1;
swf->fileVersion = b[3];
swf->compressed = (b[0]=='C') ? 1 : 0;
swf->fileSize = GET32(&b[4]);
if(swf->compressed)
{
/* at first, we do not care about SWC */
return -1;
}
swf->compressed = 0;
reader_GetRect(reader, &swf->movieSize);
reader->read(reader, &swf->frameRate, 2);
swf->frameRate = LE_16_TO_NATIVE(swf->frameRate);
reader->read(reader, &swf->frameCount, 2);
swf->frameCount = LE_16_TO_NATIVE(swf->frameCount);
/* read tags and connect to list */
t1.next = 0;
t = &t1;
tc = 0;
while (t)
{
t = swf_ReadTag(reader, t);
if(NULL == t) break;
tc++;
if(t->id == ST_FILEATTRIBUTES)
{
swf->fileAttributes = swf_GetU32(t);
swf_ResetReadBits(t);
}
}
/*
printf("swf->frameCount:%d <--> tag count:%d\n", swf->frameCount, tc);
*/
swf->firstTag = t1.next;
if(t1.next)
t1.next->prev = NULL;
return reader->pos;
}
void raspi_okled_reset(doorid_t id) {
doors[id].status = DOOR_STATUS_BUSY;
uint32_t sel = GET32(GPFSEL1);
sel &= ~(0b111 << 18);
sel |= (0b001 << 18);
PUT32(GPFSEL1,sel);
doors[id].status = DOOR_STATUS_READY;
}
int disable_system_timer_interrupt(void)
{
Interrupt_IRQ_Disable1_Reg_t intrbasdisable;
intrbasdisable = (Interrupt_IRQ_Disable1_Reg_t) GET32(INTERRUPT_DISABLE_IRQ1);
intrbasdisable.mBits.irq1 = 1;
PUT32(INTERRUPT_DISABLE_IRQ1,intrbasdisable.mAsU32);
return 0;
}
void switch_init() {
// set GPIO1 as an input
unsigned int ra;
ra = GET32(GPFSEL1);
ra &= ~(7<<3);
ra |= 0 << 0;
PUT32(GPFSEL1, ra);
}
//------------------------------------------------------------------------
static unsigned int sda_read ( void )
{
unsigned int ra;
ra=GET32(IO0PIN);
ra&=(1<<SDA);
return(ra);
}
void stop_spi_transfer(void)
{
//Set TA = 0 and clear the fifo
volatile SPI_control_Reg_t spictrlreg;
spictrlreg = (SPI_control_Reg_t) GET32(SPI_CONTROL_STATUS_REGISTER);
spictrlreg.mAsU32 = 0x00000000;
PUT32(SPI_CONTROL_STATUS_REGISTER,spictrlreg.mAsU32);
}
//------------------------------------------------------------------------
void uart_send ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void uart_putc ( unsigned int c )
{
while(1)
{
if((GET32(UART0_FR)&0x20)==0) break;
}
PUT32(UART0_DR,c);
}
//------------------------------------------------------------------------
static void uart_send ( unsigned int x )
{
while(1)
{
if(GET32(UARTFR)&0x80) break;
}
PUT32(UARTDR,x);
}
void dowait ( void )
{
unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=GET32(TMR1)&0xFFFF;
for(ra=24414;ra;ra--)
{
while(1)
{
rc=GET32(TMR1)&0xFFFF;
if((rc-rb)>=0x4000) break;
}
rb=rc;
}
}
unsigned int gpio_pin_read(unsigned int pin) {
unsigned int reg = gpio_pin_to_input_register(pin);
system_memory_read_barrier();
unsigned int val = GET32(reg);
val = val >> gpio_pin_to_input_offset(pin);
val = val & 1;
return val;
}
void ClockInit ( void )
{
unsigned int ra;
//enable HSE
ra=GET32(RCC_CR);
ra&=~(0xF<<16);
PUT32(RCC_CR,ra);
ra|=1<<16;
PUT32(RCC_CR,ra);
while(1)
{
if(GET32(RCC_CR)&(1<<17)) break;
}
PUT32(RCC_CFGR,0x00009401); //PPRE2 /2 PPRE1 /4 sw=hse
//slow flash accesses down otherwise it will crash
PUT32(FLASH_ACR,0x00000105);
//8MHz HSE, 168MHz pllgen 48MHz pll usb
//Q 7 P 2 N 210 M 5 vcoin 1 pllvco 336 pllgen 168 pllusb 48
ra=(7<<24)|(1<<22)|(((2>>1)-1)<<16)|(210<<6)|(5<<0);
PUT32(RCC_PLLCFGR,ra);
// enable pll
ra=GET32(RCC_CR);
ra|=(1<<24);
PUT32(RCC_CR,ra);
//wait for pll lock
while(1)
{
if(GET32(RCC_CR)&(1<<25)) break;
}
//select pll
PUT32(RCC_CFGR,0x00009402); //PPRE2 /2 PPRE1 /4 sw=pllclk
//if you didnt set the flash wait states you may crash here
//wait for it to use the pll
while(1)
{
if((GET32(RCC_CFGR)&0xC)==0x8) break;
}
}
//------------------------------------------------------------------------
static void sda_input ( void )
{
unsigned int ra;
ra=GET32(IO0DIR);
ra&=~(1<<SDA);
PUT32(IO0DIR,ra);
}
void start_spi_transfer(void)
{
//Set the control register . Clear the fifo bits and set TA =1. Assumes chip select 0
volatile SPI_control_Reg_t spictrlreg;
spictrlreg = (SPI_control_Reg_t) GET32(SPI_CONTROL_STATUS_REGISTER);
spictrlreg.mAsU32 = 0x000000B0;
PUT32(SPI_CONTROL_STATUS_REGISTER,spictrlreg.mAsU32);
}
void set_DC_low_for_command(void)
{
//Clear GPI0 25.Sending a command
volatile GPIO_Output_Clear_Register0_t GPIOClearReg0;
GPIOClearReg0 = (GPIO_Output_Clear_Register0_t)GET32(GPIO_REG_GPCLR0);
GPIOClearReg0.mBits.ClearGPIO25 = 1;
PUT32(GPIO_REG_GPCLR0,GPIOClearReg0.mAsU32);
}
void spi_dma_disable_and_adcs(void)
{
volatile SPI_control_Reg_t spictrlreg;
spictrlreg = (SPI_control_Reg_t) GET32(SPI_CONTROL_STATUS_REGISTER);
spictrlreg.mBits.dma_enable = 0;
spictrlreg.mBits.auto_desel_cs =0;
PUT32(SPI_CONTROL_STATUS_REGISTER,spictrlreg.mAsU32);
}
void reboot() {
uint32_t pm_rstc,pm_wdog;
pm_rstc = GET32(PM_RSTC);
pm_wdog = PM_PASSWORD | (1 & PM_WDOG_TIME_SET); // watchdog timer = timer clock / 16; need password (31:16) + value (11:0)
pm_rstc = PM_PASSWORD | (pm_rstc & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET;
PUT32(PM_WDOG,pm_wdog);
PUT32(PM_RSTC,pm_rstc);
}
void set_DC_high_for_data(void)
{
//Set GPIO25
volatile GPIO_Output_Set_Register0_t GPIOsetReg0;
GPIOsetReg0 = (GPIO_Output_Set_Register0_t)GET32(GPIO_REG_GPSET0);
GPIOsetReg0.mBits.SetGPIO25 = 1;
PUT32(GPIO_REG_GPSET0,GPIOsetReg0.mAsU32);
}
//------------------------------------------------------------------------
int uart_init ( void )
{
unsigned int ra;
ra=GET32(RCC_AHBENR);
ra|=1<<17; //enable port A
PUT32(RCC_AHBENR,ra);
ra=GET32(RCC_APB2ENR);
ra|=1<<14; //enable USART1
PUT32(RCC_APB2ENR,ra);
//moder 10
ra=GET32(GPIOA_MODER);
ra&=~(3<<18); //PA9
ra&=~(3<<20); //PA10
ra|=2<<18; //PA9
ra|=2<<20; //PA10
PUT32(GPIOA_MODER,ra);
//OTYPER 0
ra=GET32(GPIOA_OTYPER);
ra&=~(1<<9); //PA9
ra&=~(1<<10); //PA10
PUT32(GPIOA_OTYPER,ra);
//ospeedr 11
ra=GET32(GPIOA_OSPEEDR);
ra|=3<<18; //PA9
ra|=3<<20; //PA10
PUT32(GPIOA_OSPEEDR,ra);
//pupdr 00
ra=GET32(GPIOA_PUPDR);
ra&=~(3<<18); //PA9
ra&=~(3<<20); //PA10
PUT32(GPIOA_PUPDR,ra);
//afr 0001
ra=GET32(GPIOA_AFRH);
ra&=~(0xF<<4); //PA9
ra&=~(0xF<<8); //PA10
ra|=0x1<<4; //PA9
ra|=0x1<<8; //PA10
PUT32(GPIOA_AFRH,ra);
ra=GET32(RCC_APB2RSTR);
ra|=1<<14; //reset USART1
PUT32(RCC_APB2RSTR,ra);
ra&=~(1<<14);
PUT32(RCC_APB2RSTR,ra);
PUT32(USART1_BRR,69);
PUT32(USART1_CR1,(1<<3)|(1<<2)|1);
return(0);
}
//------------------------------------------------------------------------
static void sda_output ( void )
{
unsigned int ra;
ra=GET32(IO0DIR);
ra|=1<<SDA;
PUT32(IO0DIR,ra);
}
/*
* audioixp_reset_port()
*
* Description:
* This routine resets the DMA engine pareparing it for work.
*
* Arguments:
* audioixp_port_t *port Port of DMA engine to reset.
*/
static void
audioixp_reset_port(audioixp_port_t *port)
{
audioixp_state_t *statep = port->statep;
ASSERT(mutex_owned(&statep->inst_lock));
/*
* XXX: reset counters.
*/
port->count = 0;
if (statep->suspended)
return;
/*
* Perform full reset of the engine, and enable its interrupts
* but leave it turned off.
*/
if (port->num == IXP_REC) {
PUT32(IXP_AUDIO_FIFO_FLUSH, IXP_AUDIO_FIFO_FLUSH_IN);
SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_INTER_IN);
SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_IN_DMA);
PUT32(IXP_AUDIO_IN_DMA_LINK_P,
port->bdl_paddr | IXP_AUDIO_IN_DMA_LINK_P_EN);
} else {
uint32_t slot = GET32(IXP_AUDIO_OUT_DMA_SLOT_EN_THRESHOLD);
PUT32(IXP_AUDIO_FIFO_FLUSH, IXP_AUDIO_FIFO_FLUSH_OUT);
/* clear all slots */
slot &= ~ (IXP_AUDIO_OUT_DMA_SLOT_3 |
IXP_AUDIO_OUT_DMA_SLOT_4 |
IXP_AUDIO_OUT_DMA_SLOT_5 |
IXP_AUDIO_OUT_DMA_SLOT_6 |
IXP_AUDIO_OUT_DMA_SLOT_7 |
IXP_AUDIO_OUT_DMA_SLOT_8 |
IXP_AUDIO_OUT_DMA_SLOT_9 |
IXP_AUDIO_OUT_DMA_SLOT_10 |
IXP_AUDIO_OUT_DMA_SLOT_11 |
IXP_AUDIO_OUT_DMA_SLOT_12);
/* enable 6 channel out, unconditional for now */
slot |= IXP_AUDIO_OUT_DMA_SLOT_3 |
IXP_AUDIO_OUT_DMA_SLOT_4 |
IXP_AUDIO_OUT_DMA_SLOT_6 |
IXP_AUDIO_OUT_DMA_SLOT_9 |
IXP_AUDIO_OUT_DMA_SLOT_7 |
IXP_AUDIO_OUT_DMA_SLOT_8;
PUT32(IXP_AUDIO_OUT_DMA_SLOT_EN_THRESHOLD, slot);
SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_INTER_OUT);
SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_OUT_DMA);
PUT32(IXP_AUDIO_OUT_DMA_LINK_P,
port->bdl_paddr | IXP_AUDIO_OUT_DMA_LINK_P_EN);
}
}
void notmain ( void )
{
unsigned int ra,rb,rc,rd,re,rf;
clock_init();
ra=GET32(GPIO_DIR1);
ra|=1<<8;
ra|=1<<9;
ra|=1<<10;
ra|=1<<11;
PUT32(GPIO_DIR1,ra);
PUT32(STCTRL,0x00000004); //disabled, no ints, use cpu clock
PUT32(STRELOAD,12000000-1);
PUT32(STCTRL,0x00000005); //enabled, no ints, use cpu clock
ra=GPIO_SET1;
rb=GPIO_CLR1;
rc=1<<8;
rd=1<<9;
re=1<<10;
rf=1<<11;
while(1)
{
PUT32(ra,rc);
PUT32(rb,rd);
PUT32(rb,re);
PUT32(rb,rf);
dowait();
PUT32(rb,rc);
PUT32(ra,rd);
PUT32(rb,re);
PUT32(rb,rf);
dowait();
PUT32(rb,rc);
PUT32(rb,rd);
PUT32(ra,re);
PUT32(rb,rf);
dowait();
PUT32(rb,rc);
PUT32(rb,rd);
PUT32(rb,re);
PUT32(ra,rf);
dowait();
PUT32(rb,rc);
PUT32(rb,rd);
PUT32(ra,re);
PUT32(rb,rf);
dowait();
PUT32(rb,rc);
PUT32(ra,rd);
PUT32(rb,re);
PUT32(rb,rf);
dowait();
}
}
static int
dns_parse_packet(struct dns_state *s, byte *p, unsigned int plen)
{
byte *end = p + plen;
unsigned int i, j, len;
unsigned int UNUSED x;
#if 0
/* Dump the packet */
for (i=0; i<plen; i++)
{
if (!(i%16)) printf("%04x:", i);
printf(" %02x", p[i]);
if ((i%16)==15 || i==plen-1) putchar('\n');
}
#endif
GET32(x); /* ID and flags are ignored */
for (i=0; i<DNS_NUM_SECTIONS; i++)
GET16(s->counts[i]);
for (i=0; i<DNS_NUM_SECTIONS; i++)
{
s->sections[i] = p;
for (j=0; j < s->counts[i]; j++)
{
p = dns_skip_name(p, end); /* Name */
if (!p)
goto err;
GET32(x); /* Type and class */
if (i != DNS_SEC_QUESTION)
{
GET32(x); /* TTL */
GET16(len); /* Length of data */
p += len;
if (p > end)
goto err;
}
}
}
s->sections[i] = p;
return 0;
err:
return -1;
}
uint32_t GPIO_getPort(GPIO_t port)
{
if(GPIO_checkValidPortPin(port,0)) // pin 0 always exist
{
uint32_t addr_temp = GPIO_BASE_ARRAY[port] + GPIO_DATAIN; // GPIOx base + data in offset, TRM 2.1 & 25.4.1.17
return GET32(addr_temp);
}
return -1;
}