void init_serial(unsigned int port, unsigned int baudRate)
{
GPIO_CFG5 = 0x15555555;
/* CWS: Disable interrupts */
UART_LCR = 0; // prepare to Init UART
UART_IER = 0x0; // Disable all UART interrupt
/* CWS: Set baud rate to baudRate bps */
UART_LCR|= DLAB; // prepare to access Divisor
UART_DLL = GET_LSB(baudRate);
UART_DLM = GET_MSB(baudRate);
UART_LCR&= ~DLAB; // prepare to access RBR, THR, IER
/* CWS: Set port for 8 bit, 1 stop, no parity */
UART_LCR = UART_8bit;
/* CWS: Set the RX FIFO trigger level, reset RX, TX FIFO*/
UART_FCR = rUART_FCR;
UART_TOR = 0x0 ;
}
/* Shift left - Shift Right - Shift arithmetic right */
void i8086ShlShrSar(i8086core *core, unsigned char opcode, i8086Parameter para, i8086Parameter data)
{
i8086SingleRegister sreg,clreg;
i808616BitAdr ea;
unsigned short disp,oldmsb,msb,shldata;
unsigned char wData,vData,destReg,shifts=1,shr=0,sar=0;
wData=opcode & i8086_BIT_0;//16 oder 8 Bit Operation
vData=opcode & i8086_BIT_1;//SHL/SHR um 1 oder um n bits
shr=para.b[0] & i8086_BIT_3; //soll ein SHR ausgefuehrt werden?
sar=para.b[0] & i8086_BIT_4; //soll ein SAR ausgefuehrt werden?
if(vData) //mehr als 1 shift
{
i8086GetRegisterRef(&clreg,core,0,i8086_REG_CL); //CL Register
shifts=clreg.b[0]; //anzahl der shifts
}
if((para.b[0] & i8086_BIT_7) && (para.b[0] & i8086_BIT_6)) //SHL/SHR REG
{
destReg=getBitSnipped(para.b[0], 2, 3);//nummer des Registers
i8086GetRegisterRef(&sreg,core,wData,destReg); //destination Register
if(wData)//16 Bit Operation
shldata=sreg.x;//zu shiftende daten
else
shldata=sreg.b[0];
}
else//SHL/SHR MEM
{
disp=joinBytes(para.b[1],para.b[2]);
ea=decodeMemAdr(core, para.b[0],disp); //Adresse berechnen
shldata=memRead(core,ea,wData,i8086_REG_DS);//zu shiftende daten
}
oldmsb=GET_MSB(shldata,wData);//nur für 1bit shift notwenidg
if(shifts) //shifts > 0
{
if(shr)//SHR oder SAR
{
if(sar)
shldata=((signed short)shldata)>>(shifts-1);//bis shifts-1 arithmetisch shiften
else
shldata=shldata>>(shifts-1);//bis shifts-1 shiften
}
else//SHL
