/* Handle the MTRAP insn. */ void frv_mtrap (SIM_CPU *current_cpu) { SIM_DESC sd = CPU_STATE (current_cpu); /* Check the status of media exceptions in MSR0. */ SI msr = GET_MSR (0); if (GET_MSR_AOVF (msr) || GET_MSR_MTT (msr) && STATE_ARCHITECTURE (sd)->mach != bfd_mach_fr550) frv_queue_program_interrupt (current_cpu, FRV_MP_EXCEPTION); }
/* Record state for media exception. */ void frv_set_mp_exception_registers ( SIM_CPU *current_cpu, enum frv_msr_mtt mtt, int sie ) { /* Record the interrupt factor in MSR0. */ SI msr0 = GET_MSR (0); if (GET_MSR_MTT (msr0) == MTT_NONE) SET_MSR_MTT (msr0, mtt); /* Also set the OVF bit in the appropriate MSR as well as MSR0.AOVF. */ if (mtt == MTT_OVERFLOW) { FRV_VLIW *vliw = CPU_VLIW (current_cpu); int slot = vliw->next_slot - 1; SIM_DESC sd = CPU_STATE (current_cpu); /* If this insn is in the M2 slot, then set MSR1.OVF and MSR1.SIE, otherwise set MSR0.OVF and MSR0.SIE. */ if (STATE_ARCHITECTURE (sd)->mach != bfd_mach_fr550 && (*vliw->current_vliw)[slot] == UNIT_FM1) { SI msr = GET_MSR (1); OR_MSR_SIE (msr, sie); SET_MSR_OVF (msr); SET_MSR (1, msr); } else { OR_MSR_SIE (msr0, sie); SET_MSR_OVF (msr0); } /* Generate the interrupt now if MSR0.MPEM is set on fr550 */ if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr550 && GET_MSR_MPEM (msr0)) frv_queue_program_interrupt (current_cpu, FRV_MP_EXCEPTION); else { /* Regardless of the slot, set MSR0.AOVF. */ SET_MSR_AOVF (msr0); } } SET_MSR (0, msr0); }