static void SET_RGMII(int type, int tx_delay, int rx_delay)
{
if (type == RK3288_GMAC) {
grf_writel(GMAC_PHY_INTF_SEL_RGMII, RK3288_GRF_SOC_CON1);
grf_writel(GMAC_RMII_MODE_CLR, RK3288_GRF_SOC_CON1);
grf_writel(GMAC_RXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
grf_writel(GMAC_TXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
grf_writel(GMAC_CLK_RX_DL_CFG(rx_delay), RK3288_GRF_SOC_CON3);
grf_writel(GMAC_CLK_TX_DL_CFG(tx_delay), RK3288_GRF_SOC_CON3);
pr_info("tx delay=0x%x\nrx delay=0x%x\n", tx_delay, rx_delay);
//grf_writel(0xffffffff,RK3288_GRF_GPIO3D_E);
//grf_writel(grf_readl(RK3288_GRF_GPIO4B_E) | 0x3<<2<<16 | 0x3<<2, RK3288_GRF_GPIO4B_E);
//grf_writel(0xffffffff,RK3288_GRF_GPIO4A_E);
} else if (type == RK312X_GMAC) {
#if 0
grf_writel(GMAC_PHY_INTF_SEL_RGMII, RK312X_GRF_MAC_CON1);
grf_writel(GMAC_RMII_MODE_CLR, RK312X_GRF_MAC_CON1);
grf_writel(GMAC_RXCLK_DLY_ENABLE, RK312X_GRF_MAC_CON0);
grf_writel(GMAC_TXCLK_DLY_ENABLE, RK312X_GRF_MAC_CON0);
grf_writel(GMAC_CLK_RX_DL_CFG(rx_delay), RK312X_GRF_MAC_CON0);
grf_writel(GMAC_CLK_TX_DL_CFG(tx_delay), RK312X_GRF_MAC_CON0);
pr_info("tx delay=0x%x\nrx delay=0x%x\n", tx_delay, rx_delay);
#endif
}
}
static void set_to_rgmii(struct rk_priv_data *bsp_priv,
int tx_delay, int rx_delay)
{
struct device *dev = &bsp_priv->pdev->dev;
if (IS_ERR(bsp_priv->grf)) {
dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);
return;
}
regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
GMAC_PHY_INTF_SEL_RGMII | GMAC_RMII_MODE_CLR);
regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON3,
GMAC_RXCLK_DLY_ENABLE | GMAC_TXCLK_DLY_ENABLE |
GMAC_CLK_RX_DL_CFG(rx_delay) |
GMAC_CLK_TX_DL_CFG(tx_delay));
}
int stmmc_pltfr_init(struct platform_device *pdev) {
struct pinctrl_state *gmac_state;
int phy_iface;
int err;
printk("enter func %s...\n", __func__);
//iomux
#if 0
if ((pdev->dev.pins) && (pdev->dev.pins->p)) {
gmac_state = pinctrl_lookup_state(pdev->dev.pins->p, "default");
if (IS_ERR(gmac_state)) {
dev_err(&pdev->dev, "no gmc pinctrl state\n");
return -1;
}
pinctrl_select_state(pdev->dev.pins->p, gmac_state);
}
#endif
struct bsp_priv * bsp_priv = &g_bsp_priv;
phy_iface = bsp_priv->phy_iface;
//power
if (!gpio_is_valid(bsp_priv->power_io)) {
printk("%s: ERROR: Get power-gpio failed.\n", __func__);
//return -EINVAL;
}
err = gpio_request(bsp_priv->power_io, "gmac_phy_power");
if (err) {
printk("%s: ERROR: Request gmac phy power pin failed.\n", __func__);
//return -EINVAL;
}
if (!gpio_is_valid(bsp_priv->reset_io)) {
printk("%s: ERROR: Get reset-gpio failed.\n", __func__);
//return -EINVAL;
}
err = gpio_request(bsp_priv->reset_io, "gmac_phy_reset");
if (err) {
printk("%s: ERROR: Request gmac phy reset pin failed.\n", __func__);
//return -EINVAL;
}
//rmii or rgmii
if (phy_iface & PHY_INTERFACE_MODE_RGMII) {
printk("init for RGMII\n");
grf_writel(GMAC_PHY_INTF_SEL_RGMII, RK3288_GRF_SOC_CON1);
grf_writel(GMAC_RMII_MODE_CLR, RK3288_GRF_SOC_CON1);
grf_writel(GMAC_RXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
grf_writel(GMAC_TXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
grf_writel(GMAC_CLK_RX_DL_CFG(0x10), RK3288_GRF_SOC_CON3);
grf_writel(GMAC_CLK_TX_DL_CFG(0x40), RK3288_GRF_SOC_CON3);
} else if (phy_iface & PHY_INTERFACE_MODE_RMII) {
printk("init for RMII\n");
grf_writel(GMAC_PHY_INTF_SEL_RMII, RK3288_GRF_SOC_CON1);
grf_writel(GMAC_RMII_MODE, RK3288_GRF_SOC_CON1);
} else {
printk("ERROR: NO interface defined!\n");
}
return 0;
}
