int DigitalOutputPin::Status()
{
int ret = 0;
switch( GPIOPorts[ (int)pin ] )
{
case PortA:
{
ret = GPIOA_PDOR & GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortB:
{
ret = GPIOB_PDOR & GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortC:
{
ret = GPIOC_PDOR & GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortD:
{
ret = GPIOD_PDOR & GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortE:
{
ret = GPIOE_PDOR & GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
}
return ret;
}
void LCD_WrDat(u8 data)
{
u8 i=8;
//LCD_CS=0;;
// GPIOC_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(15));;;;
GPIOA_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(16));;;;
asm("nop");
// GPIOC_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(12));;;;
GPIOE_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(25));;;;
asm("nop");
while(i--)
{
// if(data&0x80){GPIOC_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(13));;;;}
if(data&0x80){GPIOE_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(24));;;;}
// else{GPIOC_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(13));;;;}
else{GPIOE_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(24));;;;}
// GPIOC_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(12));
GPIOE_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(25));
asm("nop");;;;
//asm("nop");
// GPIOC_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(12));;;;;
GPIOE_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(25));;;;;
data<<=1;
}
//LCD_CS=1;
}
void DigitalOutputPin::Toggle()
{
switch( GPIOPorts[ (int)pin ] )
{
case PortA:
{
GPIOA_PTOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortB:
{
GPIOB_PTOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortC:
{
GPIOC_PTOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortD:
{
GPIOD_PTOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortE:
{
GPIOE_PTOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
}
}
void LCD_WrCmd(u8 cmd)
{
u8 i=8;
//LCD_CS=0;;
// GPIOC_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(15));;;;;
// GPIOC_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(12));;;;;
GPIOA_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(16));;;;;
GPIOE_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(25));;;;;
//asm("nop");
while(i--)
{
// if(cmd&0x80){GPIOC_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(13));;;;;}
if(cmd&0x80){GPIOE_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(24));;;;;}
// else{GPIOC_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(13));;;;;;}
else{GPIOE_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(24));;;;;;}
// GPIOC_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(12));;;;;
GPIOE_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(25));;;;;
asm("nop");;;;
//asm("nop");
// GPIOC_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(12));;;;;
GPIOE_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(25));;;;;
cmd<<=1;;;;;
}
//LCD_CS=1;
}
/*---------------------------------------------------------------------------*/
void
leds_arch_init(void)
{
/**
* Initialize blue led
*/
/* Configure pin as output */
GPIOD_PDDR |= GPIO_PDDR_PDD(0x02);
/* Set initialization value */
GPIOD_PDOR &= (uint32_t)~(uint32_t)(GPIO_PDOR_PDO(0x02));
/* Initialization of Port Control register */
PORTD_PCR1 = (uint32_t)((PORTD_PCR1 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
/**
* Initialize green led
*/
/* Configure pin as output */
GPIOB_PDDR |= GPIO_PDDR_PDD(0x00080000);
/* Set initialization value */
GPIOB_PDOR &= (uint32_t)~(uint32_t)(GPIO_PDOR_PDO(0x00080000));
/* Initialization of Port Control register */
PORTB_PCR19 = (uint32_t)((PORTB_PCR19 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
/**
* Initialize red led
*/
/* Configure pin as output */
GPIOB_PDDR |= GPIO_PDDR_PDD(0x00040000);
/* Set initialization value */
GPIOB_PDOR &= (uint32_t)~(uint32_t)(GPIO_PDOR_PDO(0x00040000));
/* Initialization of Port Control register */
PORTB_PCR18 = (uint32_t)((PORTB_PCR18 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
}
/* ===================================================================*/
LDD_TDeviceData* LEDRed_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate LDD device structure */
LEDRed_TDeviceData *DeviceDataPrv;
/* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
/* Save RTOS Device structure */
DeviceDataPrv->UserData = UserDataPtr; /* Store the RTOS device structure */
/* Enable device clock gate */
/* SIM_SCGC5: PORTC=1 */
SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK;
/* GPIOC_PDOR: PDO|=0x0200 */
GPIOC_PDOR |= GPIO_PDOR_PDO(0x0200);
/* GPIOC_PDDR: PDD|=0x0200 */
GPIOC_PDDR |= GPIO_PDDR_PDD(0x0200);
/* Initialization of pin routing */
/* PORTC_PCR9: ISF=0,MUX=1 */
PORTC_PCR9 = (uint32_t)((PORTC_PCR9 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_LEDRed_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
/* ===================================================================*/
LDD_TDeviceData* TraccionTrasera_Direccion_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
TraccionTrasera_Direccion_TDeviceDataPtr DeviceDataPrv;
/* {FreeRTOS RTOS Adapter} Driver memory allocation: RTOS function call is defined by FreeRTOS RTOS Adapter property */
DeviceDataPrv = (TraccionTrasera_Direccion_TDeviceData *)pvPortMalloc(sizeof(TraccionTrasera_Direccion_TDeviceData));
#if FreeRTOS_CHECK_MEMORY_ALLOCATION_ERRORS
if (DeviceDataPrv == NULL) {
return (NULL);
}
#endif
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Configure pin as output */
/* GPIOE_PDDR: PDD|=8 */
GPIOE_PDDR |= GPIO_PDDR_PDD(0x08);
/* Set initialization value */
/* GPIOE_PDOR: PDO&=~8 */
GPIOE_PDOR &= (uint32_t)~(uint32_t)(GPIO_PDOR_PDO(0x08));
/* Initialization of Port Control register */
/* PORTE_PCR3: ISF=0,MUX=1 */
PORTE_PCR3 = (uint32_t)((PORTE_PCR3 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_TraccionTrasera_Direccion_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
/* ===================================================================*/
LDD_TDeviceData* BitIoLdd4_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
BitIoLdd4_TDeviceDataPtr DeviceDataPrv;
/* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Enable device clock gate */
/* SIM_SCGC5: PORTD=1 */
SIM_SCGC5 |= SIM_SCGC5_PORTD_MASK;
/* Configure pin as output */
/* GPIOD_PDDR: PDD|=8 */
GPIOD_PDDR |= GPIO_PDDR_PDD(0x08);
/* Set initialization value */
/* GPIOD_PDOR: PDO&=~8 */
GPIOD_PDOR &= (uint32_t)~(uint32_t)(GPIO_PDOR_PDO(0x08));
/* Initialization of pin routing */
/* PORTD_PCR3: ISF=0,MUX=1 */
PORTD_PCR3 = (uint32_t)((PORTD_PCR3 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_BitIoLdd4_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
/* ===================================================================*/
LDD_TDeviceData* GPIO2_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate LDD device structure */
GPIO2_TDeviceData *DeviceDataPrv;
/* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
/* Save RTOS Device structure */
DeviceDataPrv->UserData = UserDataPtr; /* Store the RTOS device structure */
/* GPIOE_PDOR: PDO|=0x000C0000 */
GPIOE_PDOR |= GPIO_PDOR_PDO(0x000C0000);
/* GPIOE_PDDR: PDD|=0x000C0000 */
GPIOE_PDDR |= GPIO_PDDR_PDD(0x000C0000);
/* Initialization of Port Control registers */
/* PORTE_PCR18: ISF=0,MUX=1 */
PORTE_PCR18 = (uint32_t)((PORTE_PCR18 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
/* PORTE_PCR19: ISF=0,MUX=1 */
PORTE_PCR19 = (uint32_t)((PORTE_PCR19 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_GPIO2_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
/* ===================================================================*/
LDD_TDeviceData* BitIoLdd2_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
BitIoLdd2_TDeviceDataPtr DeviceDataPrv;
/* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Configure pin as output */
/* GPIOB_PDDR: PDD|=0x0200 */
GPIOB_PDDR |= GPIO_PDDR_PDD(0x0200);
/* Set initialization value */
/* GPIOB_PDOR: PDO&=~0x0200 */
GPIOB_PDOR &= (uint32_t)~(uint32_t)(GPIO_PDOR_PDO(0x0200));
/* Initialization of Port Control register */
/* PORTB_PCR9: ISF=0,MUX=1 */
PORTB_PCR9 = (uint32_t)((PORTB_PCR9 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_BitIoLdd2_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
void cam_start() {
// call pwm driver to start camera clock (CLK) for a 5% duty cycle
FTM2_CNT = 0;
FTM2_C0V = 45;
// set cam flag
cam_flag = EXEC_FLAG_UP;
// set SI pulse high
GPIOA_PSOR |= GPIO_PDOR_PDO(GPIO_PIN(14));
// enable interrupt
enable_irq(64);
}
unsigned portBASE_TYPE uxParTestGetLED( unsigned portBASE_TYPE uxLED )
{
unsigned portBASE_TYPE uxReturn = pdFALSE;
if( uxLED < partstNUM_LEDs )
{
portENTER_CRITICAL();
{
uxReturn = !(GPIOA_PDOR & GPIO_PDOR_PDO(GPIO_PIN(10)));
}
portEXIT_CRITICAL();
}
return uxReturn;
}
/* ===================================================================*/
LDD_TDeviceData* GPIO1_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate LDD device structure */
GPIO1_TDeviceData *DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
/* Save RTOS Device structure */
DeviceDataPrv->UserData = UserDataPtr; /* Store the RTOS device structure */
/* GPIOB_PDOR: PDO&=~0x00200000 */
GPIOB_PDOR &= (uint32_t)~(uint32_t)(GPIO_PDOR_PDO(0x00200000));
/* GPIOB_PDDR: PDD|=0x00200000 */
GPIOB_PDDR |= GPIO_PDDR_PDD(0x00200000);
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_GPIO1_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
/* ===================================================================*/
LDD_TDeviceData* BitIO_UPRDY_Init(LDD_TUserData *UserDataPtr)
{
/* Configure pin as output */
/* GPIOE_PDDR: PDD|=0x20000000 */
GPIOE_PDDR |= GPIO_PDDR_PDD(0x20000000);
/* Set initialization value */
/* GPIOE_PDOR: PDO|=0x20000000 */
GPIOE_PDOR |= GPIO_PDOR_PDO(0x20000000);
/* Initialization of Port Control register */
/* PORTE_PCR29: ISF=0,MUX=1 */
PORTE_PCR29 = (uint32_t)((PORTE_PCR29 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x06)
)) | (uint32_t)(
PORT_PCR_MUX(0x01)
));
return ERR_OK;
}
/* ===================================================================*/
LDD_TDeviceData* MB_DTR_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
MB_DTR_TDeviceDataPtr DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Configure pin as output */
/* GPIOA_PDDR: PDD|=0x20000000 */
GPIOA_PDDR |= GPIO_PDDR_PDD(0x20000000);
/* Set initialization value */
/* GPIOA_PDOR: PDO&=~0x20000000 */
GPIOA_PDOR &= (uint32_t)~(uint32_t)(GPIO_PDOR_PDO(0x20000000));
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_MB_DTR_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv);
}
void cam_isr() {
// clear interrupt flag
FTM2_C0SC;
FTM2_C0SC &= ~(0x80u);
// send SI low
GPIOA_PCOR |= GPIO_PDOR_PDO(GPIO_PIN(14));
// run ADC on data input for 128 pixels
if (cam_clockCounter < 128) {
cam_clockCounter++;
adc_start();
} else {
// disable interrupt
disable_irq(64);
cam_clockCounter = 0;
FTM2_C0V = 0;
cam_flag = EXEC_FLAG_DOWN;
}
}
void DigitalOutputPin::Write( bool value )
{
switch( value )
{
case true:
{
switch( GPIOPorts[ (int)pin ] )
{
case PortA:
{
GPIOA_PDOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortB:
{
GPIOB_PDOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortC:
{
GPIOC_PDOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortD:
{
GPIOD_PDOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortE:
{
GPIOE_PDOR |= GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
}
break;
}
case false:
{
switch( GPIOPorts[ (int)pin ] )
{
case PortA:
{
GPIOA_PDOR &= ~GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortB:
{
GPIOB_PDOR &= ~GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortC:
{
GPIOC_PDOR &= ~GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortD:
{
GPIOD_PDOR &= ~GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
case PortE:
{
GPIOE_PDOR &= ~GPIO_PDOR_PDO( GPIO_PIN( GPIOPinNumbers[ (int)pin ] ) );
break;
}
}
}
}
}
/*********************************************************
* Name: SPI_CS_assert
* Desc: Change SPI_CS pin state
* Parameter: expected state
* Return: None
**********************************************************/
void SPI_CS_assert(uint_8 state)
{
/*Body*/
GPIOE_PDDR |= GPIO_PDDR_PDD(4);
GPIOE_PDOR |= GPIO_PDOR_PDO(state);
}/*EndBody*/
void LCD_Init_Oled(void)
{
//设置PORTA pin14,pin15为GPIO口
// PORTC_PCR12=(0|PORT_PCR_MUX(1));
// PORTC_PCR13=(0|PORT_PCR_MUX(1));
// PORTC_PCR14=(0|PORT_PCR_MUX(1));
// PORTC_PCR15=(0|PORT_PCR_MUX(1));
PORTE_PCR24=(0|PORT_PCR_MUX(1));
PORTA_PCR14=(0|PORT_PCR_MUX(1));
PORTE_PCR25=(0|PORT_PCR_MUX(1));
PORTA_PCR16=(0|PORT_PCR_MUX(1));
//设置PORTA pin14,pin15为输出方向;pin16,pin17为输入方向
// GPIOC_PDDR=GPIO_PDDR_PDD(GPIO_PIN(12)|GPIO_PIN(13)|GPIO_PIN(14)|GPIO_PIN(15));
GPIOA_PDDR=GPIO_PDDR_PDD(GPIO_PIN(14)|GPIO_PIN(16));
GPIOE_PDDR=GPIO_PDDR_PDD(GPIO_PIN(24)|GPIO_PIN(25));
// GPIOC_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(12));
// //LCD_CS=1; //预制SLK和SS为高电平
//
// GPIOC_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(14));
// LCD_DLY_ms(50);
// GPIOC_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(14));
GPIOE_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(25));
//LCD_CS=1; //预制SLK和SS为高电平
GPIOA_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(14));
LCD_DLY_ms(50);
GPIOA_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(14));
LCD_WrCmd(0xae);//--turn off oled panel
LCD_WrCmd(0x00);//---set low column address
LCD_WrCmd(0x10);//---set high column address
LCD_WrCmd(0x40);//--set start line address Set Mapping RAM Display Start Line (0x00~0x3F)
LCD_WrCmd(0x81);//--set contrast control register
LCD_WrCmd(0xcf); // Set SEG Output Current Brightness
LCD_WrCmd(0xa1);//--Set SEG/Column Mapping 0xa0左右反置 0xa1正常
LCD_WrCmd(0xc8);//Set COM/Row Scan Direction 0xc0上下反置 0xc8正常
LCD_WrCmd(0xa6);//--set normal display
LCD_WrCmd(0xa8);//--set multiplex ratio(1 to 64)
LCD_WrCmd(0x3f);//--1/64 duty
LCD_WrCmd(0xd3);//-set display offset Shift Mapping RAM Counter (0x00~0x3F)
LCD_WrCmd(0x00);//-not offset
LCD_WrCmd(0xd5);//--set display clock divide ratio/oscillator frequency
LCD_WrCmd(0x80);//--set divide ratio, Set Clock as 100 Frames/Sec
LCD_WrCmd(0xd9);//--set pre-charge period
LCD_WrCmd(0xf1);//Set Pre-Charge as 15 Clocks & Discharge as 1 Clock
LCD_WrCmd(0xda);//--set com pins hardware configuration
LCD_WrCmd(0x12);
LCD_WrCmd(0xdb);//--set vcomh
LCD_WrCmd(0x40);//Set VCOM Deselect Level
LCD_WrCmd(0x20);//-Set Page Addressing Mode (0x00/0x01/0x02)
LCD_WrCmd(0x02);//
LCD_WrCmd(0x8d);//--set Charge Pump enable/disable
LCD_WrCmd(0x14);//--set(0x10) disable
LCD_WrCmd(0xa4);// Disable Entire Display On (0xa4/0xa5)
LCD_WrCmd(0xa6);// Disable Inverse Display On (0xa6/a7)
LCD_WrCmd(0xaf);//--turn on oled panel
LCD_Fill(0x00); //初始清屏
LCD_Set_Pos(0,0);
}
