BSTR CHardInfoActiveXCtrl::getCpuId()
{
AFX_MANAGE_STATE(AfxGetStaticModuleState());
CString strResult;
// TODO: 在此添加调度处理程序代码
char value[512];
int len = sizeof(value);
memset(value, '\0', len);
bool bRet = false;
bRet = GetCpuId(value, len);
if (bRet)
{
strResult = value;
}
else
{
strResult = "";
}
return strResult.AllocSysString();
}
/*++
Routine Description:
Clock interrupt handler for processor 0.
Arguments:
Interrupt
ServiceContext
TrapFrame
Return Value:
TRUE
--*/
BOOLEAN
HalpHandleDecrementerInterrupt(
IN PKINTERRUPT Interrupt,
IN PVOID ServiceContext,
IN PVOID TrapFrame
)
{
KIRQL OldIrql;
static int recurse = FALSE;
ULONG CpuId;
HASSERT(!MSR(EE));
CpuId = GetCpuId();
//
// Raise irql via updating the PCR
//
OldIrql = PCR->CurrentIrql;
PCR->CurrentIrql = CLOCK2_LEVEL;
RInterruptMask(CpuId) = (Irql2Mask[CLOCK2_LEVEL] & registeredInts[CpuId]);
WaitForRInterruptMask(CpuId);
//
// Reset DECREMENTER, accounting for interrupt latency.
//
HalpUpdateDecrementer(HalpClockCount);
//
// Call the kernel to update system time
//
KeUpdateSystemTime(TrapFrame,HalpCurrentTimeIncrement);
HalpCurrentTimeIncrement = HalpNewTimeIncrement;
if (!recurse) {
//
// In some circumstances the KdPollBreakIn can
// take longer than a decrementer interrupt
// to complete. This is do to a conflict
// between DMA and PIO. For now, just avoid
// recursing into the debugger check.
//
recurse = TRUE;
if (KdDebuggerEnabled && KdPollBreakIn()) {
HalpEnableInterrupts();
DbgBreakPointWithStatus(DBG_STATUS_CONTROL_C);
HalpDisableInterrupts();
}
recurse = FALSE;
}
//
// Lower Irql to original value and enable interrupts
//
PCR->CurrentIrql = OldIrql;
RInterruptMask(CpuId) = (Irql2Mask[OldIrql] & registeredInts[CpuId]);
WaitForRInterruptMask(CpuId);
return (TRUE);
}
/*++
Routine Description:
This routine aknowledges an interprocessor interrupt on a set of
processors.
Arguments:
None
Return Value:
TRUE if the IPI is valid; otherwise FALSE is returned.
--*/
BOOLEAN
HalAcknowledgeIpi (VOID)
{
//
// Use this call to clear the interrupt from the Req register
//
rCPUMessageInterrupt = (ULONG)(1 << GetCpuId());
FireSyncRegister();
return (TRUE);
}
/*++
Routine Description:
Clock interrupt handler for processors other than 0.
Arguments:
Interrupt
ServiceContext
TrapFrame
Return Value:
TRUE
--*/
BOOLEAN
HalpHandleDecrementerInterrupt1(
IN PKINTERRUPT Interrupt,
IN PVOID ServiceContext,
IN PVOID TrapFrame
)
{
KIRQL OldIrql;
ULONG CpuId;
HASSERT(!MSR(EE));
CpuId = GetCpuId();
//
// Raise irql via updating the PCR
//
OldIrql = PCR->CurrentIrql;
PCR->CurrentIrql = CLOCK2_LEVEL;
RInterruptMask(CpuId) = (Irql2Mask[CLOCK2_LEVEL] & registeredInts[CpuId]);
WaitForRInterruptMask(CpuId);
//
// Reset DECREMENTER (no account for latency)
//
HalpUpdateDecrementer(HalpFullTickClockCount);
//
// Call the kernel to update run time for this thread and process.
//
KeUpdateRunTime(TrapFrame);
HDBG(DBG_PROC1DBG,
{
//
// Check for the debugger BreakIn only every minute or so.
// (decrementer is interms of ms so we multiple by 10,000
// on the order of a minute).
//
static Count = 0;
if (++Count > 10000) {
Count = 0;
if (KdDebuggerEnabled && KdPollBreakIn()) {
HalpEnableInterrupts();
DbgBreakPointWithStatus(DBG_STATUS_CONTROL_C);
HalpDisableInterrupts();
}
}
}
);
//
// VOID
// KeLowerIrql (
// KIRQL NewIrql
// )
//
// Routine Description:
//
// This function lowers the current IRQL to the specified value.
//
// Arguments:
//
// NewIrql - Supplies the new IRQL value.
//
// Return Value:
//
// None.
//
//--
VOID
KeLowerIrql(KIRQL NewIrql)
{
KIRQL OldIrql;
UCHAR CpuId;
//
// All accesses to the PCR should be guarded by disabling interrupts
// in the CPU (MSR register).
//
HalpDisableInterrupts();
CpuId = (UCHAR)GetCpuId();
//
// We should no be raising our Irql with lower.
//
HASSERTEXEC(NewIrql <= PCR->CurrentIrql,
HalpDebugPrint("KeLowerIrql: New (0x%x) Current(0x%x)\n",
NewIrql, PCR->CurrentIrql));
//
// Switch to the new Irql.
//
OldIrql = PCR->CurrentIrql;
PCR->CurrentIrql = NewIrql;
//
// Now make the coresponding hardware mask changes.
//
RInterruptMask(CpuId) = (Irql2Mask[NewIrql] & registeredInts[CpuId]);
WaitForRInterruptMask(CpuId);
if (NewIrql < CLOCK2_LEVEL) {
HalpEnableInterrupts();
//
// check for DPC's
//
if ((NewIrql < DISPATCH_LEVEL) && PCR->SoftwareInterrupt) {
KiDispatchSoftwareInterrupt();
}
}
}
VOID
KeRaiseIrql(IN KIRQL NewIrql, OUT PKIRQL OldIrql)
{
UCHAR CpuId;
//
// All accesses to the PCR should be guarded by disabling interrupts
// in the CPU (MSR register).
//
HalpDisableInterrupts();
CpuId = (UCHAR)GetCpuId();
//
// We should not be raising to a lower level.
//
HASSERTEXEC(NewIrql >= PCR->CurrentIrql,
HalpDebugPrint("KeRaiseIrql: New (0x%x) Current(0x%x)\n",
NewIrql, PCR->CurrentIrql));
//
// Switch to the new Irql.
//
*OldIrql = PCR->CurrentIrql;
PCR->CurrentIrql = NewIrql;
//
// Now make the corresponding hardware mask changes.
//
RInterruptMask(CpuId) = (Irql2Mask[NewIrql] & registeredInts[CpuId]);
WaitForRInterruptMask(CpuId);
if (NewIrql < CLOCK2_LEVEL) {
HalpEnableInterrupts();
}
}
