static int ni_tio_cmd_setup(struct ni_gpct *counter, comedi_async * async)
{
comedi_cmd *cmd = &async->cmd;
int set_gate_source = 0;
unsigned gate_source;
int retval = 0;
if (cmd->scan_begin_src == TRIG_EXT) {
set_gate_source = 1;
gate_source = cmd->scan_begin_arg;
} else if (cmd->convert_src == TRIG_EXT) {
set_gate_source = 1;
gate_source = cmd->convert_arg;
}
if (set_gate_source) {
retval = ni_tio_set_gate_src(counter, 0, gate_source);
}
if (cmd->flags & TRIG_WAKE_EOS) {
ni_tio_set_bits(counter,
NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index),
Gi_Gate_Interrupt_Enable_Bit(counter->counter_index),
Gi_Gate_Interrupt_Enable_Bit(counter->counter_index));
}
return retval;
}
int ni_tio_cancel(struct ni_gpct *counter)
{
unsigned cidx = counter->counter_index;
unsigned long flags;
ni_tio_arm(counter, 0, 0);
spin_lock_irqsave(&counter->lock, flags);
if (counter->mite_chan)
mite_dma_disarm(counter->mite_chan);
spin_unlock_irqrestore(&counter->lock, flags);
ni_tio_configure_dma(counter, 0, 0);
ni_tio_set_bits(counter, NITIO_INT_ENA_REG(cidx),
Gi_Gate_Interrupt_Enable_Bit(cidx), 0x0);
return 0;
}
int ni_tio_cancel(struct ni_gpct *counter)
{
unsigned long flags;
ni_tio_arm(counter, 0, 0);
comedi_spin_lock_irqsave(&counter->lock, flags);
if (counter->mite_chan) {
mite_dma_disarm(counter->mite_chan);
}
comedi_spin_unlock_irqrestore(&counter->lock, flags);
ni_tio_configure_dma(counter, 0, 0);
ni_tio_set_bits(counter,
NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index),
Gi_Gate_Interrupt_Enable_Bit(counter->counter_index), 0x0);
return 0;
}