void IoPortInit(void)
{
//Debug LED pin
GpioPinSetHigh(DEBUG_LED_PORT, DEBUG_LED1);
GpioPinSetHigh(DEBUG_LED_PORT, DEBUG_LED2);
GpioPinConfigSet(DEBUG_LED_PORT, DEBUG_LED1, GPIO_CFG_OUTPUT);
GpioPinConfigSet(DEBUG_LED_PORT, DEBUG_LED2, GPIO_CFG_OUTPUT);
//Config Pin
GpioPinSetHigh(AVRPORTF, IO_CONFIG0);
GpioPinSetHigh(AVRPORTF, IO_CONFIG1);
GpioPinConfigSet(AVRPORTF, IO_CONFIG0, GPIO_CFG_PULLUP);
GpioPinConfigSet(AVRPORTF, IO_CONFIG1, GPIO_CFG_PULLUP);
}
/*!
* \brief Set the specified chip select to a given level.
*/
static int Stm32SpiChipSelect(uint_fast8_t cs, uint_fast8_t hi)
{
/* Fixme: Check for cs != 0 */
GpioPinConfigSet(SPIBUS_CS_PORT, SPIBUS_CS_PIN, GPIO_CFG_OUTPUT);
GpioPinSet(SPIBUS_CS_PORT, SPIBUS_CS_PIN, hi);
return 0;
}
/*!
* \brief Set the specified chip select to a given level.
*/
static GSPIREG *GpioSpi0ChipSelect(uint_fast8_t cs, uint_fast8_t hi)
{
GSPIREG *rc;
switch (cs) {
case 0:
/* If CS0 is undefined, we assume permanent selection. */
#if defined(SBBI0_CS0_BIT)
GpioPinSet(SBBI0_CS0_PORT, SBBI0_CS0_BIT, hi);
GpioPinConfigSet(SBBI0_CS0_PORT, SBBI0_CS0_BIT, GPIO_CFG_OUTPUT);
#endif
rc = &gspi_reg0;
break;
#if defined(SBBI0_CS1_BIT)
case 1:
GpioPinSet(SBBI0_CS1_PORT, SBBI0_CS1_BIT, hi);
GpioPinConfigSet(SBBI0_CS1_PORT, SBBI0_CS1_BIT, GPIO_CFG_OUTPUT);
rc = &gspi_reg1;
break;
#endif
#if defined(SBBI0_CS2_BIT)
case 2:
GpioPinSet(SBBI0_CS2_PORT, SBBI0_CS2_BIT, hi);
GpioPinConfigSet(SBBI0_CS2_PORT, SBBI0_CS2_BIT, GPIO_CFG_OUTPUT);
rc = &gspi_reg2;
break;
#endif
#if defined(SBBI0_CS3_BIT)
case 3:
GpioPinSet(SBBI0_CS3_PORT, SBBI0_CS3_BIT, hi);
GpioPinConfigSet(SBBI0_CS3_PORT, SBBI0_CS3_BIT, GPIO_CFG_OUTPUT);
rc = &gspi_reg3;
break;
#endif
default:
errno = EIO;
rc = NULL;
break;
}
return rc;
}
/*! \brief Select a device on the SPI bus.
*
* Locks and activates the bus for the specified node.
*
* \param node Specifies the SPI bus node.
* \param tmo Timeout in milliseconds. To disable timeout, set this
* parameter to NUT_WAIT_INFINITE.
*
* \return 0 on success. In case of an error, -1 is returned and the bus
* is not locked.
*/
int GpioSpiBus0Select(NUTSPINODE * node, uint32_t tmo)
{
int rc;
/* Sanity check. */
NUTASSERT(node != NULL);
NUTASSERT(node->node_stat != NULL);
/* Allocate the bus. */
rc = NutEventWait(&node->node_bus->bus_mutex, tmo);
if (rc) {
errno = EIO;
} else {
/* Do the update, if the mode update bit is set. */
if (node->node_mode & SPI_MODE_UPDATE) {
GpioSpiSetup(node);
}
/* Set clock output using the correct idle mode level. */
#if defined(SBBI0_SCK_BIT)
GpioPinSetLow(SBBI0_SCK_PORT, (node->node_mode & SPI_MODE_CPOL) != 0);
GpioPinConfigSet(SBBI0_SCK_PORT, SBBI0_SCK_BIT, GPIO_CFG_OUTPUT);
#endif
/* Enable MOSI output and MISO input. */
#if defined(SBBI0_MOSI_BIT)
GpioPinConfigSet(SBBI0_MOSI_PORT, SBBI0_MOSI_BIT, GPIO_CFG_OUTPUT);
#endif
#if defined(SBBI0_MISO_BIT)
GpioPinConfigSet(SBBI0_MISO_PORT, SBBI0_MISO_BIT, 0);
#endif
/* Activate the node's chip select. */
if (GpioSpi0ChipSelect(node->node_cs, (node->node_mode & SPI_MODE_CSHIGH) != 0) == NULL) {
/* Release the bus in case of an error. */
NutEventPost(&node->node_bus->bus_mutex);
rc = -1;
}
}
return rc;
}
/*
* Init Port D
*/
void init_dio(void)
{
/* Configure input pins, enable pull up. */
#ifdef INBANK
#ifdef INPIN1
GpioPinConfigSet(INBANK, INPIN1, GPIO_CFG_PULLUP);
#endif
#ifdef INPIN2
GpioPinConfigSet(INBANK, INPIN2, GPIO_CFG_PULLUP);
#endif
#ifdef INPIN3
GpioPinConfigSet(INBANK, INPIN3, GPIO_CFG_PULLUP);
#endif
#ifdef INPIN4
GpioPinConfigSet(INBANK, INPIN4, GPIO_CFG_PULLUP);
#endif
#endif /* INBANK */
/* Configure output pins, set to low. */
#ifdef OUTBANK
#ifdef OUTPIN1
GpioPinConfigSet(OUTBANK, OUTPIN1, GPIO_CFG_OUTPUT);
GpioPinSetLow(OUTBANK, OUTPIN1);
#endif
#ifdef OUTPIN2
GpioPinConfigSet(OUTBANK, OUTPIN2, GPIO_CFG_OUTPUT);
GpioPinSetLow(OUTBANK, OUTPIN2);
#endif
#ifdef OUTPIN3
GpioPinConfigSet(OUTBANK, OUTPIN3, GPIO_CFG_OUTPUT);
GpioPinSetLow(OUTBANK, OUTPIN3);
#endif
#ifdef OUTPIN4
GpioPinConfigSet(OUTBANK, OUTPIN4, GPIO_CFG_OUTPUT);
GpioPinSetLow(OUTBANK, OUTPIN4);
#endif
#endif /* OUTBANK */
}
static int checkpin_and_config(STM32_I2CCB *icb)
{
uint32_t sda_port, scl_port;
if (icb->icb_base == I2C1_BASE)
{
if ((icb->sda_pin != 7) && (icb->sda_pin != 9) && (icb->sda_pin != 14))
return -1;
if ((icb->scl_pin != 6) && (icb->scl_pin != 8) && (icb->sda_pin != 15))
return -1;
if ((icb->smba_pin != 5) && (icb->smba_pin != -1))
return -1;
if (icb->sda_pin == 15)
sda_port= NUTGPIO_PORTA;
else
sda_port= NUTGPIO_PORTB;
if (icb->scl_pin == 15)
scl_port= NUTGPIO_PORTA;
else
scl_port= NUTGPIO_PORTB;
GpioPortConfigSet(
sda_port, icb->sda_pin, GPIO_CFG_OUTPUT| GPIO_CFG_PERIPHAL|
GPIO_CFG_MULTIDRIVE| GPIO_CFG_PULLUP | GPIO_CFG_SPEED_FAST);
GpioPinConfigSet(
scl_port ,icb->scl_pin, GPIO_CFG_OUTPUT| GPIO_CFG_PERIPHAL|
GPIO_CFG_MULTIDRIVE| GPIO_CFG_PULLUP | GPIO_CFG_SPEED_FAST);
GPIO_PinAFConfig((GPIO_TypeDef*) sda_port, icb->sda_pin, GPIO_AF_4);
GPIO_PinAFConfig((GPIO_TypeDef*) scl_port, icb->scl_pin, GPIO_AF_4);
if (icb->smba_pin == 5)
{
/* TODO: How should SMBA pin be set?*/
GpioPinConfigSet(
NUTGPIO_PORTA, icb->scl_pin, GPIO_CFG_OUTPUT|
GPIO_CFG_PERIPHAL| GPIO_CFG_MULTIDRIVE| GPIO_CFG_PULLUP |
GPIO_CFG_SPEED_FAST);
GPIO_PinAFConfig(GPIOA, icb->smba_pin, GPIO_AF_4);
}
RCC->APB1ENR &= ~RCC_APB1ENR_I2C1EN;
/* Use HSI clock*/
RCC->CFGR3 &= ~RCC_CFGR3_I2C1SW;
RCC->APB1ENR |= RCC_APB1ENR_I2C1EN;
RCC->APB1RSTR |= RCC_APB1RSTR_I2C1RST;
RCC->APB1RSTR &= ~RCC_APB1RSTR_I2C1RST;
}
else if (icb->icb_base == I2C2_BASE)
{
if ((icb->sda_pin != 0) && (icb->sda_pin != 10)&& (icb->sda_pin != 0))
return -1;
if ((icb->scl_pin != 1) && (icb->scl_pin != 9) && (icb->sda_pin != 6)
&& (icb->sda_pin != 1))
return -1;
if ((icb->smba_pin != 12) && (icb->smba_pin != 8)
&& (icb->smba_pin != -1))
return -1;
if (icb->sda_pin == 10)
sda_port= NUTGPIO_PORTA;
else
sda_port= NUTGPIO_PORTF;
if (icb->scl_pin == 9)
scl_port= NUTGPIO_PORTA;
else /* Both other alternate pins on PORTF*/
scl_port= NUTGPIO_PORTF;
/* Fixme: Handle SMNa Pin*/
GpioPinConfigSet(
sda_port, icb->sda_pin, GPIO_CFG_OUTPUT| GPIO_CFG_PERIPHAL|
GPIO_CFG_MULTIDRIVE| GPIO_CFG_PULLUP | GPIO_CFG_SPEED_FAST);
GpioPinConfigSet(
scl_port ,icb->scl_pin, GPIO_CFG_OUTPUT| GPIO_CFG_PERIPHAL|
GPIO_CFG_MULTIDRIVE| GPIO_CFG_PULLUP | GPIO_CFG_SPEED_FAST);
GPIO_PinAFConfig((GPIO_TypeDef*) sda_port, icb->sda_pin, GPIO_AF_4);
GPIO_PinAFConfig((GPIO_TypeDef*) scl_port, icb->scl_pin, GPIO_AF_4);
RCC->APB1ENR &= ~RCC_APB1ENR_I2C2EN;
/* Use HSI clock*/
RCC->CFGR3 &= ~RCC_CFGR3_I2C2SW;
RCC->APB1ENR |= RCC_APB1ENR_I2C2EN;
RCC->APB1RSTR |= RCC_APB1RSTR_I2C2RST;
RCC->APB1RSTR &= ~RCC_APB1RSTR_I2C2RST;
}
else
return -1;
return 0;
}
/*! \brief Select a device on the SPI bus.
*
* Locks and activates the bus for the specified node.
*
* \param node Specifies the SPI bus node.
* \param tmo Timeout in milliseconds. To disable timeout, set this
* parameter to NUT_WAIT_INFINITE.
*
* \return 0 on success. In case of an error, -1 is returned and the bus
* is not locked.
*/
static int Stm32SpiBusSelect(NUTSPINODE * node, uint32_t tmo)
{
int rc;
SPI_TypeDef* base;
/* Sanity check. */
NUTASSERT(node != NULL);
NUTASSERT(node->node_bus != NULL);
NUTASSERT(node->node_stat != NULL);
base=(SPI_TypeDef*)(node->node_bus->bus_base);
/* Allocate the bus. */
rc = NutEventWait(&node->node_bus->bus_mutex, tmo);
if (rc) {
errno = EIO;
} else {
SPI_TypeDef *spireg = node->node_stat;
SPI_ENABLE_CLK;
/* Activate the IO Pins to avoid glitches*/
GpioPinConfigSet(SPIBUS_SCK_PORT, SPIBUS_SCK_PIN, GPIO_CFG_DISABLED);//SCK
GpioPinConfigSet(SPIBUS_MISO_PORT, SPIBUS_MISO_PIN, GPIO_CFG_DISABLED );//MISO
GpioPinConfigSet(SPIBUS_MOSI_PORT, SPIBUS_MOSI_PIN, GPIO_CFG_DISABLED);//MOSI
/* If the mode update bit is set, then update our shadow registers. */
if (node->node_mode & SPI_MODE_UPDATE) {
Stm32SpiSetup(node);
}
/* Set SPI mode. */
base->CR1 = spireg->CR1;
base->CR1 |= SPI_CR1_SSI|SPI_CR1_MSTR;
base->CR2=spireg->CR2;
#if !defined(STM32L1XX_MD)
base->I2SCFGR=spireg->I2SCFGR;
base->I2SPR=spireg->I2SPR;
#endif
//No enable - set it only during transfer
#if defined(STM32F10X_CL)
#if defined(SPIBUS_REMAP_BB)
SPIBUS_REMAP_BB = SPI_DOREMAP;
#endif
#elif defined (MCU_STM32L1) || defined (MCU_STM32F2) || defined (MCU_STM32F4)
GPIO_PinAFConfig( SPIBUS_SCK_PORT, SPIBUS_SCK_PIN, SPI_GPIO_AF);
GPIO_PinAFConfig( SPIBUS_MISO_PORT, SPIBUS_MISO_PIN, SPI_GPIO_AF);
GPIO_PinAFConfig( SPIBUS_MOSI_PORT, SPIBUS_MOSI_PIN, SPI_GPIO_AF);
#endif
GpioPinConfigSet(SPIBUS_SCK_PORT, SPIBUS_SCK_PIN, GPIO_CFG_OUTPUT|GPIO_CFG_PERIPHAL);//SCK
GpioPinConfigSet(SPIBUS_MISO_PORT, SPIBUS_MISO_PIN, GPIO_CFG_PERIPHAL);//MISO
GpioPinConfigSet(SPIBUS_MOSI_PORT, SPIBUS_MOSI_PIN, GPIO_CFG_OUTPUT|GPIO_CFG_PERIPHAL);//MOSI
/* Finally activate the node's chip select. */
rc = Stm32SpiChipSelect(node->node_cs, (node->node_mode & SPI_MODE_CSHIGH) != 0);
if (rc) {
/* Release the bus in case of an error. */
NutEventPost(&node->node_bus->bus_mutex);
}
}
return rc;
}
