/* enable device interrupts */
A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev)
{
/* for good measure, make sure interrupt are disabled before unmasking at the HIF
* layer.
* The rationale here is that between device insertion (where we clear the interrupts the first time)
* and when HTC is finally ready to handle interrupts, other software can perform target "soft" resets.
* The AR6K interrupt enables reset back to an "enabled" state when this happens.
* */
A_STATUS IntStatus = A_OK;
DevDisableInterrupts(pDev);
#ifdef THREAD_X
// Tobe verified...
IntStatus = DevEnableInterrupts(pDev);
/* Unmask the host controller interrupts */
HIFUnMaskInterrupt(pDev->HIFDevice);
#else
/* Unmask the host controller interrupts */
HIFUnMaskInterrupt(pDev->HIFDevice);
IntStatus = DevEnableInterrupts(pDev);
#endif
return IntStatus;
}
/* Enables Dragon interrupts */
A_STATUS
HTCStart(HTC_TARGET *target)
{
A_STATUS status;
A_UINT32 address;
HIF_REQUEST request;
HTC_DEBUG_PRINTF(ATH_LOG_TRC, "HTCStart Enter\n");
/* make sure htc ready event is cleared, the event could be stale (already set) from previous start/stop cycles */
A_RESET_WAIT_EVENT(&htcEvent);
/* Unmask the host controller interrupts */
HIFUnMaskInterrupt(target->device);
/* Enable all the interrupts except for the dragon interrupt */
target->table.int_status_enable = INT_STATUS_ENABLE_ERROR_SET(0x01) |
INT_STATUS_ENABLE_CPU_SET(0x01) |
INT_STATUS_ENABLE_COUNTER_SET(0x01) |
INT_STATUS_ENABLE_MBOX_DATA_SET(0x0F);
/* Set up the CPU Interrupt Status Register */
target->table.cpu_int_status_enable = CPU_INT_STATUS_ENABLE_BIT_SET(0x00);
/* Set up the Error Interrupt Status Register */
target->table.error_status_enable =
ERROR_STATUS_ENABLE_RX_UNDERFLOW_SET(0x01) |
ERROR_STATUS_ENABLE_TX_OVERFLOW_SET(0x01);
/* Set up the Counter Interrupt Status Register */
target->table.counter_int_status_enable =
COUNTER_INT_STATUS_ENABLE_BIT_SET(0xFF);
/* Write to the register */
HIF_FRAME_REQUEST(&request, HIF_WRITE, HIF_EXTENDED_IO, HIF_SYNCHRONOUS,
HIF_BYTE_BASIS, HIF_INCREMENTAL_ADDRESS);
address = getRegAddr(INT_STATUS_ENABLE_REG, ENDPOINT_UNUSED);
status = HIFReadWrite(target->device, address,
&target->table.int_status_enable, 4, &request, NULL);
if (status != A_OK) {
/* Can't write it for some reason */
HTC_DEBUG_PRINTF(ATH_LOG_ERR,
"Failed to enable INT_STATUS_ENABLE | CPU_INT_STATUS_ENABLE | ERROR_STATUS_ENABLE | COUNTER_INT_STATUS_ENABLE, err: %d\n", status);
HTCStop(target);
return status;
}
#ifdef DEBUG
txcreditintrenable[ENDPOINT1] += 1;
txcreditintrenable[ENDPOINT2] += 1;
txcreditintrenable[ENDPOINT3] += 1;
txcreditintrenable[ENDPOINT4] += 1;
txcreditintrenableaggregate[ENDPOINT1] += 1;
txcreditintrenableaggregate[ENDPOINT2] += 1;
txcreditintrenableaggregate[ENDPOINT3] += 1;
txcreditintrenableaggregate[ENDPOINT4] += 1;
#endif /* DEBUG */
/* Wait on a timed semaphore that will get signalled once the block
size negotiation with the target has completed. Furthermore, we have
to do it only once during the lifetime of the target detection */
if (!target->ready) {
HTC_DEBUG_PRINTF(ATH_LOG_INF,
"Waiting for the block size negotiation to finish\n");
A_WAIT_EVENT_INTERRUPTIBLE_TIMEOUT(&htcEvent, (target->ready == TRUE),
HTC_TARGET_RESPONSE_TIMEOUT);
if (target->ready) {
status = A_OK;
} else {
status = A_ERROR;
HTC_DEBUG_PRINTF(ATH_LOG_ERR,
"Failed to negotiate the block sizes\n");
HTCStop(target);
}
}
HTC_DEBUG_PRINTF(ATH_LOG_TRC, "HTCStart Exit\n");
return status;
}
