static void armctrl_mask_irq(struct irq_data *d)
{
if (d->hwirq >= NUMBER_IRQS)
writel_relaxed(REG_FIQ_DISABLE, intc.base + REG_FIQ_CONTROL);
else
writel_relaxed(HWIRQ_BIT(d->hwirq),
intc.disable[HWIRQ_BANK(d->hwirq)]);
}
static void armctrl_unmask_irq(struct irq_data *d)
{
if (d->hwirq >= NUMBER_IRQS)
writel_relaxed(REG_FIQ_ENABLE | hwirq_to_fiq(d->hwirq),
intc.base + REG_FIQ_CONTROL);
else
writel_relaxed(HWIRQ_BIT(d->hwirq),
intc.enable[HWIRQ_BANK(d->hwirq)]);
}
static void bcm283x_intc_irq_unmask(struct vmm_host_irq *d)
{
vmm_writel(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]);
}
static void bcm2835_intc_irq_unmask(struct vmm_host_irq *irqd)
{
vmm_writel(HWIRQ_BIT(irqd->num), intc.enable[HWIRQ_BANK(irqd->num)]);
}
static void armctrl_unmask_irq(struct irq_data *d)
{
writel_relaxed(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]);
}
