/*!
* ======== InterruptDucati_intEnable ========
* Enable remote processor interrupt
*/
Void InterruptDucati_intEnable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
{
/*
* If the remote processor communicates via mailboxes, we should enable
* the Mailbox IRQ instead of enabling the Hwi because multiple mailboxes
* share the same Hwi
*/
if ((BIOS_smpEnabled) || (Core_getId() == 0)) {
if (remoteProcId == InterruptDucati_hostProcId) {
REG32(MAILBOX_IRQENABLE_SET_VIDEO) = MAILBOX_REG_VAL(HOST_TO_VIDEO);
}
else if (remoteProcId == InterruptDucati_dspProcId) {
REG32(MAILBOX_IRQENABLE_SET_VIDEO) = MAILBOX_REG_VAL(DSP_TO_VIDEO);
}
else {
Hwi_enableInterrupt(M3INT);
}
}
else {
if (remoteProcId == InterruptDucati_hostProcId) {
REG32(MAILBOX_IRQENABLE_SET_VPSS) = MAILBOX_REG_VAL(HOST_TO_VPSS);
}
else if (remoteProcId == InterruptDucati_dspProcId) {
REG32(MAILBOX_IRQENABLE_SET_VPSS) = MAILBOX_REG_VAL(DSP_TO_VPSS);
}
else {
Hwi_enableInterrupt(M3INT);
}
}
}
/*
* ======== Timer_trigger ========
* 1. stop timer
* 2. write the period with insts
* 3. start the timer.
*/
Void Timer_trigger(Timer_Object *obj, UInt insts)
{
UInt key;
/* follow proper procedure for dynamic period change */
key = Hwi_disable();
if (obj->id == 0) { /* SysTick Timer */
Hwi_nvic.STCSR = 0; /* stop the timer */
Hwi_clearInterrupt(obj->intNum);
Hwi_enableInterrupt(obj->intNum);
Hwi_nvic.STRVR = insts; /* set the period */
if (obj->extFreq.lo) {
Hwi_nvic.STCSR = 0x3; /* start timer, select ext clock */
}
else {
Hwi_nvic.STCSR = 0x7; /* start timer, select int clock */
}
}
else { /* CTM Timer */
/* RESET=1, ENBL=0 */
CTM_ctm.CTCR[obj->ctmid] = 2;
Hwi_clearInterrupt(obj->intNum);
Hwi_enableInterrupt(obj->intNum);
/* set interval to insts */
CTM_ctm.TINTVLR[obj->ctmid] = insts;
/* RESTART=0, INT=1, ENBL=1 */
CTM_ctm.CTCR[obj->ctmid] = 0x00000101;
}
Hwi_restore(key);
}
/** To Register the ISRs with the underlying OS, if required. */
void registerEdma3Interrupts (unsigned int edma3Id)
{
static UInt32 cookie = 0;
unsigned int numTc = 0;
/* Disabling the global interrupts */
cookie = Hwi_disable();
/* Enable the Xfer Completion Event Interrupt */
EventCombiner_dispatchPlug(ccXferCompInt[edma3Id][dsp_num],
(EventCombiner_FuncPtr)(&lisrEdma3ComplHandler0),
edma3Id, 1);
EventCombiner_enableEvent(ccXferCompInt[edma3Id][dsp_num]);
/* Enable the CC Error Event Interrupt */
EventCombiner_dispatchPlug(ccErrorInt[edma3Id],
(EventCombiner_FuncPtr)(&lisrEdma3CCErrHandler0),
edma3Id, 1);
EventCombiner_enableEvent(ccErrorInt[edma3Id]);
/* Enable the TC Error Event Interrupt, according to the number of TCs. */
while (numTc < numEdma3Tc[edma3Id])
{
EventCombiner_dispatchPlug(tcErrorInt[edma3Id][numTc],
(EventCombiner_FuncPtr)(ptrEdma3TcIsrHandler[numTc]),
edma3Id, 1);
EventCombiner_enableEvent(tcErrorInt[edma3Id][numTc]);
numTc++;
}
/**
* Enabling the HWI_ID.
* EDMA3 interrupts (transfer completion, CC error etc.)
* correspond to different ECM events (SoC specific). These ECM events come
* under ECM block XXX (handling those specific ECM events). Normally, block
* 0 handles events 4-31 (events 0-3 are reserved), block 1 handles events
* 32-63 and so on. This ECM block XXX (or interrupt selection number XXX)
* is mapped to a specific HWI_INT YYY in the tcf file. So to enable this
* mapped HWI_INT YYY, one should use the corresponding bitmask in the
* API C64_enableIER(), in which the YYY bit is SET.
*/
Hwi_enableInterrupt(hwIntXferComp[edma3Id]);
Hwi_enableInterrupt(hwIntCcErr[edma3Id]);
Hwi_enableInterrupt(hwIntTcErr[edma3Id]);
/* Restore interrupts */
Hwi_restore(cookie);
}
/*!
* ======== InterruptDsp_intRegister ========
*/
Void InterruptDsp_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
Fxn func, UArg arg)
{
UInt key;
Int index;
InterruptDsp_FxnTable *table;
Hwi_Params hwiParams;
/* Ensure that our ID is set correctly */
Assert_isTrue(InterruptDsp_dspProcId == MultiProc_self(),
ti_sdo_ipc_Ipc_A_internal);
/* Ensure that remoteProcId is valid */
Assert_isTrue(remoteProcId < ti_sdo_utils_MultiProc_numProcessors,
ti_sdo_ipc_Ipc_A_invArgument);
/* Ensure that proper intVectorId has been supplied */
Assert_isTrue(intInfo->intVectorId <= 15, ti_sdo_ipc_Ipc_A_internal);
if (remoteProcId == InterruptDsp_hostProcId) {
index = 0;
}
else if (remoteProcId == InterruptDsp_core0ProcId) {
index = 1;
}
else {
/* DSP cannot talk to CORE1 */
Assert_isTrue(FALSE, ti_sdo_ipc_Ipc_A_internal);
}
/* Disable global interrupts */
key = Hwi_disable();
table = &(InterruptDsp_module->fxnTable[index]);
table->func = func;
table->arg = arg;
InterruptDsp_intClear(remoteProcId, intInfo);
/* Make sure the interrupt only gets plugged once */
InterruptDsp_module->numPlugged++;
if (InterruptDsp_module->numPlugged == 1) {
Hwi_Params_init(&hwiParams);
hwiParams.eventId = DSPINT;
Hwi_create(intInfo->intVectorId,
(Hwi_FuncPtr)InterruptDsp_intShmStub,
&hwiParams,
NULL);
/* Enable the interrupt */
Wugen_enableEvent(DSPINT);
Hwi_enableInterrupt(intInfo->intVectorId);
}
/* Enable the mailbox interrupt to the DSP */
InterruptDsp_intEnable(remoteProcId, intInfo);
/* Restore global interrupts */
Hwi_restore(key);
}
/*
* ======== Timer_start ========
* 1. Hwi_disable();
* 2. Clear the counters
* 3. Clear IFR
* 4. Enable timer interrupt
* 5. Start timer
* 6. Hwi_restore()
*/
Void Timer_start(Timer_Object *obj)
{
UInt key;
key = Hwi_disable();
if (obj->hwi) {
Hwi_clearInterrupt(obj->intNum);
Hwi_enableInterrupt(obj->intNum);
}
if (obj->id == 0) { /* Systick */
if (obj->extFreq.lo) {
Hwi_nvic.STCSR |= 0x1; /* start timer, select ext clock */
}
else {
Hwi_nvic.STCSR |= 0x5; /* start timer, select int clock */
}
}
else { /* CTM Timer */
if (obj->runMode == Timer_RunMode_CONTINUOUS) {
/* RESTART=1, INT=1, ENBL=1 */
CTM_ctm.CTCR[obj->ctmid] = 0x00000501;
}
else {
/* RESTART=0, INT=1, ENBL=1 */
CTM_ctm.CTCR[obj->ctmid] = 0x00000101;
}
}
Hwi_restore(key);
}
/*!
* ======== InterruptArm_intRegister ========
* Register ISR for remote processor interrupt
*/
Void InterruptArm_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
Fxn func, UArg arg)
{
Hwi_Params hwiAttrs;
UInt key;
Assert_isTrue(intInfo->localIntId == DSP2ARM_CHIPINT0 ||
intInfo->localIntId == DSP2ARM_CHIPINT1,
ti_sdo_ipc_Ipc_A_internal);
Assert_isTrue(intInfo->remoteIntId == ARM2DSP_CHIPINT2 ||
intInfo->remoteIntId == ARM2DSP_CHIPINT3,
ti_sdo_ipc_Ipc_A_internal);
/* Disable global interrupts */
key = Hwi_disable();
/* Register interrupt for communication between ARM and DSP */
Hwi_Params_init(&hwiAttrs);
hwiAttrs.maskSetting = Hwi_MaskingOption_SELF;
hwiAttrs.arg = arg;
InterruptArm_intClear(remoteProcId, intInfo);
Hwi_create(intInfo->localIntId,
(Hwi_FuncPtr)func,
&hwiAttrs,
NULL);
/* Restore global interrupts */
Hwi_restore(key);
Hwi_enableInterrupt(intInfo->localIntId);
}
/*
* ======== Watchdog_init ========
*/
Void Watchdog_init( Void (*timerFxn)(Void) )
{
Hwi_Params hwiParams;
UInt key;
Timer_Handle tHandle;
Types_FreqHz tFreq;
Watchdog_TimerRegs *timer;
Int i;
tHandle = Timer_Object_get(NULL, 0);
Timer_getFreq(tHandle, &tFreq); /* get timer frequency */
for (i = 0; i < Watchdog_module->wdtCores; i++) { /* loop for SMP cores */
timer = (Watchdog_TimerRegs *) Watchdog_module->device[i].baseAddr;
/* Check if timer is enabled by host-side */
if ((REG32(Watchdog_module->device[i].clkCtrl) &
WATCHDOG_WDT_CLKCTRL_IDLEST_MASK) ==
WATCHDOG_WDT_CLKCTRL_IDLEST_MASK) {
System_printf("Watchdog disabled: TimerBase = 0x%x ClkCtrl = 0x%x\n",
timer, Watchdog_module->device[i].clkCtrl);
continue; /* for next core */
}
/* Configure the timer */
initTimer(timer, TRUE);
/* Enable interrupt in BIOS */
Hwi_Params_init(&hwiParams);
hwiParams.priority = 1;
hwiParams.eventId = Watchdog_module->device[i].eventId;
hwiParams.maskSetting = Hwi_MaskingOption_LOWER;
key = Hwi_disable();
Hwi_create(Watchdog_module->device[i].intNum, (Hwi_FuncPtr) timerFxn,
&hwiParams, NULL);
Hwi_enableInterrupt(Watchdog_module->device[i].intNum);
Hwi_restore(key);
/* Enable timer */
while (timer->twps & WATCHDOG_TIMER_TWPS_W_PEND_TCLR);
timer->tclr |= 1;
Watchdog_module->status[i] = Watchdog_Mode_ENABLED;
#ifdef SMP
System_printf("Watchdog enabled: TimerBase = 0x%x SMP-Core = %d "
"Freq = %d\n", timer, i, tFreq.lo);
#else
System_printf("Watchdog enabled: TimerBase = 0x%x Freq = %d\n",
timer, tFreq.lo);
#endif
}
/* Register callback function */
if (!IpcPower_registerCallback(IpcPower_Event_RESUME, Watchdog_restore,
NULL)) {
System_printf("Watchdog_restore registered as a resume callback\n");
}
return;
}
/*
* ======== Hwi_reconfig ========
* Reconfigure a dispatched interrupt.
*/
Void Hwi_reconfig(Hwi_Object *hwi, Hwi_FuncPtr fxn, const Hwi_Params *params)
{
UInt intNum;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
Hwi_disableInterrupt(intNum);
hwi->fxn = fxn;
hwi->arg = params->arg;
hwi->sense = params->sense;
hwi->type = params->type;
hwi->priority = params->priority;
Hwi_setSense(intNum, hwi->sense);
Hwi_setType(intNum, hwi->type);
Hwi_setPriority(intNum, hwi->priority);
if (params->enableInt) {
Hwi_enableInterrupt(intNum);
}
}
/*!
* ======== InterruptHost_intRegister ========
*/
Void InterruptHost_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
Fxn func, UArg arg)
{
UInt key;
Hwi_Params hwiAttrs;
/* Make sure that we're trying to talk to the HOST */
Assert_isTrue(remoteProcId == MultiProc_getId("DSP"),
ti_sdo_ipc_Ipc_A_invArgument);
/* Disable global interrupts */
key = Hwi_disable();
InterruptHost_intClear(remoteProcId, intInfo);
/* Register interrupt for communication between ARM and DSP */
Hwi_Params_init(&hwiAttrs);
hwiAttrs.maskSetting = Hwi_MaskingOption_SELF;
hwiAttrs.arg = arg;
Hwi_create(HOSTINT,
(Hwi_FuncPtr)func,
&hwiAttrs,
NULL);
/* Enable the mailbox interrupt to the DSP */
REG32(MAILBOX_IRQENABLE_GPP) = 0x4; /* Mailbox 0 */
/* Restore global interrupts */
Hwi_restore(key);
/* Unmask IVA_2_IRQ[10] to allow interrupt to come into DSP */
Hwi_enableInterrupt(HOSTINT);
}
/*
* ======== Hwi_RestoreInterrupt ========
*/
Void Hwi_restoreInterrupt(UInt intNum, UInt key)
{
if (key & (1 << (intNum))) {
Hwi_enableInterrupt(intNum);
}
else {
Hwi_disableInterrupt(intNum);
}
}
/*
* ======== Hwi_reconfig ========
* Reconfigure a dispatched interrupt.
*/
Void Hwi_reconfig(Hwi_Object *hwi, Hwi_FuncPtr fxn, const Hwi_Params *params)
{
UInt intNum;
Int priority;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
Hwi_disableInterrupt(intNum);
hwi->fxn = fxn;
hwi->arg = params->arg;
priority = params->priority;
/*
* the -1 sentinel priority is the default passed by hal Hwi_create().
* Translate it to 31, which is our default priority.
*/
if (priority == -1) {
priority = 31;
}
Hwi_module->priorities[intNum] = priority;
Hwi_setPriority(intNum, priority);
Assert_isTrue((params->maskSetting != Hwi_MaskingOption_BITMASK),
Hwi_A_unsupportedMaskingOption);
switch (params->maskSetting) {
case Hwi_MaskingOption_NONE:
hwi->handler = Hwi_handlerNONE;
break;
case Hwi_MaskingOption_ALL:
hwi->handler = Hwi_handlerALL;
break;
case Hwi_MaskingOption_LOWER:
hwi->handler = Hwi_handlerLOWER;
break;
case Hwi_MaskingOption_BITMASK:
case Hwi_MaskingOption_SELF:
hwi->handler = Hwi_handlerSELF;
break;
}
if (params->enableInt) {
Hwi_enableInterrupt(intNum);
}
}
/*!
* ======== InterruptDsp_intRegister ========
*/
Void InterruptDsp_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
Fxn func, UArg arg)
{
UInt key;
UInt eventId;
UInt combinedEventId;
Int index;
Hwi_Params params;
InterruptDsp_FxnTable *table;
Assert_isTrue(((remoteProcId < MultiProc_getNumProcsInCluster()) &&
(remoteProcId != MultiProc_self())), ti_sdo_ipc_Ipc_A_internal);
index = PROCID(remoteProcId);
/* Disable global interrupts */
key = Hwi_disable();
table = &(InterruptDsp_module->fxnTable[index]);
table->func = func;
table->arg = arg;
InterruptDsp_intClear(remoteProcId, intInfo);
/* Make sure the interrupt only gets plugged once */
eventId = InterruptDsp_dspInterruptTable[index];
InterruptDsp_module->numPlugged++;
if (InterruptDsp_module->numPlugged == 1) {
EventCombiner_dispatchPlug(eventId,
(Hwi_FuncPtr)InterruptDsp_intShmStub, eventId, TRUE);
Hwi_Params_init(¶ms);
combinedEventId = eventId / EVENT_GROUP_SIZE;
params.eventId = combinedEventId;
params.arg = combinedEventId;
params.enableInt = TRUE;
Hwi_create(intInfo->intVectorId, &ti_sysbios_family_c64p_EventCombiner_dispatch,
¶ms, NULL);
Hwi_enableInterrupt(intInfo->intVectorId);
}
else {
EventCombiner_dispatchPlug(eventId,
(Hwi_FuncPtr)InterruptDsp_intShmStub, eventId, TRUE);
}
/* Enable the mailbox interrupt to the DSP */
InterruptDsp_intEnable(remoteProcId, intInfo);
/* Restore global interrupts */
Hwi_restore(key);
}
/*
* ======== Hwi_reconfig ========
* Reconfigure a dispatched interrupt.
*/
Void Hwi_reconfig(Hwi_Object *hwi, Hwi_FuncPtr fxn, const Hwi_Params *params)
{
UInt intNum;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
if (intNum == Hwi_NUM_INTERRUPTS) {
Error_raise(NULL, Hwi_E_handleNotFound, hwi, 0);
return;
}
Hwi_disableInterrupt(intNum);
hwi->fxn = fxn;
hwi->arg = params->arg;
switch (params->maskSetting) {
case Hwi_MaskingOption_NONE:
hwi->disableMask = 0;
hwi->restoreMask = 0;
break;
case Hwi_MaskingOption_ALL:
hwi->disableMask = 0xffff;
hwi->restoreMask = 0xffff;
break;
default:
case Hwi_MaskingOption_SELF:
hwi->disableMask = 1 << intNum;
hwi->restoreMask = 1 << intNum;
break;
case Hwi_MaskingOption_BITMASK:
hwi->disableMask = params->disableMask;
hwi->restoreMask = params->restoreMask;
break;
}
if (params->eventId != -1) {
Hwi_eventMap(intNum, params->eventId);
}
/* keep intEvents[] current for ROV */
Hwi_module->intEvents[intNum] = Hwi_getEventId(intNum);
if (params->enableInt) {
Hwi_enableInterrupt(intNum);
}
}
/*!
* ======== InterruptBenelli_intRegister ========
*/
Void InterruptBenelli_intRegister(UInt16 remoteProcId,
IInterrupt_IntInfo *intInfo,
Fxn func, UArg arg)
{
Hwi_Params hwiAttrs;
UInt key;
UInt mbxIdx;
Int index;
InterruptBenelli_FxnTable *table;
Assert_isTrue(remoteProcId < ti_sdo_utils_MultiProc_numProcessors,
ti_sdo_ipc_Ipc_A_internal);
/* Assert that our MultiProc id is set correctly */
Assert_isTrue((InterruptBenelli_benelliProcId == MultiProc_self()),
ti_sdo_ipc_Ipc_A_internal);
mbxIdx = MBX_BASEADDR_IDX(MBX_TABLE_IDX(remoteProcId, MultiProc_self()));
index = PROCID(remoteProcId);
intInfo->localIntId = InterruptBenelli_benelliInterruptTable[index];
/* Disable global interrupts */
key = Hwi_disable();
table = &(InterruptBenelli_module->fxnTable[index]);
table->func = func;
table->arg = arg;
InterruptBenelli_intClear(remoteProcId, intInfo);
Hwi_Params_init(&hwiAttrs);
hwiAttrs.maskSetting = Hwi_MaskingOption_LOWER;
/* Make sure the interrupt only gets plugged once */
InterruptBenelli_module->numPlugged[mbxIdx]++;
if (InterruptBenelli_module->numPlugged[mbxIdx] == 1) {
Hwi_create(intInfo->localIntId,
(Hwi_FuncPtr)InterruptBenelli_intShmMbxStub,
&hwiAttrs,
NULL);
/* Interrupt_intEnable won't enable the Hwi */
Hwi_enableInterrupt(intInfo->localIntId);
}
InterruptBenelli_intEnable(remoteProcId, intInfo);
/* Restore global interrupts */
Hwi_restore(key);
}
/** To Register the ISRs with the underlying OS, if required */
void registerEdma3Interrupts (unsigned int edma3Id)
{
static UInt32 cookie = 0;
Int eventId = 0; /* GEM event id */
unsigned int numTc = 0;
/* Disabling the global interrupts */
cookie = Hwi_disable();
/* Transfer completion ISR */
CpIntc_dispatchPlug(ccXferCompInt[edma3Id][dsp_num],
lisrEdma3ComplHandler0,
edma3Id,
TRUE);
CpIntc_mapSysIntToHostInt(0, ccXferCompInt[edma3Id][dsp_num],
ccXferHostInt[edma3Id][dsp_num]);
CpIntc_enableHostInt(0, ccXferHostInt[edma3Id][dsp_num]);
eventId = CpIntc_getEventId(ccXferHostInt[edma3Id][dsp_num]);
EventCombiner_dispatchPlug (eventId, CpIntc_dispatch,
ccXferHostInt[edma3Id][dsp_num], TRUE);
EventCombiner_enableEvent(eventId);
/* CC Error ISR */
CpIntc_dispatchPlug(ccErrorInt[edma3Id], lisrEdma3CCErrHandler0,
edma3Id, TRUE);
CpIntc_mapSysIntToHostInt(0, ccErrorInt[edma3Id],
edma3ErrHostInt[edma3Id][dsp_num]);
/* TC Error ISR */
while (numTc < numEdma3Tc[edma3Id])
{
CpIntc_dispatchPlug(tcErrorInt[edma3Id][numTc],
(CpIntc_FuncPtr )(ptrEdma3TcIsrHandler[numTc]),
edma3Id, TRUE);
CpIntc_mapSysIntToHostInt(0, tcErrorInt[edma3Id][numTc],
edma3ErrHostInt[edma3Id][dsp_num]);
numTc++;
}
/* Enable the host interrupt which is common for both CC and TC error */
CpIntc_enableHostInt(0, edma3ErrHostInt[edma3Id][dsp_num]);
eventId = CpIntc_getEventId(edma3ErrHostInt[edma3Id][dsp_num]);
EventCombiner_dispatchPlug (eventId, CpIntc_dispatch,
edma3ErrHostInt[edma3Id][dsp_num], TRUE);
EventCombiner_enableEvent(eventId);
Hwi_enableInterrupt(hwiInterrupt);
/* enable the 'global' switch */
CpIntc_enableAllHostInts(0);
/* Restore interrupts */
Hwi_restore(cookie);
}
BOOL Intr_EnableEvent(Intr *pThis)
{
//CSL_Status intStat;
//If CIC Event is provided in Interrupt Table
if(pThis->oIntrTableParam.bCicRequired == TRUE)
{
//intStat = CSL_cicHwControl(pThis->CicHandle, CSL_CIC_CMD_EVTENABLE, NULL); // modified for new Chip
/* Enable the Host Interrupt. */
CpIntc_enableHostInt(0,pThis->oIntrTableParam.HostInt );
/* Enable the System Interrupt */
CpIntc_enableSysInt(0, pThis->oIntrTableParam.SysInt);
//if(intStat != CSL_SOK)
//{
// #ifdef _STE_APP
// LOG_TRACE0( "INTR : CIC HwControl to enable event ... Failed.\n");
// #endif
// return FALSE;
//}
}
//else
#ifdef _STE_APP
//Clear the Interrupt Flag Register before Enabling
//C64_clearIFR(1 << pThis->oIntrTableParam.eIntcVectorId );// DSPBIOS API
Hwi_clearInterrupt( pThis->oIntrTableParam.eIntcVectorId);// not sure this is the equivalent or not :(
//Enable the Vector interrupt
//C64_enableIER(1 << pThis->oIntrTableParam.eIntcVectorId );// DSP BIOS API
Hwi_enableInterrupt( pThis->oIntrTableParam.eIntcVectorId);// SYS BIOS API
#endif
#ifdef _STE_BOOT
intStat = CSL_intcHwControl(pThis->oIntcHandle, CSL_INTC_CMD_EVTENABLE, NULL);
if(intStat != CSL_SOK)
{
#ifdef DEBUG
printf("INTR: HwControl to enable event ... Failed.\n");
#endif
}
#endif
return TRUE;
}
/*!
* ======== InterruptDsp_intRegister ========
*/
Void InterruptDsp_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
Fxn func, UArg arg)
{
UInt key;
Int index;
InterruptDsp_FxnTable *table;
Assert_isTrue(intInfo->intVectorId <= 15, ti_sdo_ipc_Ipc_A_internal);
if (remoteProcId == InterruptDsp_hostProcId) {
index = 0;
}
else if (remoteProcId == InterruptDsp_videoProcId) {
index = 1;
}
else if (remoteProcId == InterruptDsp_vpssProcId) {
index = 2;
}
else {
Assert_isTrue(FALSE, ti_sdo_ipc_Ipc_A_internal);
return; /* keep Coverity happy */
}
/* Disable global interrupts */
key = Hwi_disable();
table = &(InterruptDsp_module->fxnTable[index]);
table->func = func;
table->arg = arg;
InterruptDsp_intClear(remoteProcId, intInfo);
/* Make sure the interrupt only gets plugged once */
InterruptDsp_module->numPlugged++;
if (InterruptDsp_module->numPlugged == 1) {
/* Map the interrupt number to HWI vector */
Hwi_eventMap(intInfo->intVectorId, DSPINT);
Hwi_create(intInfo->intVectorId,
(Hwi_FuncPtr)InterruptDsp_intShmStub,
NULL,
NULL);
Hwi_enableInterrupt(intInfo->intVectorId);
}
/* Enable the mailbox interrupt to the DSP */
InterruptDsp_intEnable(remoteProcId, intInfo);
/* Restore global interrupts */
Hwi_restore(key);
}
/*!
* ======== InterruptM3_intEnable ========
* Enable remote processor interrupt
*/
Void InterruptM3_intEnable()
{
/*
* If the remote processor communicates via mailboxes, we should enable
* the Mailbox IRQ instead of enabling the Hwi because multiple mailboxes
* share the same Hwi
*/
if (Core_getId() == 0) {
REG32(MAILBOX_IRQENABLE_SET_M3) = MAILBOX_REG_VAL(SYSM3_MBX);
}
else {
Hwi_enableInterrupt(M3INT);
}
}
/*
* ======== Timer_start ========
* 1. Hwi_disable();
* 2. Clear the counters
* 3. Clear IFR
* 4. Enable timer interrupt
* 5. Start timer
* 6. Hwi_restore()
*/
Void Timer_start(Timer_Object *obj)
{
UInt key;
key = Hwi_disable();
if (obj->hwi) {
Hwi_clearInterrupt(obj->intNum);
Hwi_enableInterrupt(obj->intNum);
}
timerDevices[obj->id].cntl |= TIMER_CNTL_START;
Hwi_restore(key);
}
/*
* ======== Timer_start ========
* 1. Hwi_disable();
* 2. Clear the counters
* 3. Clear IFR
* 4. Enable timer interrupt
* 5. Start timer
* 6. Hwi_restore()
*/
Void Timer_start(Timer_Object *obj)
{
UInt key;
UInt runMode;
TimerRegs *timer;
timer = (TimerRegs *)Timer_module->device[obj->id].baseAddr;
key = Hwi_disable();
Timer_stop(obj);
if (obj->runMode == Timer_RunMode_DYNAMIC) {
timer->tcrr = 0; /* set timer count back to initial value */
obj->prevThreshold = 0; /* init previous threshold */
timer->tmar = obj->period; /* set threshold for first interrupt */
obj->rollovers = 0; /* init total rollover count */
obj->savedCurrCount = 0;
}
else {
/* set timer count register back to period value */
timer->tcrr = Timer_MAX_PERIOD - obj->period;
}
while (timer->twps & TIMER_TWPS_W_PEND_TCRR)
;
if (obj->hwi) {
Hwi_clearInterrupt(obj->intNum);
Hwi_enableInterrupt(obj->intNum);
}
if (obj->runMode == Timer_RunMode_CONTINUOUS) {
runMode = TIMER_TCLR_START_CONTINUOUS;
}
else if (obj->runMode == Timer_RunMode_ONESHOT) {
runMode = TIMER_TCLR_START_ONESHOT;
}
else {
runMode = TIMER_TCLR_START_DYNAMIC;
}
timer->tclr = runMode | obj->tclr;
while (timer->twps & TIMER_TWPS_W_PEND_TCLR)
;
Hwi_restore(key);
}
/*!
* ======== InterruptDsp_intRegister ========
*/
Void InterruptDsp_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
Fxn func, UArg arg)
{
UInt key;
Hwi_Params hwiAttrs;
Error_Block eb;
InterruptDsp_FxnTable *table;
Assert_isTrue(intInfo->intVectorId <= 15, ti_sdo_ipc_Ipc_A_internal);
/* init error block */
Error_init(&eb);
/* Disable global interrupts */
key = Hwi_disable();
table = &(InterruptDsp_module->fxnTable);
table->func = func;
table->arg = arg;
InterruptDsp_intClear(remoteProcId, intInfo);
/* Make sure the interrupt only gets plugged once */
InterruptDsp_module->numPlugged++;
if (InterruptDsp_module->numPlugged == 1) {
/* Register interrupt to remote processor */
Hwi_Params_init(&hwiAttrs);
hwiAttrs.arg = arg;
hwiAttrs.eventId = 90;
Hwi_create(intInfo->intVectorId,
(Hwi_FuncPtr)InterruptDsp_intShmStub,
&hwiAttrs,
&eb);
/* enable the interrupt vector */
Hwi_enableInterrupt(intInfo->intVectorId);
}
/* Enable the mailbox interrupt to the DSP */
InterruptDsp_intEnable(remoteProcId, intInfo);
/* Restore global interrupts */
Hwi_restore(key);
}
/*
* ======== Timer_trigger ========
* 1. stop timer
* 2. write the period with insts
* 3. start the timer.
*/
Void Timer_trigger(Timer_Object *obj, UInt insts)
{
UInt key;
/* follow proper procedure for dynamic period change */
key = Hwi_disable();
/* RESET=1, ENBL=0 */
CTM_ctm.CTCR[obj->ctmid] = 2;
Hwi_clearInterrupt(obj->intNum);
Hwi_enableInterrupt(obj->intNum);
/* set interval to insts */
CTM_ctm.TINTVLR[obj->ctmid] = insts;
/* RESTART=0, INT=1, ENBL=1 */
CTM_ctm.CTCR[obj->ctmid] = 0x00000101;
Hwi_restore(key);
}
/**
* /fn InitializeLedUserSwitch
* /brief Initialize led D1 und USR SW1.
* /return void.
*/
static void InitializeLedUserSwitch() {
uint32_t strength;
uint32_t pinType;
Hwi_Params buttonHWIParams;
Hwi_Handle buttonHwi;
Error_Block eb;
// enable port N
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
// LED2
GPIOPinTypeGPIOOutput(GPIO_PORTN_BASE, GPIO_PIN_0);
/* set pin gpio port to output */
GPIOPinTypeGPIOOutput(GPIO_PORTN_BASE, GPIO_PIN_1);
/*configure pad as standard pin with default output current*/
GPIOPadConfigGet(GPIO_PORTN_BASE, GPIO_PIN_1, &strength, &pinType);
GPIOPadConfigSet(GPIO_PORTN_BASE, GPIO_PIN_1, strength, GPIO_PIN_TYPE_STD);
/* turn off led 1 */
GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_1, 0);
/* configure switch 1 with pull up as input on GPIO_PIN_0 as pull-up pin */
GPIOPinTypeGPIOInput(GPIO_PORTJ_BASE, GPIO_PIN_0);
GPIOPadConfigGet(GPIO_PORTJ_BASE, GPIO_PIN_0, &strength, &pinType);
GPIOPadConfigSet(GPIO_PORTJ_BASE, GPIO_PIN_0, strength,
GPIO_PIN_TYPE_STD_WPU);
Error_init(&eb);
Hwi_Params_init(&buttonHWIParams);
buttonHWIParams.arg = 0;
buttonHWIParams.enableInt = false;
buttonHwi = Hwi_create(INT_GPIOJ_TM4C129, ButtonFunction, &buttonHWIParams,
&eb);
if (buttonHwi == NULL) {
System_abort("Button Hardware interrupt create failed.");
}
Hwi_enableInterrupt(INT_GPIOJ_TM4C129);
GPIOIntEnable(GPIO_PORTJ_BASE, GPIO_INT_PIN_0);
}
/*
* ======== Timer_start ========
* 1. Hwi_disable();
* 2. Clear the counters
* 3. Clear IFR
* 4. Enable timer interrupt
* 5. Start timer
* 6. Hwi_restore()
*/
Void Timer_start(Timer_Object *obj)
{
UInt key;
key = Hwi_disable();
if (obj->hwi) {
Hwi_clearInterrupt(obj->intNum);
Hwi_enableInterrupt(obj->intNum);
}
if (obj->extFreq.lo) {
Hwi_nvic.STCSR |= 0x1; /* start timer, select ext clock */
}
else {
Hwi_nvic.STCSR |= 0x5; /* start timer, select int clock */
}
Hwi_restore(key);
}
/*
* ======== Hwi_reconfig ========
* Reconfigure a dispatched interrupt.
*/
Void Hwi_reconfig(Hwi_Object *hwi, Hwi_FuncPtr fxn, const Hwi_Params *params)
{
UInt intNum;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
Hwi_disableInterrupt(intNum);
hwi->fxn = fxn;
hwi->arg = params->arg;
switch (params->maskSetting) {
case Hwi_MaskingOption_NONE:
hwi->disableMask = 0;
hwi->restoreMask = 0;
break;
case Hwi_MaskingOption_ALL:
hwi->disableMask = 0xffff;
hwi->restoreMask = 0xffff;
break;
default:
case Hwi_MaskingOption_SELF:
hwi->disableMask = 1 << intNum;
hwi->restoreMask = 1 << intNum;
break;
case Hwi_MaskingOption_BITMASK:
hwi->disableMask = params->disableMask;
hwi->restoreMask = params->restoreMask;
break;
}
if (params->enableInt) {
Hwi_enableInterrupt(intNum);
}
}
/*
* ======== Timer_start ========
* 1. Hwi_disable();
* 2. Clear the counters
* 3. Clear IFR
* 4. Enable timer interrupt
* 5. Start timer
* 6. Hwi_restore()
*/
Void Timer_start(Timer_Object *obj)
{
UInt key;
key = Hwi_disable();
if (obj->hwi) {
Hwi_clearInterrupt(obj->intNum);
Hwi_enableInterrupt(obj->intNum);
}
if (obj->runMode == Timer_RunMode_CONTINUOUS) {
/* RESTART=1, INT=1, ENBL=1 */
CTM_ctm.CTCR[obj->ctmid] = 0x00000501;
}
else {
/* RESTART=0, INT=1, ENBL=1 */
CTM_ctm.CTCR[obj->ctmid] = 0x00000101;
}
Hwi_restore(key);
}
/*!
* ======== InterruptM3_intRegister ========
*/
Void InterruptM3_intRegister(Hwi_FuncPtr fxn)
{
Hwi_Params hwiAttrs;
UInt key;
hostProcId = MultiProc_getId("HOST");
dspProcId = MultiProc_getId("DSP");
sysm3ProcId = MultiProc_getId("CORE0");
appm3ProcId = MultiProc_getId("CORE1");
/* Disable global interrupts */
key = Hwi_disable();
userFxn = fxn;
Hwi_Params_init(&hwiAttrs);
hwiAttrs.maskSetting = Hwi_MaskingOption_LOWER;
if (Core_getId() == 0) {
Hwi_create(M3INT_MBX,
(Hwi_FuncPtr)InterruptM3_isr,
&hwiAttrs,
NULL);
/* InterruptM3_intEnable won't enable the Hwi */
Hwi_enableInterrupt(M3INT_MBX);
}
else {
Hwi_create(M3INT,
(Hwi_FuncPtr)InterruptM3_isr,
&hwiAttrs,
NULL);
}
/* Enable the mailbox interrupt to the M3 core */
InterruptM3_intEnable();
/* Restore global interrupts */
Hwi_restore(key);
}
/*
* ======== osi_RegisterInterruptHandler ========
* SimpleLink Host Driver API to register a function to handle network
* processor interrupts.
*/
int osi_RegisterInterruptHandler(P_EVENT_HANDLER InterruptHdl , void *pValue)
{
WiFiCC3100_Object *object = wifiHandle->object;
#if !defined(MSP430WARE)
WiFiCC3100_HWAttrs const *hwAttrs = wifiHandle->hwAttrs;
#endif
if(InterruptHdl == NULL) {
#if !defined(MSP430WARE)
Hwi_disableInterrupt(hwAttrs->irqIntNum);
Hwi_clearInterrupt(hwAttrs->irqIntNum);
#endif
object->wifiIntFxn = NULL;
}
else {
object->wifiIntFxn = InterruptHdl;
#if !defined(MSP430WARE)
Hwi_enableInterrupt(hwAttrs->irqIntNum);
#endif
}
return (0);
}
/*
* ======== Interrupt_intRegister ========
* Register ISR for remote processor interrupt
*/
Void Interrupt_intRegister(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo,
Fxn func, UArg arg)
{
Hwi_Params hwiAttrs;
Interrupt_FxnTable *table;
UInt pos;
Assert_isTrue(intInfo != NULL, NULL);
pos = MAP_RPROCID_TO_SRCC(remoteProcId, intInfo->localIntId);
Log_print2(Diags_USER1, "Interrupt_intRegister: pos: %d, func: 0x%x\n",
(IArg)pos, (IArg)func);
/* setup the function table with client function and arg to call: */
table = &(Interrupt_module->fxnTable[pos]);
table->func = func;
table->arg = arg;
/* Make sure the interrupt only gets plugged once */
Interrupt_module->numPlugged++;
if (Interrupt_module->numPlugged == 1) {
/* Clear all pending interrupts */
Interrupt_intClearAll();
/* Register interrupt to remote processor */
Hwi_Params_init(&hwiAttrs);
hwiAttrs.maskSetting = Hwi_MaskingOption_SELF;
hwiAttrs.arg = arg;
hwiAttrs.eventId = Interrupt_INTERDSPINT;
Hwi_create(intInfo->intVectorId,
(Hwi_FuncPtr)Interrupt_isr, &hwiAttrs, NULL);
Hwi_enableInterrupt(intInfo->intVectorId);
}
}
/*
* ======== Timer_start ========
* 1. Hwi_disable();
* 2. Clear the counters
* 3. Clear IFR
* 4. Enable timer interrupt
* 5. Start timer
* 6. Hwi_restore()
*/
Void Timer_start(Timer_Object *obj)
{
UInt key;
UInt runMode;
TimerRegs *timer;
timer = (TimerRegs *)Timer_module->device[obj->id].baseAddr;
key = Hwi_disable();
Timer_stop(obj);
/* set timer count register back to period value */
timer->tcrr = Timer_MAX_PERIOD - obj->period;
while (timer->twps & TIMER_TWPS_W_PEND_TCRR)
;
if (obj->hwi) {
Hwi_clearInterrupt(obj->intNum);
Hwi_enableInterrupt(obj->intNum);
timer->tier = obj->tier; /* enable the interrupt at the timer */
}
if (obj->runMode == Timer_RunMode_CONTINUOUS) {
runMode = TIMER_TCLR_START_CONTINUOUS;
}
else {
runMode = TIMER_TCLR_START_ONESHOT;
}
timer->tclr = runMode | obj->tclr;
while (timer->twps & TIMER_TWPS_W_PEND_TCLR)
;
Hwi_restore(key);
}
