/* ===================================================================== */
VOID Instruction(INS ins, VOID *v)
{
/*
if (INS_RegWContain(ins, REG_STACK_PTR)) {
if (INS_IsSub(ins))
{
INS_InsertCall(ins, IPOINT_BEFORE, (AFUNPTR)StackRegSubBefore,
IARG_INST_PTR,
IARG_ADDRINT, ins.q(),
IARG_REG_VALUE, REG_STACK_PTR, IARG_END);
INS_InsertCall(ins, IPOINT_AFTER, (AFUNPTR)StackRegSubAfter,
IARG_REG_VALUE, REG_STACK_PTR, IARG_END);
}
if (INS_Opcode(ins) == XED_ICLASS_ADD) {
INS_InsertCall(ins, IPOINT_BEFORE, (AFUNPTR)StackRegAddBefore,
IARG_INST_PTR,
IARG_ADDRINT, ins.q(),
IARG_REG_VALUE, REG_STACK_PTR, IARG_END);
INS_InsertCall(ins, IPOINT_AFTER, (AFUNPTR)StackRegAddAfter,
IARG_REG_VALUE, REG_STACK_PTR, IARG_END);
}
}
*/
UINT32 memOperands = INS_MemoryOperandCount(ins);
// Instrument each memory operand. If the operand is both read and written
// it will be processed twice.
// Iterating over memory operands ensures that instructions on IA-32 with
// two read operands (such as SCAS and CMPS) are correctly handled.
for (UINT32 memOp = 0; memOp < memOperands; memOp++)
{
const UINT32 size = INS_MemoryOperandSize(ins, memOp);
// const BOOL single = (size <= 4);
if (INS_MemoryOperandIsRead(ins, memOp))
{
INS_InsertCall(ins, IPOINT_BEFORE, (AFUNPTR)MemReadBefore,
IARG_INST_PTR,
IARG_MEMORYOP_EA, memOp,
IARG_ADDRINT, size,
IARG_ADDRINT, ins.q(),
IARG_REG_VALUE, REG_STACK_PTR,
IARG_REG_VALUE, REG_GBP,
IARG_BOOL, INS_IsStackRead(ins), IARG_END);
}
if (INS_MemoryOperandIsWritten(ins, memOp))
{
INS_InsertCall(ins, IPOINT_BEFORE, (AFUNPTR)MemWriteBefore,
IARG_INST_PTR,
IARG_MEMORYOP_EA, memOp,
IARG_ADDRINT, size,
IARG_ADDRINT, ins.q(),
IARG_REG_VALUE, REG_STACK_PTR,
IARG_REG_VALUE, REG_GBP,
IARG_BOOL, INS_IsStackWrite(ins), IARG_END);
}
}
}
// Pin calls this function every time a new instruction is encountered
VOID Instruction(INS ins, VOID *v)
{
if (INS_IsVgather(ins))
{
REG ymmDest = INS_OperandReg(ins, 0), ymmMask = INS_OperandReg(ins, 2);
if (!REG_is_ymm(ymmDest))
{
ymmDest = (REG)(ymmDest - REG_XMM0 + REG_YMM0);
}
if (!REG_is_ymm(ymmMask))
{
ymmMask = (REG)(ymmMask - REG_XMM0 + REG_YMM0);
}
for (UINT32 memIndex = 0;
memIndex < INS_MemoryOperandCount(ins);//each access is 1 MemoryOperand
memIndex++)
{
INS_InsertCall(ins, IPOINT_BEFORE, AFUNPTR(EmuGatherMemOp),
IARG_UINT32, memIndex,
IARG_MEMORYOP_EA, memIndex,
IARG_MEMORYOP_MASKED_ON, memIndex,
IARG_UINT32, INS_MemoryOperandSize(ins, memIndex),
IARG_UINT32, INS_MemoryOperandIsRead(ins, memIndex),
IARG_REG_REFERENCE, ymmDest,
IARG_BOOL, REG_is_ymm(INS_OperandReg(ins, 0)),
IARG_END);
REG scratchReg = GetScratchReg(memIndex);
INS_InsertCall(ins, IPOINT_BEFORE, AFUNPTR(ManipulateMemAddress),
IARG_MEMORYOP_EA, memIndex,
IARG_RETURN_REGS, scratchReg,
IARG_END);
INS_RewriteMemoryOperand(ins, memIndex, scratchReg);
}
INS_InsertCall(ins, IPOINT_BEFORE, (AFUNPTR)EmuGatherFinal,
IARG_REG_REFERENCE, ymmDest,
IARG_REG_REFERENCE, ymmMask,
IARG_END);
INS_Delete(ins);
}
}
VOID Instruction(INS ins, void * v)
{
UINT32 memOperands = INS_MemoryOperandCount(ins);
// Instrument each memory operand. If the operand is both read and written
// it will be processed twice.
// Iterating over memory operands ensures that instructions on IA-32 with
// two read operands (such as SCAS and CMPS) are correctly handled.
for (UINT32 memOp = 0; memOp < memOperands; memOp++)
{
const UINT32 size = INS_MemoryOperandSize(ins, memOp);
const BOOL single = (size <= 4);
if (INS_MemoryOperandIsRead(ins, memOp))
{
if( KnobTrackLoads )
{
// map sparse INS addresses to dense IDs
const ADDRINT iaddr = INS_Address(ins);
const UINT32 instId = profile.Map(iaddr);
if( single )
{
INS_InsertPredicatedCall(
ins, IPOINT_BEFORE, (AFUNPTR) LoadSingle,
IARG_MEMORYOP_EA, memOp,
IARG_UINT32, instId,
IARG_END);
}
else
{
INS_InsertPredicatedCall(
ins, IPOINT_BEFORE, (AFUNPTR) LoadMulti,
IARG_MEMORYOP_EA, memOp,
IARG_UINT32, size,
IARG_UINT32, instId,
IARG_END);
}
}
else
{
if( single )
{
INS_InsertPredicatedCall(
ins, IPOINT_BEFORE, (AFUNPTR) LoadSingleFast,
IARG_MEMORYOP_EA, memOp,
IARG_END);
}
else
{
INS_InsertPredicatedCall(
ins, IPOINT_BEFORE, (AFUNPTR) LoadMultiFast,
IARG_MEMORYOP_EA, memOp,
IARG_UINT32, size,
IARG_END);
}
}
}
if (INS_MemoryOperandIsWritten(ins, memOp))
{
if( KnobTrackStores )
{
const ADDRINT iaddr = INS_Address(ins);
const UINT32 instId = profile.Map(iaddr);
if( single )
{
INS_InsertPredicatedCall(
ins, IPOINT_BEFORE, (AFUNPTR) StoreSingle,
IARG_MEMORYOP_EA, memOp,
IARG_UINT32, instId,
IARG_END);
}
else
{
INS_InsertPredicatedCall(
ins, IPOINT_BEFORE, (AFUNPTR) StoreMulti,
IARG_MEMORYOP_EA,memOp,
IARG_UINT32, size,
IARG_UINT32, instId,
IARG_END);
}
}
else
{
if( single )
{
INS_InsertPredicatedCall(
ins, IPOINT_BEFORE, (AFUNPTR) StoreSingleFast,
IARG_MEMORYOP_EA, memOp,
IARG_END);
}
else
{
INS_InsertPredicatedCall(
ins, IPOINT_BEFORE, (AFUNPTR) StoreMultiFast,
IARG_MEMORYOP_EA, memOp,
IARG_UINT32, size,
IARG_END);
}
}
}
}
}
