Beispiel #1
0
void recv_short(alt_u16* buffer, alt_u16 len)
{
	alt_u16 i = 0;
	while(IORD_16DIRECT(USBFIFOCTRL_0_BASE,0x0002)& 0x0001);
	IOWR_16DIRECT(USBFIFOCTRL_0_BASE,0x0006,0x0002);
	for (i = 0; i<len;i++)
	{
		IOWR_16DIRECT(USBFIFOCTRL_0_BASE,0x0004,(unsigned int) 0x0002);
		while(IORD_16DIRECT(USBFIFOCTRL_0_BASE,0x0002)& 0x0001);
		buffer[i] = IORD_16DIRECT(USBFIFOCTRL_0_BASE,0x0000);
	}
}
Beispiel #2
0
void send_short(alt_u16* buffer, alt_u16 len)
{
	alt_u16 i = 0;
	for(i = 0; i < len-1; i++)
	{
		IOWR_16DIRECT(USBFIFOCTRL_0_BASE,0x0006,0x0003);
		while(IORD_16DIRECT(USBFIFOCTRL_0_BASE,0x0002)& 0x0001);
		IOWR_16DIRECT(USBFIFOCTRL_0_BASE,0x0000,(unsigned int) buffer[i]);
		IOWR_16DIRECT(USBFIFOCTRL_0_BASE,0x0004,(unsigned int) 0x0001);
	}
	IOWR_16DIRECT(USBFIFOCTRL_0_BASE,0x0006,0x0003);
	while(IORD_16DIRECT(USBFIFOCTRL_0_BASE,0x0002)& 0x0001);
	IOWR_16DIRECT(USBFIFOCTRL_0_BASE,0x0000,(unsigned int) buffer[len-1]);
	IOWR_16DIRECT(USBFIFOCTRL_0_BASE,0x0004,(unsigned int) 0x0005);
}
Beispiel #3
0
void rx_ethernet_isr1 (void *context)
{
		struct netif * netif = &TSE1netif;
		//Poczekanie na zakoñczenie odbióru ramki ethernetowej z³¹czem po³¹czonym z eth_tse1
		while (alt_avalon_sgdma_check_descriptor_status(&rx_descriptor1) != 0)
			;
		//dl odebranej ramki
		pklen = IORD_16DIRECT(&(rx_descriptor1.actual_bytes_transferred),0);
		//printf("dlugosc odebranych danych to: %d",pklen);
		memcpy(tx_frame,rx_frame1,pklen);
		p->payload=tx_frame;


		ethernet_input(p,netif);


		alt_avalon_sgdma_construct_mem_to_stream_desc( &tx_descriptor, &tx_descriptor_end, (alt_u32 *)tx_frame, pklen-4, 0, 1, 1, 0 );
		alt_avalon_sgdma_do_async_transfer( sgdma_tx_dev, &tx_descriptor );
		while (alt_avalon_sgdma_check_descriptor_status(&tx_descriptor) != 0);

		alt_avalon_sgdma_construct_stream_to_mem_desc( &rx_descriptor1, &rx_descriptor_end1, (alt_u32 *)rx_frame1, 0, 0 );


		alt_avalon_sgdma_do_async_transfer( sgdma_rx_dev1, &rx_descriptor1 );
		p->len=0;
		p->tot_len=0;


}
Beispiel #4
0
void rx_ethernet_isr (void *context)
{
	struct netif * netif = &TSE1netif;
	//Poczekanie na zakoñczenie odbioru ramki ethernetowej z³¹czem po³¹czonym z eth_tse
	while (alt_avalon_sgdma_check_descriptor_status(&rx_descriptor) != 0)
		;
	//zapisanie do zmiennej pklen dlugosci odebranej ramki ethernetowej
	pklen = IORD_16DIRECT(&(rx_descriptor.actual_bytes_transferred),0);

	memcpy(tx_frame,rx_frame,pklen);
	p->payload=tx_frame;
	// funkcja lwip ethernet_input obslugujaca ramkê Ethernetow¹
	ethernet_input(p,netif);

	//Wys³anie ramki ethernetowej z³¹czem po³¹czonym z eth_tse1
	alt_avalon_sgdma_construct_mem_to_stream_desc( &tx_descriptor1,
			&tx_descriptor_end1, (alt_u32 *)tx_frame, pklen-4, 0, 1, 1, 0 );
	alt_avalon_sgdma_do_async_transfer( sgdma_tx_dev1, &tx_descriptor1 );
	while (alt_avalon_sgdma_check_descriptor_status(&tx_descriptor1) != 0);

	//Ponowne skonsturowanie deskryptorów odbiorczych z³¹cza eth_tse
	alt_avalon_sgdma_construct_stream_to_mem_desc( &rx_descriptor,
			&rx_descriptor_end, (alt_u32 *)rx_frame, 0, 0 );

	alt_avalon_sgdma_do_async_transfer( sgdma_rx_dev, &rx_descriptor );

	//wyzerowanie pól z d³ugociami bufora lwIP
	p->len=0;
	p->tot_len=0;
}
Beispiel #5
0
int main()
{
	int readdata = 0;
	int offset = 0;
	int toggle = 0;

	while (offset < 200)
	{
		IOWR_16DIRECT(NEW_SDRAM_CONTROLLER_0_BASE, offset * LINE_PITCH, toggle);

		readdata = IORD_16DIRECT(NEW_SDRAM_CONTROLLER_0_BASE, offset * LINE_PITCH);

		offset++;

		if (toggle == 0)
		{
			toggle = 1;
		}
		else
		{
			toggle = 0;
		}
	}
	return 0;
}
/******************************************************************
*  Function: alt_video_display_buffer_is_available
*
*  Purpose: Checks for a free frame buffer to write to.
*
*  Returns:  0 - Found free buffer.  buffer_being_written now points to it.
*           -1 - Free buffer not available at this time. 
*
******************************************************************/
int alt_video_display_buffer_is_available( alt_video_display* display )
{
  int ret_code = 0, next_buf_index;
  alt_sgdma_descriptor *desc;
  
  if(display->num_frame_buffers > 1) {
    /* 
     * The user, via this API call, is asking us to see if its safe to 
     * write to the buffer display->buffer_ptrs[display->buffer_being_written].
     * 
     * To do so, we need to ensure that display->buffer_being_displayed
     * is accurate. The SGDMA could have finished any number of previously-
     * registered-for-display buffers and gone on to the next one, as long
     * as the user registered them with the 
     * alt_video_display_register_written_buffer() routine.
     *
     * Here we will inspect any such registered buffers that exist between
     * where buffer_being_written and buffer_being_displayed are to determine
     * if the SGDMA has processed them. If it has, then we know that the 
     * previous buffer is no longer being transferred to the video display
     * device, and is now safe to be written again, and update
     * the buffer_being_displayed index accordingly.
     */
    next_buf_index = 
      ((display->buffer_being_displayed + 1) % display->num_frame_buffers); 
      
    /* Inspect all buffers until we reach the one being written */
    while(next_buf_index != display->buffer_being_written ) {
      desc = display->buffer_ptrs[next_buf_index]->desc_base;
      /* 
       * If there are signs of actual data transfer having occured, we 
       * can safely increment the buffer_being_displayed index
       */
      if(IORD_16DIRECT(&desc->actual_bytes_transferred, 0) > 0) {
        display->buffer_being_displayed = next_buf_index; 
      }
        
      next_buf_index = ((next_buf_index + 1) % display->num_frame_buffers);
    }
    
    if( display->buffer_being_written == display->buffer_being_displayed ) { 
      ret_code = -1;
    }
  } /* if (# frame buffers > 1) */
  /* 
   * There is only one display buffer. In this case, you're always 
   * overwriting the "live" buffer on the screen. No sense in reporting 
   * a problem since you asked for it.
   */
  else {
    ret_code = 0;
  }

  return (ret_code);
}
Beispiel #7
0
//Initialize hardware-only timer
void init_timer(double period)
{
	int timer_period,status,control,tp_low,tp_high;
	bool irq,repeat;
	alt_irq_register(TIMER_0_IRQ, NULL, &timer_isr);
	timer_period = period * 50000000;
	IOWR_16DIRECT(TIMER_0_BASE, 8, timer_period & 0xFFFF);
	IOWR_16DIRECT(TIMER_0_BASE, 12, timer_period >> 16);

	tp_low = IORD_16DIRECT(TIMER_0_BASE, 8);
	tp_high = IORD_16DIRECT(TIMER_0_BASE, 12);

	//	printf("Period: %x%x\n", tp_high,tp_low);

	double dec = ((tp_high << 16) + tp_low) / 50000;

	printf("Period (decimal): %lf milliseconds\n", dec);

	//printf("Stopping Timer\n");
	status = IORD_16DIRECT(TIMER_0_BASE, 0);
	//printf("Status: %x\n", status);
	if (status & 0x2) {
		printf("Timer stopped\n");
		IOWR_16DIRECT(TIMER_0_BASE, 4, 1 << 3);
	}
	if (status & 0x1) {
		printf("Reset TO\n");
		IOWR_16DIRECT(TIMER_0_BASE, 0, 0);
	}

	control = IORD_16DIRECT(TIMER_0_BASE, 4);
	//printf("Control: %x\n", control);
	irq = (control & 0x1);
	repeat = (control & 0x2) >> 1;
	if ((!irq) || (!repeat)){
		IOWR_16DIRECT(TIMER_0_BASE, 4, 3);
	}

	control = IORD_16DIRECT(TIMER_0_BASE, 4);
	//printf("New control: %x\n", control);

}
bool sd_card_wait_read_sector()
{
	short int reg_state;
	do {
		reg_state = (short int) IORD_16DIRECT(aux_status_register,0);
	} while ((reg_state & 0x04)!=0);
	// Make sure the request did not time out.
	if ((reg_state & 0x10) == 0)
		return true;
	else
		return false;
}
/** Prints the current colour palette in the palette shifter to the niosII
 *  console */
void printPalette(int n){
	// Print everything in the palette ram, upto int colours.
	int i;
	unsigned int c;

	unsigned int results[512] = {'\0'};

	for (i = 0; i < n; i++){
		c = IORD_16DIRECT(COLOUR_PALETTE_SHIFTER_0_BASE, 2*i); //offset multiplied by 2 to be on 16-bit boundaries.
		//alt_printf("palette[ %x ]: %x ", 2*i, c);
		results[i] = c;
	}

	for (i = 0; i < n; i++){
		alt_printf("palette[ %x ]: %x ", 2*i, results[i]);
	}

}
Beispiel #10
0
/******************************************************************
*  Function: MemTest8_16BitAccess
*
*  Purpose: Tests that the memory at the specified base address
*           can be read and written in both byte and half-word 
*           modes.
*
******************************************************************/
static int MemTest8_16BitAccess(unsigned int memory_base)
{
  int ret_code = 0x0;

  /* Write 4 bytes */
  IOWR_8DIRECT(memory_base, 0, 0x0A);
  IOWR_8DIRECT(memory_base, 1, 0x05);
  IOWR_8DIRECT(memory_base, 2, 0xA0);
  IOWR_8DIRECT(memory_base, 3, 0x50);

  /* Read it back as one word */
  if(IORD_32DIRECT(memory_base, 0) != 0x50A0050A)
  {
    ret_code = memory_base;
  }

  /* Read it back as two half-words */
  if (!ret_code)
  {
    if ((IORD_16DIRECT(memory_base, 2) != 0x50A0) ||
        (IORD_16DIRECT(memory_base, 0) != 0x050A))
    {
      ret_code = memory_base;
    }
  }

  /* Read it back as 4 bytes */
  if (!ret_code)
  {
    if ((IORD_8DIRECT(memory_base, 3) != 0x50) ||
        (IORD_8DIRECT(memory_base, 2) != 0xA0) ||
        (IORD_8DIRECT(memory_base, 1) != 0x05) ||
        (IORD_8DIRECT(memory_base, 0) != 0x0A))
    {
    ret_code = memory_base;
    }
  }

  /* Write 2 half-words */
  if (!ret_code)
  {
    IOWR_16DIRECT(memory_base, 0, 0x50A0);
    IOWR_16DIRECT(memory_base, 2, 0x050A);

    /* Read it back as one word */
    if(IORD_32DIRECT(memory_base, 0) != 0x050A50A0)
    {
      ret_code = memory_base;
    }
  }

  /* Read it back as two half-words */
  if (!ret_code)
  {
    if ((IORD_16DIRECT(memory_base, 2) != 0x050A) ||
        (IORD_16DIRECT(memory_base, 0) != 0x50A0))
    {
      ret_code = memory_base;
    }
  }

  /* Read it back as 4 bytes */
  if (!ret_code)
  {
    if ((IORD_8DIRECT(memory_base, 3) != 0x05) ||
        (IORD_8DIRECT(memory_base, 2) != 0x0A) ||
        (IORD_8DIRECT(memory_base, 1) != 0x50) ||
        (IORD_8DIRECT(memory_base, 0) != 0xA0))
    {
      ret_code = memory_base;
    }
  }

  return(ret_code);
}
//------------------------------------------------------------------------------
UINT16 openmac_getDmaObserver(UINT adapter_p)
{
    UNUSED_PARAMETER(adapter_p);

    return IORD_16DIRECT(OPENMAC_DOB_BASE, 0);
}
Beispiel #12
0
// Test code from lab
void timer_test(void) {
	int freq;
	int cycles;
	float duration;
	int ticks_start;
	int ticks_end;
	int ticks_per_s;
	int ticks_duration;
	int timer_period;
	int status;
	int done;

	printf("Timers\n");
	printf(" Sys Clock Timer\n");
	ticks_per_s = alt_ticks_per_second();
	printf("Tick Freq: %d\n", ticks_per_s);
	printf(" Recording starting ticks\n");
	ticks_start = alt_nticks();
	printf(" Sleeping for 5 seconds\n");
	usleep(5000000);
	printf(" Recording ending ticks\n");
	ticks_end = alt_nticks();
	ticks_duration = ticks_end -ticks_start;
	duration = (float) ticks_duration / (float) ticks_per_s;
	printf(" The program slept for %d ticks (%f seconds)\n\n", ticks_duration,
	duration);

	printf(" Timestamp Timer\n");
	freq = alt_timestamp_freq();
	printf(" CPU Freq: %d\n", freq);
	printf(" Resetting Timestamp timer\n");
	alt_timestamp_start();
	printf(" ...Timing the print of this statement...\n");
	cycles = alt_timestamp();
	duration = (float) cycles / (float) freq;
	printf(" It took %d cycles (%f seconds) to print the statement\n\n",
	cycles, duration);

	printf(" Hardware-Only Timer\n");
	printf(" Setting timer period to 5 seconds.\n");
	timer_period = 5 * CLOCK_FREQ;
	// Setting the period registers must be done in 2 steps as they are only 16 bits wide
	IOWR_16DIRECT(MY_HW_ONLY_TIMER_BASE, 8, timer_period & 0xFFFF); // less significant word
	IOWR_16DIRECT(MY_HW_ONLY_TIMER_BASE,12, timer_period >> 16); // more significant word
	printf(" Stopping Timer\n");
	status = IORD_16DIRECT(MY_HW_ONLY_TIMER_BASE, 0); // read status registers
	// Write the control registers
	if(status & 0x2) {
		IOWR_16DIRECT(MY_HW_ONLY_TIMER_BASE, 4, 1 << 3); // stop the timer if it was started
	}
	printf(" Starting Timer\n");
	IOWR_16DIRECT(MY_HW_ONLY_TIMER_BASE, 4, 1 << 2); // start the timer

	printf("  Waiting for timer to expire...\n");
	done = 0;
	while(! done) {
		status = IORD_16DIRECT(MY_HW_ONLY_TIMER_BASE, 0); // read status registers
		done = status & 0x1;
	}
	printf(" 5 seconds timer is done\n");
}
Beispiel #13
0
int hasHardwareTimerExpired(void)
{
	return IORD_16DIRECT(MY_HW_ONLY_TIMER_BASE, 0);
}
Beispiel #14
0
int isHardwareTimerRunning(void)
{
	int status = IORD_16DIRECT(MY_HW_ONLY_TIMER_BASE, 0);
	return status & 0x2; // not totally sure on this
}
Beispiel #15
0
int main()
{
	printf("hello\n");

	int j=0;
	int i=0;
	int rc;
	void* tx_data = AVALON_MM_CAMERA_CONTROLLER_BASE+2;
	void* rx_buffer = SDRAM_BASE;

	alt_dma_txchan txchan;
	alt_dma_rxchan rxchan;

	if ((txchan = alt_dma_txchan_open("/dev/dma")) == NULL)
	{
		return 0;
	}

	if ((rxchan = alt_dma_rxchan_open("/dev/dma")) == NULL)
	{
		return 0;
	}

	alt_dma_rxchan_ioctl(rxchan,ALT_DMA_SET_MODE_16,done);
	alt_dma_txchan_ioctl(txchan,ALT_DMA_SET_MODE_16,done);

	i=1;



	while(i < 5){

		while(!(IORD_16DIRECT(AVALON_MM_CAMERA_CONTROLLER_BASE,1282*2) == (0x400 + i))){
			IOWR_16DIRECT(AVALON_MM_CAMERA_CONTROLLER_BASE,1281*2,0x1);
		}

		if(i%2 == 0){
			if ((rc = alt_dma_txchan_send (txchan, tx_data, 640 * 2, NULL, NULL)) < 0)
			{
				return 0;
			}
		}else{
			if ((rc = alt_dma_txchan_send (txchan, tx_data + 1280, 640 * 2, NULL, NULL)) < 0)
			{
				return 0;
			}
		}

		if ((rc = alt_dma_rxchan_prepare (rxchan, rx_buffer + 1280*(i-1), 640*2, done, NULL)) < 0)
		{
			return 0;
		}


		while (!rx_done);

		i++;

	}

	while (1);

	return 0;
}