C++ (Cpp) IRQ_PPI Beispiele

Beispiel #1

Datei: common.c Projekt: 33d/linux-2.6.21-hh20

void __init exynos4_init_irq(void)
{
	int irq;
	unsigned int gic_bank_offset;

	gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;

	if (!of_have_populated_dt())
		gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
#ifdef CONFIG_OF
	else
		of_irq_init(exynos4_dt_irq_match);
#endif

	for (irq = 0; irq < MAX_COMBINER_NR; irq++) {

		combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
				COMBINER_IRQ(irq, 0));
		combiner_cascade_irq(irq, IRQ_SPI(irq));
	}

	/*
	 * The parameters of s5p_init_irq() are for VIC init.
	 * Theses parameters should be NULL and 0 because EXYNOS4
	 * uses GIC instead of VIC.
	 */
	s5p_init_irq(NULL, 0);
}

Beispiel #2

Datei: common.c Projekt: 08opt/linux

void __init exynos4_init_irq(void)
{
	int irq;

	gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;

	gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
	gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
	gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
	gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;

	for (irq = 0; irq < MAX_COMBINER_NR; irq++) {

		combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
				COMBINER_IRQ(irq, 0));
		combiner_cascade_irq(irq, IRQ_SPI(irq));
	}

	/*
	 * The parameters of s5p_init_irq() are for VIC init.
	 * Theses parameters should be NULL and 0 because EXYNOS4
	 * uses GIC instead of VIC.
	 */
	s5p_init_irq(NULL, 0);
}

Beispiel #3

Datei: common.c Projekt: crseanpaul/muon-catalyzed-fusion

void __init exynos4_init_irq(void)
{
	unsigned int gic_bank_offset;

	gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;

	if (!of_have_populated_dt())
		gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
#ifdef CONFIG_OF
	else
		of_irq_init(exynos_dt_irq_match);
#endif

	if (!of_have_populated_dt()) {
		combiner_init(S5P_VA_COMBINER_BASE, NULL);
		exynos_init_irq_eint(NULL, NULL);
	}
}

Beispiel #4

Datei: common.c Projekt: rslotte/OGS-Arm

void __init exynos4_init_irq(void)
{
    unsigned int gic_bank_offset;

    gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;

    if (!of_have_populated_dt())
        gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
#ifdef CONFIG_OF
    else
        of_irq_init(exynos4_dt_irq_match);
#endif

    if (!of_have_populated_dt())
        combiner_init(S5P_VA_COMBINER_BASE, NULL);

    /*
     * The parameters of s5p_init_irq() are for VIC init.
     * Theses parameters should be NULL and 0 because EXYNOS4
     * uses GIC instead of VIC.
     */
    s5p_init_irq(NULL, 0);
}