void SiiMhlTxDeviceIsr( void )
{
uint8_t intMStatus, i;
#ifdef TRACE_INT_TIME
unsigned long K1;
unsigned long K2;
printk("-------------------SiiMhlTxDeviceIsr start -----------------\n");
K1 = get_jiffies_64();
#endif
i=0;
do
{
if( POWER_STATE_D0_MHL != fwPowerState )
{
if(I2C_INACCESSIBLE == Int4Isr())
{
TX_DEBUG_PRINT(("Drv: I2C_INACCESSIBLE in Int4Isr in not D0 mode\n"));
return;
}
}
else if( POWER_STATE_D0_MHL == fwPowerState )
{
if(I2C_INACCESSIBLE == Int4Isr())
{
TX_DEBUG_PRINT(("Drv: I2C_INACCESSIBLE in Int4Isr in D0 mode\n"));
return;
}
MhlCbusIsr();
Int5Isr();
Int1Isr();
Int2Isr();
}
if( POWER_STATE_D3 != fwPowerState )
{
MhlTxProcessEvents();
}
intMStatus = SiiRegRead(REG_INTR_STATE);
if(0xFF == intMStatus)
{
intMStatus = 0;
TX_DEBUG_PRINT(("Drv: EXITING ISR DUE TO intMStatus - 0xFF loop = [%02X] intMStatus = [%02X] \n\n", (int) i, (int)intMStatus));
}
i++;
intMStatus &= 0x01;
if(i>60)
{
TX_DEBUG_PRINT(("force exit SiiMhlTxDeviceIsr \n"));
break;
}
else if(i> 50)
{
TX_DEBUG_PRINT(("something error in SiiMhlTxDeviceIsr \n"));
}
} while (intMStatus);
#ifdef TRACE_INT_TIME
K2 = get_jiffies_64();
printk("-------------------SiiMhlTxDeviceIsr last %d ms----------------\n",(int)(K2 - K1));
#endif
}
// This function has no parameters and returns nothing.
//
// This is the master interrupt handler for 9244. It calls sub handlers
// of interest. Still couple of status would be required to be picked up
// in the monitoring routine (Sii9244TimerIsr)
//
// To react in least amount of time hook up this ISR to processor's
// interrupt mechanism.
//
// Just in case environment does not provide this, set a flag so we
// call this from our monitor (Sii9244TimerIsr) in periodic fashion.
//
// Device Interrupts we would look at
// RGND = to wake up from D3
// MHL_EST = connection establishment
// CBUS_LOCKOUT= Service USB switch
// CBUS = responder to peer messages
// Especially for DCAP etc time based events
//
void SiiMhlTxDeviceIsr (void)
{
uint8_t intMStatus, i; //master int status
//
// Look at discovery interrupts if not yet connected.
//
i=0;
do
{
if( POWER_STATE_D0_MHL != fwPowerState )
{
//
// Check important RGND, MHL_EST, CBUS_LOCKOUT and SCDT interrupts
// During D3 we only get RGND but same ISR can work for both states
//
if (I2C_INACCESSIBLE == Int4Isr())
{
pr_err("%s:===========>exe int4 reg inaccessible so reture \n",__func__);
return; // don't do any more I2C traffic until the next interrupt.
}
}
else if( POWER_STATE_D0_MHL == fwPowerState )
{
if (I2C_INACCESSIBLE == Int4Isr())
{
return; // don't do any more I2C traffic until the next interrupt.
}
if(POWER_STATE_D0_MHL == fwPowerState)
{
#if 1
TX_DEBUG_PRINT(("********* EXITING ISR *************\n"));
TX_DEBUG_PRINT(("Drv: INT1 Status = %02X\n", (int) SiiRegRead((TX_PAGE_L0 | 0x0071))));
TX_DEBUG_PRINT(("Drv: INT2 Status = %02X\n", (int) SiiRegRead((TX_PAGE_L0 | 0x0072))));
TX_DEBUG_PRINT(("Drv: INT3 Status = %02X\n", (int) SiiRegRead((TX_PAGE_L0 | 0x0073))));
TX_DEBUG_PRINT(("Drv: INT4 Status = %02X\n", (int) SiiRegRead(REG_INTR4)));
TX_DEBUG_PRINT(("Drv: INT5 Status = %02X\n", (int) SiiRegRead(REG_INTR5)));
TX_DEBUG_PRINT(("Drv: cbusInt Status = %02X\n", (int) SiiRegRead(TX_PAGE_CBUS | 0x0008)));
TX_DEBUG_PRINT(("Drv: CBUS INTR_2: 0x1E: %02X\n", (int) SiiRegRead(TX_PAGE_CBUS | 0x001E)));
TX_DEBUG_PRINT(("Drv: A0 INT Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00A0))));
TX_DEBUG_PRINT(("Drv: A1 INT Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00A1))));
TX_DEBUG_PRINT(("Drv: A2 INT Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00A2))));
TX_DEBUG_PRINT(("Drv: A3 INT Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00A3))));
TX_DEBUG_PRINT(("Drv: B0 STATUS Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00B0))));
TX_DEBUG_PRINT(("Drv: B1 STATUS Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00B1))));
TX_DEBUG_PRINT(("Drv: B2 STATUS Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00B2))));
TX_DEBUG_PRINT(("Drv: B3 STATUS Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00B3))));
TX_DEBUG_PRINT(("Drv: E0 STATUS Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00E0))));
TX_DEBUG_PRINT(("Drv: E1 STATUS Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00E1))));
TX_DEBUG_PRINT(("Drv: E2 STATUS Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00E2))));
TX_DEBUG_PRINT(("Drv: E3 STATUS Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00E3))));
TX_DEBUG_PRINT(("Drv: F0 INT Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00F0))));
TX_DEBUG_PRINT(("Drv: F1 INT Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00F1))));
TX_DEBUG_PRINT(("Drv: F2 INT Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00F2))));
TX_DEBUG_PRINT(("Drv: F3 INT Set = %02X\n", (int) SiiRegRead((TX_PAGE_CBUS | 0x00F3))));
TX_DEBUG_PRINT(("********* END OF EXITING ISR *************\n"));
#endif
// If the Int4Isr handler didn't move the transmitter to D3 as the
// result of a cable disconnection continue to check other interrupt
// sources.
Int5Isr();
// Check for any peer messages for DCAP_CHG etc
// Dispatch to have the CBUS module working only once connected.
MhlCbusIsr();
Int1Isr();
}
}
if( POWER_STATE_D3 != fwPowerState )
{
// Call back into the MHL component to give it a chance to
// take care of any message processing caused by this interrupt.
MhlTxProcessEvents();
}
intMStatus = SiiRegRead(REG_INTR_STATE); // read status
if(0xFF == intMStatus)
{
intMStatus = 0;
TX_DEBUG_PRINT(("\nDrv: EXITING ISR DUE TO intMStatus - 0xFF loop = [%02X] intMStatus = [%02X] \n\n", (int) i, (int)intMStatus));
}
i++;
intMStatus &= 0x01; //RG mask bit 0
} while (intMStatus);
}
