static bool udd_ctrl_interrupt(void)
{
if (!Is_udd_endpoint_interrupt(0)) {
return false; // No interrupt events on control endpoint
}
dbg_print("0: ");
// By default disable overflow and underflow interrupt
udd_disable_nak_in_interrupt(0);
udd_disable_nak_out_interrupt(0);
// Search event on control endpoint
if (Is_udd_setup_received(0)) {
dbg_print("stup ");
// SETUP packet received
udd_ctrl_setup_received();
return true;
}
if (Is_udd_in_send(0) && Is_udd_in_send_interrupt_enabled(0)) {
dbg_print("in ");
// IN packet sent
udd_ctrl_in_sent();
return true;
}
if (Is_udd_out_received(0)) {
dbg_print("out ");
// OUT packet received
udd_ctrl_out_received();
return true;
}
if (Is_udd_nak_out(0)) {
dbg_print("nako ");
// Overflow on OUT packet
udd_ack_nak_out(0);
udd_ctrl_overflow();
return true;
}
if (Is_udd_nak_in(0)) {
dbg_print("naki ");
// Underflow on IN packet
udd_ack_nak_in(0);
udd_ctrl_underflow();
return true;
}
dbg_print("n%x ", (int)UHDP_ARRAY(UOTGHS_DEVEPTISR[0], 0));
return false;
}
static void udd_ctrl_underflow(void)
{
if (Is_udd_out_received(0))
return; // underflow ignored if OUT data is received
if (UDD_EPCTRL_DATA_OUT == udd_ep_control_state) {
// Host want to stop OUT transaction
// then stop to wait OUT data phase and wait IN ZLP handshake
udd_ctrl_send_zlp_in();
} else if (UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP == udd_ep_control_state) {
// A OUT handshake is waiting by device,
// but host want extra IN data then stall extra IN data
udd_enable_stall_handshake(0);
}
}
/**
* \brief Sends a DATA OUT packets on control endpoint
*
* \param payload Data buffer to send
* \param size Size of buffer
*/
static void main_usb_wait_out(uint8_t *payload, uint8_t size)
{
uint8_t nb_data;
do {
while (!Is_udd_out_received(0));
// Read data received during OUT phase
nb_data = udd_byte_count(0);
uint8_t *ptr_src = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8);
for (uint8_t i = 0; (i < nb_data) && size; i++) {
*payload++ = *ptr_src++;
size--;
}
// Send IN ZLP to ACK setup request
udd_ack_out_received(0);
} while(size);
}
static bool udd_ctrl_interrupt(void)
{
if (!Is_udd_endpoint_interrupt(0))
return false; // No interrupt events on control endpoint
// By default disable overflow and underflow interrupt
udd_disable_nak_in_interrupt(0);
udd_disable_nak_out_interrupt(0);
// Search event on control endpoint
if (Is_udd_setup_received(0)) {
// SETUP packet received
udd_ctrl_setup_received();
return true;
}
if (Is_udd_in_send(0) && Is_udd_in_send_interrupt_enabled(0)) {
// IN packet sent
udd_ctrl_in_sent();
return true;
}
if (Is_udd_out_received(0)) {
// OUT packet received
udd_ctrl_out_received();
return true;
}
if (Is_udd_nak_out(0)) {
// Overflow on OUT packet
udd_ack_nak_out(0);
udd_ctrl_overflow();
return true;
}
if (Is_udd_nak_in(0)) {
// Underflow on IN packet
udd_ack_nak_in(0);
udd_ctrl_underflow();
return true;
}
return false;
}
static void udd_ctrl_in_sent(void)
{
static bool b_shortpacket = false;
uint16_t nb_remain;
uint8_t i;
uint8_t *ptr_dest, *ptr_src;
irqflags_t flags;
flags = cpu_irq_save();
udd_disable_in_send_interrupt(0);
cpu_irq_restore(flags);
if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) {
// ZLP on IN is sent, then valid end of setup request
udd_ctrl_endofrequest();
// Reinitializes control endpoint management
udd_ctrl_init();
return;
}
Assert(udd_ep_control_state == UDD_EPCTRL_DATA_IN);
nb_remain = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans;
if (0 == nb_remain) {
// All content of current buffer payload are sent
// Update number of total data sending by previous payload buffer
udd_ctrl_prev_payload_nb_trans += udd_ctrl_payload_nb_trans;
if ((udd_g_ctrlreq.req.wLength == udd_ctrl_prev_payload_nb_trans)
|| b_shortpacket) {
// All data requested are transfered or a short packet has been sent
// then it is the end of data phase.
// Generate an OUT ZLP for handshake phase.
udd_ctrl_send_zlp_out();
return;
}
// Need of new buffer because the data phase is not complete
if ((!udd_g_ctrlreq.over_under_run)
|| (!udd_g_ctrlreq.over_under_run())) {
// Underrun then send zlp on IN
// Here nb_remain=0 and allows to send a IN ZLP
} else {
// A new payload buffer is given
udd_ctrl_payload_nb_trans = 0;
nb_remain = udd_g_ctrlreq.payload_size;
}
}
// Continue transfer and send next data
if (nb_remain >= USB_DEVICE_EP_CTRL_SIZE) {
nb_remain = USB_DEVICE_EP_CTRL_SIZE;
b_shortpacket = false;
} else {
b_shortpacket = true;
}
// Fill buffer of endpoint control
ptr_dest = (uint8_t *) & udd_get_endpoint_fifo_access(0, 8);
ptr_src = udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans;
//** Critical section
// Only in case of DATA IN phase abort without USB Reset signal after.
// The IN data don't must be written in endpoint 0 DPRAM during
// a next setup reception in same endpoint 0 DPRAM.
// Thereby, an OUT ZLP reception must check before IN data write
// and if no OUT ZLP is received the data must be written quickly (800us)
// before an eventually ZLP OUT and SETUP reception
flags = cpu_irq_save();
if (Is_udd_out_received(0)) {
// IN DATA phase aborted by OUT ZLP
cpu_irq_restore(flags);
udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP;
return; // Exit of IN DATA phase
}
// Write quickly the IN data
for (i = 0; i < nb_remain; i++) {
*ptr_dest++ = *ptr_src++;
}
udd_ctrl_payload_nb_trans += nb_remain;
// Validate and send the data available in the control endpoint buffer
udd_ack_in_send(0);
udd_enable_in_send_interrupt(0);
// In case of abort of DATA IN phase, no need to enable nak OUT interrupt
// because OUT endpoint is already free and ZLP OUT accepted.
cpu_irq_restore(flags);
}
static void udd_ctrl_in_sent(void)
{
uint16_t nb_remain;
irqflags_t flags;
flags = cpu_irq_save();
udd_disable_in_send_interrupt(0);
cpu_irq_restore(flags);
if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) {
// ZLP on IN is sent, then valid end of setup request
udd_ctrl_endofrequest();
// Reinitializes control endpoint management
udd_ctrl_init();
return;
}
Assert(udd_ep_control_state == UDD_EPCTRL_DATA_IN);
nb_remain = udd_g_ctrlreq.payload_size - udd_ctrl_payload_nb_trans;
if (0 == nb_remain) {
// All content of current buffer payload are sent
if (!udd_ctrl_payload_need_in_zlp) {
// It is the end of data phase, because the last data packet is a short packet
// then generate an OUT ZLP for handshake phase.
udd_ctrl_send_zlp_out();
return;
}
if ((udd_g_ctrlreq.req.wLength > (udd_ctrl_prev_payload_nb_trans
+
udd_g_ctrlreq.
payload_size))
|| (!udd_g_ctrlreq.over_under_run)
|| (!udd_g_ctrlreq.over_under_run())) {
// Underrun or data packet complette than send zlp on IN (note don't change DataToggle)
udd_ctrl_payload_need_in_zlp = false;
// nb_remain==0 allows to send a IN ZLP
} else {
// A new payload buffer is given
// Update number of total data sending by previous playlaod buffer
udd_ctrl_prev_payload_nb_trans +=
udd_ctrl_payload_nb_trans;
// Update maangement of current playoad transfer
udd_ctrl_payload_nb_trans = 0;
nb_remain = udd_g_ctrlreq.payload_size;
// Compute if an IN ZLP must be send after IN data
udd_ctrl_payload_need_in_zlp =
((udd_g_ctrlreq.payload_size %
USB_DEVICE_EP_CTRL_SIZE)
== 0);
}
}
// Continue transfer and send next data
if (nb_remain > USB_DEVICE_EP_CTRL_SIZE) {
nb_remain = USB_DEVICE_EP_CTRL_SIZE;
}
//** Critical section
// Only in case of DATA IN phase abort without USB Reset signal after.
// The IN data don't must be writed in endpoint 0 DPRAM during
// a next setup reception in same endpoint 0 DPRAM.
// Thereby, an OUT ZLP reception must check before IN data write
// and if no OUT ZLP is recevied the data must be written quickly (800us)
// before an eventually ZLP OUT and SETUP reception
flags = cpu_irq_save();
if (Is_udd_out_received(0)) {
// IN DATA phase aborted by OUT ZLP
cpu_irq_restore(flags);
udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP;
return; // Exit of IN DATA phase
}
// Write quickly the IN data
memcpy(udd_ctrl_buffer,
udd_g_ctrlreq.payload + udd_ctrl_payload_nb_trans,
nb_remain);
udd_ctrl_payload_nb_trans += nb_remain;
udd_udesc_set_buf0_ctn(0, nb_remain);
// Validate and send the data available in the control endpoint buffer
udd_ack_in_send(0);
udd_enable_in_send_interrupt(0);
// In case of abort of DATA IN phase, no need to enable nak OUT interrupt
// because OUT endpoint is already free and ZLP OUT accepted.
cpu_irq_restore(flags);
}