/*-------------------------------------------------------------------*/
void Map243_Init()
{
/* Initialize Mapper */
MapperInit = Map243_Init;
/* Write to Mapper */
MapperWrite = Map0_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map243_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMPAGE( 2 );
ROMBANK3 = ROMPAGE( 3 );
/* Set PPU Banks */
if ( NesHeader.byVRomSize > 0 )
{
int nPage ;
for (nPage = 0; nPage < 8; ++nPage )
{
PPUBANK[ nPage ] = VROMPAGE( nPage );
}
InfoNES_SetupChr();
}
/* Initialize state registers */
Map243_Regs[0] = Map243_Regs[1] = Map243_Regs[2] = Map243_Regs[3] = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map105_Init()
{
/* Initialize Mapper */
MapperInit = Map105_Init;
/* Write to Mapper */
MapperWrite = Map105_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map105_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMPAGE( 2 );
ROMBANK3 = ROMPAGE( 3 );
/* Set PPU Banks */
Map105_Reg[0] = 0x0C;
Map105_Reg[1] = 0x00;
Map105_Reg[2] = 0x00;
Map105_Reg[3] = 0x10;
Map105_Bits = 0;
Map105_Write_Count = 0;
Map105_IRQ_Counter = 0;
Map105_IRQ_Enable = 0;
Map105_Init_State = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map17_Init()
{
/* Initialize Mapper */
MapperInit = Map17_Init;
/* Write to Mapper */
MapperWrite = Map0_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map17_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map17_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( NesHeader.byVRomSize > 0 )
{
for ( int nPage = 0; nPage < 8; ++nPage )
PPUBANK[ nPage ] = VROMPAGE( nPage );
InfoNES_SetupChr();
}
/* Initialize State Registers */
Map17_IRQ_Enable = 0;
Map17_IRQ_Cnt = 0;
Map17_IRQ_Latch = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map109_Init()
{
/* Initialize Mapper */
MapperInit = Map109_Init;
/* Write to Mapper */
MapperWrite = Map0_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map109_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMPAGE( 2 );
ROMBANK3 = ROMPAGE( 3 );
/* Initialize Registers */
Map109_Reg = 0;
Map109_Chr0 = 0;
Map109_Chr1 = 0;
Map109_Chr2 = 0;
Map109_Chr3 = 0;
Map109_Chrmode0 = 0;
Map109_Chrmode1 = 0;
/* Set PPU Banks */
Map109_Set_PPU_Banks();
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map188_Init()
{
/* Initialize Mapper */
MapperInit = Map188_Init;
/* Write to Mapper */
MapperWrite = Map188_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = Map188_Dummy;
/* Set ROM Banks */
if ( ( NesHeader.byRomSize << 1 ) > 16 )
{
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMPAGE( 14 );
ROMBANK3 = ROMPAGE( 15 );
} else {
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
}
/* Magic Code */
Map188_Dummy[ 0 ] = 0x03;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map18_Init()
{
/* Initialize Mapper */
MapperInit = Map18_Init;
/* Write to Mapper */
MapperWrite = Map18_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map18_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Initialize Regs */
int i ;
for (i = 0; i < sizeof( Map18_Regs ); i++ )
{
Map18_Regs[ i ] = 0;
}
Map18_IRQ_Enable = 0;
Map18_IRQ_Latch = 0;
Map18_IRQ_Cnt = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map251_Init()
{
/* Initialize Mapper */
MapperInit = Map251_Init;
/* Write to Mapper */
MapperWrite = Map251_Write;
/* Write to SRAM */
MapperSram = Map251_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Set Registers */
InfoNES_Mirroring( 1 );
int i;
for( i = 0; i < 11; i++ )
Map251_Reg[i] = 0;
for( i = 0; i < 4; i++ )
Map251_Breg[i] = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map185_Init()
{
int nPage;
/* Initialize Mapper */
MapperInit = Map185_Init;
/* Write to Mapper */
MapperWrite = Map185_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMPAGE( 2 );
ROMBANK3 = ROMPAGE( 3 );
/* Initialize Dummy VROM */
for ( nPage = 0; nPage < 0x400; nPage++ )
{
Map185_Dummy_Chr_Rom[ nPage ] = 0xff;
}
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map235_Init()
{
int i;
/* Initialize Mapper */
MapperInit = Map235_Init;
/* Write to Mapper */
MapperWrite = Map235_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set Registers */
for( i = 0; i < 0x2000; i++ ) {
DRAM[i] = 0xFF;
}
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMPAGE( 2 );
ROMBANK3 = ROMPAGE( 3 );
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map232_Init()
{
/* Initialize Mapper */
MapperInit = Map232_Init;
/* Write to Mapper */
MapperWrite = Map232_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Initialize Registers */
Map232_Regs[0] = 0x0C;
Map232_Regs[1] = 0x00;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map46_Init()
{
/* Initialize Mapper */
MapperInit = Map46_Init;
/* Write to Mapper */
MapperWrite = Map46_Write;
/* Write to SRAM */
MapperSram = Map46_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
Map46_Regs[ 0 ] = Map46_Regs[ 1 ] = Map46_Regs[ 2 ] = Map46_Regs[ 3 ] = 0;
Map46_Set_ROM_Banks();
/* Name Table Mirroring */
InfoNES_Mirroring( 1 );
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map194_Init()
{
/* Initialize Mapper */
MapperInit = Map194_Init;
/* Write to Mapper */
MapperWrite = Map194_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map0_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( (NesHeader.byRomSize<<1) - 4 );
ROMBANK1 = ROMPAGE( (NesHeader.byRomSize<<1) - 3 );
ROMBANK2 = ROMPAGE( (NesHeader.byRomSize<<1) - 2 );
ROMBANK3 = ROMPAGE( (NesHeader.byRomSize<<1) - 1 );
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map115_Init()
{
int i;
/* Initialize Mapper */
MapperInit = Map115_Init;
/* Write to Mapper */
MapperWrite = Map115_Write;
/* Write to SRAM */
MapperSram = Map115_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map115_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Initialize Registers */
for( i = 0; i < 8; i++ ) {
Map115_Reg[i] = 0x00;
}
Map115_Prg0 = Map115_Prg0L = 0;
Map115_Prg1 = Map115_Prg1L = 1;
Map115_Prg2 = ( NesHeader.byRomSize << 1 ) - 2;
Map115_Prg3 = ( NesHeader.byRomSize << 1 ) - 1;
Map115_ExPrgSwitch = 0;
Map115_ExChrSwitch = 0;
/* Set ROM Banks */
Map115_Set_CPU_Banks();
/* Set PPU Banks */
if ( NesHeader.byVRomSize > 0 ) {
Map115_Chr0 = 0;
Map115_Chr1 = 1;
Map115_Chr2 = 2;
Map115_Chr3 = 3;
Map115_Chr4 = 4;
Map115_Chr5 = 5;
Map115_Chr6 = 6;
Map115_Chr7 = 7;
Map115_Set_PPU_Banks();
} else {
Map115_Chr0 = Map115_Chr2 = Map115_Chr4 = Map115_Chr5 = Map115_Chr6 = Map115_Chr7 = 0;
Map115_Chr1 = Map115_Chr3 = 1;
}
Map115_IRQ_Enable = 0; /* Disable */
Map115_IRQ_Counter = 0;
Map115_IRQ_Latch = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map90_Init()
{
int nPage;
BYTE byPage;
/* Initialize Mapper */
MapperInit = Map90_Init;
/* Write to Mapper */
MapperWrite = Map90_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map90_Apu;
/* Read from APU */
MapperReadApu = Map90_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map90_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMLASTPAGE( 3 );
ROMBANK1 = ROMLASTPAGE( 2 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( NesHeader.byVRomSize > 0 )
{
for ( nPage = 0; nPage < 8; ++nPage )
PPUBANK[ nPage ] = VROMPAGE( nPage );
InfoNES_SetupChr();
}
/* Initialize IRQ Registers */
Map90_IRQ_Cnt = 0;
Map90_IRQ_Latch = 0;
Map90_IRQ_Enable = 0;
for ( byPage = 0; byPage < 4; byPage++ )
{
Map90_Prg_Reg[ byPage ] = ( NesHeader.byRomSize << 1 ) - 4 + byPage;
Map90_Nam_Low_Reg[ byPage ] = 0;
Map90_Nam_High_Reg[ byPage ] = 0;
Map90_Chr_Low_Reg[ byPage ] = byPage;
Map90_Chr_High_Reg[ byPage ] = 0;
Map90_Chr_Low_Reg[ byPage + 4 ] = byPage + 4;
Map90_Chr_High_Reg[ byPage + 4 ] = 0;
}
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map100_Init()
{
/* Initialize Mapper */
MapperInit = Map100_Init;
/* Write to Mapper */
MapperWrite = Map100_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map100_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( NesHeader.byVRomSize > 0 )
{
Map100_Chr0 = 0;
Map100_Chr1 = 1;
Map100_Chr2 = 2;
Map100_Chr3 = 3;
Map100_Chr4 = 4;
Map100_Chr5 = 5;
Map100_Chr6 = 6;
Map100_Chr7 = 7;
Map100_Set_PPU_Banks();
} else {
Map100_Chr0 = Map100_Chr2 = Map100_Chr4 = Map100_Chr5 = Map100_Chr6 = Map100_Chr7 = 0;
Map100_Chr1 = Map100_Chr3 = 1;
}
/* Set IRQ Registers */
Map100_IRQ_Enable = 0;
Map100_IRQ_Cnt = 0;
Map100_IRQ_Latch = 0;
for( int i = 0; i < 8; i++ ) {
Map100_Reg[ i ] = 0x00;
}
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map45_Init()
{
/* Initialize Mapper */
MapperInit = Map45_Init;
/* Write to Mapper */
MapperWrite = Map45_Write;
/* Write to SRAM */
MapperSram = Map45_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map45_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
Map45_Prg0 = 0;
Map45_Prg1 = 1;
Map45_Prg2 = NesHeader.byRomSize * 2 - 2;
Map45_Prg3 = NesHeader.byRomSize * 2 - 1;
ROMBANK0 = ROMPAGE( Map45_Prg0 ); Map45_P[0] = Map45_Prg0;
ROMBANK1 = ROMPAGE( Map45_Prg1 ); Map45_P[1] = Map45_Prg1;
ROMBANK2 = ROMPAGE( Map45_Prg2 ); Map45_P[2] = Map45_Prg2;
ROMBANK3 = ROMPAGE( Map45_Prg3 ); Map45_P[3] = Map45_Prg3;
/* Set PPU Banks */
Map45_Chr0 = 0; Map45_C[0] = Map45_Chr0;
Map45_Chr1 = 1; Map45_C[1] = Map45_Chr1;
Map45_Chr2 = 2; Map45_C[2] = Map45_Chr2;
Map45_Chr3 = 3; Map45_C[3] = Map45_Chr3;
Map45_Chr4 = 4; Map45_C[4] = Map45_Chr4;
Map45_Chr5 = 5; Map45_C[5] = Map45_Chr5;
Map45_Chr6 = 6; Map45_C[6] = Map45_Chr6;
Map45_Chr7 = 7; Map45_C[7] = Map45_Chr7;
for ( int nPage = 0; nPage < 8; ++nPage ) {
PPUBANK[ nPage ] = VROMPAGE( nPage );
}
InfoNES_SetupChr();
/* Initialize IRQ Registers */
Map45_IRQ_Enable = 0;
Map45_IRQ_Cnt = 0;
Map45_IRQ_Latch = 0;
Map45_Regs[0] = Map45_Regs[1] = Map45_Regs[2] = Map45_Regs[3] = 0;
Map45_Regs[4] = Map45_Regs[5] = Map45_Regs[6] = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map19_Init()
{
/* Initialize Mapper */
MapperInit = Map19_Init;
/* Write to Mapper */
MapperWrite = Map19_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map19_Apu;
/* Read from APU */
MapperReadApu = Map19_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map19_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( NesHeader.byVRomSize > 0 )
{
DWORD dwLastPage = (DWORD)NesHeader.byVRomSize << 3;
PPUBANK[ 0 ] = VROMPAGE( dwLastPage - 8 );
PPUBANK[ 1 ] = VROMPAGE( dwLastPage - 7 );
PPUBANK[ 2 ] = VROMPAGE( dwLastPage - 6 );
PPUBANK[ 3 ] = VROMPAGE( dwLastPage - 5 );
PPUBANK[ 4 ] = VROMPAGE( dwLastPage - 4 );
PPUBANK[ 5 ] = VROMPAGE( dwLastPage - 3 );
PPUBANK[ 6 ] = VROMPAGE( dwLastPage - 2 );
PPUBANK[ 7 ] = VROMPAGE( dwLastPage - 1 );
InfoNES_SetupChr();
}
/* Initialize State Register */
Map19_Regs[ 0 ] = 0x00;
Map19_Regs[ 1 ] = 0x00;
Map19_Regs[ 2 ] = 0x00;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map5_Init()
{
int nPage;
/* Initialize Mapper */
MapperInit = Map5_Init;
/* Write to Mapper */
MapperWrite = Map5_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map5_Apu;
/* Read from APU */
MapperReadApu = Map5_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map5_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map5_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set ROM Banks */
ROMBANK0 = ROMLASTPAGE( 0 );
ROMBANK1 = ROMLASTPAGE( 0 );
ROMBANK2 = ROMLASTPAGE( 0 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
for ( nPage = 0; nPage < 8; ++nPage )
PPUBANK[ nPage ] = VROMPAGE( nPage );
InfoNES_SetupChr();
/* Initialize State Registers */
for ( nPage = 4; nPage < 8; ++nPage )
{
Map5_Prg_Reg[ nPage ] = ( NesHeader.byRomSize << 1 ) - 1;
Map5_Wram_Reg[ nPage ] = 0xff;
}
Map5_Wram_Reg[ 3 ] = 0xff;
for ( BYTE byPage = 4; byPage < 8; ++byPage )
{
Map5_Chr_Reg[ byPage ][ 0 ] = byPage;
Map5_Chr_Reg[ byPage ][ 1 ] = ( byPage & 0x03 ) + 4;
}
InfoNES_MemorySet( Map5_Wram, 0x00, sizeof( Map5_Wram ) );
InfoNES_MemorySet( Map5_Ex_Ram, 0x00, sizeof( Map5_Ex_Ram ) );
InfoNES_MemorySet( Map5_Ex_Vram, 0x00, sizeof( Map5_Ex_Vram ) );
InfoNES_MemorySet( Map5_Ex_Nam, 0x00, sizeof( Map5_Ex_Nam ) );
Map5_Prg_Size = 3;
Map5_Wram_Protect0 = 0;
Map5_Wram_Protect1 = 0;
Map5_Chr_Size = 3;
Map5_Gfx_Mode = 0;
Map5_IRQ_Enable = 0;
Map5_IRQ_Status = 0;
Map5_IRQ_Line = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map114_Init()
{
/* Initialize Mapper */
MapperInit = Map114_Init;
/* Write to Mapper */
MapperWrite = Map114_Write;
/* Write to SRAM */
MapperSram = Map114_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map114_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Initialize State Registers */
for ( int nPage = 0; nPage < 8; nPage++)
{
Map114_Regs[ nPage ] = 0x00;
}
/* Set ROM Banks */
Map114_Prg0 = 0;
Map114_Prg1 = 1;
Map114_Set_CPU_Banks();
/* Set PPU Banks */
if ( NesHeader.byVRomSize > 0 )
{
Map114_Chr01 = 0;
Map114_Chr23 = 2;
Map114_Chr4 = 4;
Map114_Chr5 = 5;
Map114_Chr6 = 6;
Map114_Chr7 = 7;
Map114_Set_PPU_Banks();
} else {
Map114_Chr01 = Map114_Chr23 = 0;
Map114_Chr4 = Map114_Chr5 = Map114_Chr6 = Map114_Chr7 = 0;
}
/* Initialize IRQ Registers */
Map114_IRQ_Enable = 0;
Map114_IRQ_Cnt = 0;
Map114_IRQ_Latch = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
void Map245_Init()
{
/* Initialize Mapper */
MapperInit = Map245_Init;
/* Write to Mapper */
MapperWrite = Map245_Write;
/* Write to SRAM */
MapperSram = Map0_Sram;
/* Write to APU */
MapperApu = Map0_Apu;
/* Read from APU */
MapperReadApu = Map0_ReadApu;
/* Callback at VSync */
MapperVSync = Map0_VSync;
/* Callback at HSync */
MapperHSync = Map245_HSync;
/* Callback at PPU */
MapperPPU = Map0_PPU;
/* Callback at Rendering Screen ( 1:BG, 0:Sprite ) */
MapperRenderScreen = Map0_RenderScreen;
/* Set SRAM Banks */
SRAMBANK = SRAM;
/* Set Registers */
int i ;
for (i = 0; i < 8; i++ ) {
Map245_Reg[i] = 0x00;
}
Map245_Prg0 = 0;
Map245_Prg1 = 1;
/* Set ROM Banks */
ROMBANK0 = ROMPAGE( 0 );
ROMBANK1 = ROMPAGE( 1 );
ROMBANK2 = ROMLASTPAGE( 1 );
ROMBANK3 = ROMLASTPAGE( 0 );
/* Set PPU Banks */
if ( NesHeader.byVRomSize > 0 ) {
int nPage ;
for (nPage = 0; nPage < 8; ++nPage )
PPUBANK[ nPage ] = VROMPAGE( nPage );
InfoNES_SetupChr();
}
Map245_WeSram = 0; // Disable
Map245_IRQ_Enable = 0; // Disable
Map245_IRQ_Counter = 0;
Map245_IRQ_Latch = 0;
Map245_IRQ_Request = 0;
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
