static inline void PPRZ_I2C_SEND_START(struct i2c_periph *periph)
{
uint32_t i2c = (uint32_t) periph->reg_addr;
// Reset the buffer pointer to the first byte
periph->idx_buf = 0;
#ifdef I2C_DEBUG_LED
LED_SHOW_ACTIVE_BITS(regs);
LED2_ON();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED2_OFF();
#endif
// Enable Error IRQ, Event IRQ but disable Buffer IRQ
i2c_enable_interrupt(i2c, I2C_CR2_ITERREN);
i2c_enable_interrupt(i2c, I2C_CR2_ITEVTEN);
i2c_disable_interrupt(i2c, I2C_CR2_ITBUFEN);
// Issue a new start
i2c_nack_current(i2c);
i2c_disable_ack(i2c);
i2c_clear_stop(i2c);
i2c_peripheral_enable(i2c);
i2c_send_start(i2c);
periph->status = I2CStartRequested;
}
static inline void PPRZ_I2C_SEND_START(struct i2c_periph *periph)
{
uint32_t i2c = (uint32_t) periph->reg_addr;
// Reset the buffer pointer to the first byte
periph->idx_buf = 0;
#ifdef I2C_DEBUG_LED
LED_SHOW_ACTIVE_BITS(regs);
LED2_ON();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED2_OFF();
#endif
// Enable Error IRQ, Event IRQ but disable Buffer IRQ
I2C_CR2(i2c) |= I2C_CR2_ITERREN;
I2C_CR2(i2c) |= I2C_CR2_ITEVTEN;
I2C_CR2(i2c) &= ~ I2C_CR2_ITBUFEN;
// Issue a new start
I2C_CR1(i2c) = (I2C_CR1_START | I2C_CR1_PE);
periph->status = I2CStartRequested;
}
void i2c_setbitrate(struct i2c_periph *periph, int bitrate)
{
if (i2c_idle(periph))
{
if (periph == &i2c2)
{
I2C2_InitStruct.I2C_ClockSpeed = bitrate;
I2C_Init(I2C2, i2c2.init_struct);
}
#ifdef I2C_DEBUG_LED
__disable_irq();
LED2_ON();
LED1_ON();
LED2_OFF();
LED1_OFF();
LED2_ON();
LED1_ON();
LED2_OFF();
LED1_OFF();
__enable_irq();
#endif
}
}
int main(void)
{
char temp;
LED1_INIT();
LED2_INIT();
uart_config_default_stdio();
uart_init( UART_BAUD_SELECT(UART_BAUD_RATE,F_CPU) );
sei();
LED1_ON();
LED2_ON();
printf("\n\n********RFM22 Communication Test********\n");
LED1_ON();
LED2_OFF();
rfm22b_init();
txtest_configure_radio();
//====================//
//Communications Test
temp = rfm22b_read(DTYPE);
temp = rfm22b_read(DVERS);
temp = rfm22b_read(INTEN1);
temp = rfm22b_read(INTEN2);
temp = rfm22b_read(OMFC1);
temp = rfm22b_read(OMFC2);
LED1_OFF();
LED2_ON();
printf("*****************************************\n\n");
txtest_send_current_packet(); // Send test packet '0123456789:;<=>?"
// This example allows you to enter a 16-byte packet to send
printf("Entering TX Mode...Give me a 16-byte packet\n\n");
LED1_OFF();
LED2_OFF();
txtest_fill_packet_from_uart();
while(1)
{
txtest_send_current_packet();
_delay_ms(1000);
}
return 0;
}
void system_Process_System_State(void)
{
switch (system_GetState())
{
case SYSTEM_POWER_UP:
break;
case SYSTEM_INITIALIZE:
break;
case SYSTEM_CALIB_SENSOR:
break;
case SYSTEM_SAVE_CALIB_SENSOR:
break;
case SYSTEM_ESTIMATE_MOTOR_MODEL:
ProcessSpeedControl();
break;
case SYSTEM_SAVE_MOTOR_MODEL:
break;
case SYSTEM_WAIT_TO_RUN:
break;
case SYSTEM_RUN_SOLVE_MAZE:
pid_Wallfollow_process();
ProcessSpeedControl();
break;
case SYSTEM_RUN_IMAGE_PROCESSING:
LED1_ON();
ProcessSpeedControl();
break;
case SYSTEM_ERROR:
speed_Enable_Hbridge(false);
system_Enable_BoostCircuit(false);
IntMasterDisable();
while (1)
{
LED1_ON();
LED2_ON();
LED3_ON();
ROM_SysCtlDelay(ROM_SysCtlClockGet() / 3);
LED1_OFF();
LED2_OFF();
LED3_OFF();
ROM_SysCtlDelay(ROM_SysCtlClockGet() / 3);
}
// break;
}
}
void do_led_blink(void *dummy)
{
static uint8_t a = 0;
if (mainboard.flags & DO_ERRBLOCKING) {
if (a & 1)
LED1_ON();
else
LED1_OFF();
}
else {
if (a & 4)
LED1_ON();
else
LED1_OFF();
}
a++;
}
void App_t::OnUartCmd(Cmd_t *PCmd) {
Uart.Printf("%S\r", PCmd->Name);
uint32_t dw32 __attribute__((unused)); // May be unused in some cofigurations
if(PCmd->NameIs("#Ping") || PCmd->NameIs("#ping")) Uart.Ack(OK);
else if (PCmd->NameIs("#Ledon") || PCmd->NameIs("#ledon")) {LED1_ON();}
else if (PCmd->NameIs("#Ledoff") || PCmd->NameIs("#ledoff")) {LED1_OFF();}
else if (PCmd->NameIs("#Ledtoggle") || PCmd->NameIs("#ledtoggle")) {isLedToggle = !isLedToggle;}
else if(*PCmd->Name == '#') Uart.Ack(CMD_UNKNOWN); // reply only #-started stuff
}
void ButtonRightHandler(void)
{
if (system_GetState() == SYSTEM_CALIB_SENSOR)
{
switch(IR_Calib_Step)
{
case 0:
LED1_ON();
LED2_OFF();
LED3_OFF();
IR_set_calib_value(IR_CALIB_BASE_LEFT);
IR_set_calib_value(IR_CALIB_BASE_RIGHT);
break;
case 1:
IR_set_calib_value(IR_CALIB_BASE_FRONT_LEFT);
IR_set_calib_value(IR_CALIB_BASE_FRONT_RIGHT);
LED1_OFF();
LED2_ON();
LED3_OFF();
break;
case 2:
IR_set_calib_value(IR_CALIB_MAX_LEFT);
LED1_ON();
LED2_ON();
LED3_OFF();
break;
case 3:
IR_set_calib_value(IR_CALIB_MAX_RIGHT);
LED1_OFF();
LED2_OFF();
LED3_ON();
break;
case 4:
IR_set_calib_value(IR_CALIB_MAX_FRONT_LEFT);
IR_set_calib_value(IR_CALIB_MAX_FRONT_RIGHT);
LED1_ON();
LED2_OFF();
LED3_ON();
break;
}
IR_Calib_Step++;
IR_Calib_Step %= 4;
}
}
static inline void LED_ERROR(uint8_t base, uint8_t nr)
{
LED2_ON();
for (int i=0;i<(base+nr);i++)
{
LED1_ON();
LED1_OFF();
}
LED2_OFF();
}
static inline void PPRZ_I2C_SEND_START(struct i2c_periph *periph)
{
I2C_TypeDef *regs = (I2C_TypeDef *) periph->reg_addr;
periph->idx_buf = 0;
#ifdef I2C_DEBUG_LED
LED_SHOW_ACTIVE_BITS(regs);
LED2_ON();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED2_OFF();
#endif
/*
if (BIT_X_IS_SET_IN_REG( I2C_CR1_BIT_STOP, regs->CR1 ) )
{
regs->CR1 &= ~ I2C_CR1_BIT_STOP;
}
*/
// Enable Error IRQ, Event IRQ but disable Buffer IRQ
regs->CR2 |= I2C_CR2_BIT_ITERREN;
regs->CR2 |= I2C_CR2_BIT_ITEVTEN;
regs->CR2 &= ~ I2C_CR2_BIT_ITBUFEN;
// Issue a new start
regs->CR1 = (I2C_CR1_BIT_START | I2C_CR1_BIT_PE);
periph->status = I2CStartRequested;
#ifdef I2C_DEBUG_LED
LED_SHOW_ACTIVE_BITS(regs);
#endif
}
void EXTI2_IRQHandler(void)
{
if(EXTI_GetITStatus(EXTI_Line2) != RESET)
{
LED1_OFF();
DELAY_mS(100);
LED1_ON();
EXTI_ClearITPendingBit(EXTI_Line2);
}
}
static inline void PPRZ_I2C_SEND_STOP(uint32_t i2c)
{
// Man: p722: Stop generation after the current byte transfer or after the current Start condition is sent.
i2c_send_stop(i2c);
#ifdef I2C_DEBUG_LED
LED2_ON();
LED1_ON();
LED1_OFF();
LED2_OFF();
#endif
}
int main( void )
{
LED_INIT();
if (bus_init() == pdFALSE)
{
}
LED1_ON();
xTaskCreate( vbeacon_rfd, "Client", configMINIMAL_STACK_SIZE + 200, NULL, (tskIDLE_PRIORITY + 2 ), NULL );
vTaskStartScheduler();
return 0;
}
static inline void PPRZ_I2C_SEND_STOP(I2C_TypeDef *regs)
{
// Man: p722: Stop generation after the current byte transfer or after the current Start condition is sent.
regs->CR1 |= I2C_CR1_BIT_STOP;
#ifdef I2C_DEBUG_LED
LED2_ON();
LED1_ON();
LED1_OFF();
LED2_OFF();
#endif
}
void system_Process_System_State(void)
{
switch (system_GetState())
{
case SYSTEM_POWER_UP:
break;
case SYSTEM_INITIALIZE:
break;
case SYSTEM_ESTIMATE_MOTOR_MODEL:
break;
case SYSTEM_SAVE_MOTOR_MODEL:
break;
case SYSTEM_WAIT_TO_RUN:
break;
case SYSTEM_RUN_BALANCE:
loop();
break;
case SYSTEM_RUN_IMAGE_PROCESSING:
LED1_ON();
break;
case SYSTEM_ERROR:
speed_Enable_Hbridge(false);
system_Enable_BoostCircuit(false);
IntMasterDisable();
while (1)
{
LED1_ON();
LED2_ON();
LED3_ON();
ROM_SysCtlDelay(ROM_SysCtlClockGet() / 3);
LED1_OFF();
LED2_OFF();
LED3_OFF();
ROM_SysCtlDelay(ROM_SysCtlClockGet() / 3);
}
}
}
void USER_CAN_Test(void)
{
TestStatus TestRx;
/* CAN transmit at 100Kb/s and receive by polling in loopback mode */
TestRx = CAN_Polling();
if (TestRx == FAILED)
{
LED1_OFF(); // LED1 OFF
}
else
{
LED1_ON(); // LED1 ON;
}
}
// Encoder channel A
void _ISR_VERY_FAST _INT1Interrupt(void) {
#ifdef LED1_MODE_ENCODER
LED1_ON();
#endif
if(GET_INT0_STATE() == GET_INT1_STATE() ) {
encoder_value -= 1;
} else {
encoder_value += 1;
}
// Switch edge
INTCON2bits.INT1EP = GET_INT1_STATE(); // 1 - falling edge, 0 - rising edge
IFS1bits.INT1IF = 0; // Clear flag
#ifdef LED1_MODE_ENCODER
LED1_OFF();
#endif
}
void DMA1_Channel1_IRQHandler(void)
{
/* Test DMA1 TC flag */
if((DMA_GetFlagStatus(DMA1_FLAG_TC1)) != RESET )
{
/* Clear DMA TC flag */
DMA_ClearFlag(DMA1_FLAG_TC1);
if(Motor_State==INIT)
{
ADCTemp_Init(ADC_Tab);
}
else
{
LED1_ON();
SensorlessFOCRUN();
LED1_OFF();
}
SVM_Angle=smc1.Theta;
//DAC_SetChannel1Data(DAC_Align_12b_R,SVM_Angle/16);
DAC_SetChannel1Data(DAC_Align_12b_R,ADC_Tab[IB_Channl]);
if(++T2ms_Temp>T2MSTEMP) //2ms
{
T2ms_Temp=0;
T2ms_Flag=1;
Error_OMEGA=smc1.Omega-OMEGA_Old;
OMEGA_Old=smc1.Omega;
if(uGF.bit.RunMotor&&(uGF.bit.OpenLoop==0)) //ÅжÏÕýÐþÕðµ´
{
if(_Q15abs(Error_OMEGA)>ERROROMEGAMIN)
{
uGF.bit.RunMotor = 0;
uGF.bit.MotorFail = 1;
}
}
}else{}
if(++T100ms_Temp>T100MSTEMP) //100ms
{
T100ms_Temp=0;
T100ms_Flag=1;
}else{}
}
}
int main()
{
LED1_ENABLE();
LED1_ON();
/*
LED1_ON();
delay(800000);
LED1_OFF();
*/
unsigned char ch = '\0';
init_baudrate();
clock_init();
initUART();
serial_putc('c');
serial_putc('o');
serial_putc('d');
serial_putc('e');
serial_putc('\n');
serial_putc('\n');
ch = '\n';
serial_putc(ch/10+'0');
serial_putc(ch%10+'0');
serial_putc(' ');
//printf1("pclk scale is %d\n", get_PCLK());
while(1)
{
ch = serial_getc();
//if (ch <= '9' && ch >= '0')
if (ch == '\r')
ch = '\n';
serial_putc(ch);
};
return 0;
};
int main( void )
{
LED_INIT();
if (bus_init() == pdFALSE)
{
for (;;)
{
LED1_ON();
LED2_OFF();
LED1_OFF();
LED2_ON();
}
}
xTaskCreate( vSensorTask, "Sens", configMINIMAL_STACK_SIZE + 100, NULL, (tskIDLE_PRIORITY + 2 ), NULL );
vTaskStartScheduler();
return 0;
}
void ButtonHandler(void)
{
switch (system_GetState())
{
case SYSTEM_INITIALIZE:
speed_Enable_Hbridge(false);
system_SetState(SYSTEM_CALIB_SENSOR);
IR_Calib_Step = 0;
LED1_ON();
LED2_ON();
LED3_ON();
break;
case SYSTEM_CALIB_SENSOR:
speed_Enable_Hbridge(false);
system_SetState(SYSTEM_SAVE_CALIB_SENSOR);
case SYSTEM_SAVE_CALIB_SENSOR:
system_SetState(SYSTEM_ESTIMATE_MOTOR_MODEL);
speed_Enable_Hbridge(true);
speed_set(MOTOR_LEFT,500);
speed_set(MOTOR_RIGHT, 500);
break;
case SYSTEM_ESTIMATE_MOTOR_MODEL:
// system_SetState(SYSTEM_SAVE_MOTOR_MODEL);
system_SetState(SYSTEM_WAIT_TO_RUN);
speed_Enable_Hbridge(false);
break;
case SYSTEM_WAIT_TO_RUN:
speed_Enable_Hbridge(true);
system_SetState(SYSTEM_RUN_SOLVE_MAZE);
break;
case SYSTEM_RUN_SOLVE_MAZE:
case SYSTEM_RUN_IMAGE_PROCESSING:
system_SetState(SYSTEM_WAIT_TO_RUN);
speed_Enable_Hbridge(false);
break;
default:
break;
}
}
int main(void)
{
unsigned char key;
Sys_Clock_Init();
SysTick_Configuration();//Sys定时器
USART_Configuration(); //配置串口
NVIC_Configuration(); //中断配置
// sys_power_on();//开启系统电源
LED_Init(); //指示灯
// KEY_Init(); //按键
USART1_Puts("this is a uart test!\n");
CheckRTC(); //2.RTC
LED2_OFF();
while (1)
{
LED1_OFF();delay_nms(3000);
LED1_ON(); delay_nms(100);
key=KEY_Scan();
if(key==1)
{LED2_ON(); }
//
// if(mode==0) //显示时间
// {
if(RTC_1S==TRUE)
{
RTC_1S=FALSE;
UpdateRTC();
}
// }
}
}
void device_prx_mode_esb(void)
{
CE_HIGH(); // Set Chip Enable (CE) pin high to enable reciever
while(true)
{
start_timer(110);
// Run until either 110ms has lapsed
// OR there is data on the radio
do
{
radio_irq ();
} while ((radio_get_status () == RF_IDLE) && !timer_done());
if ((radio_get_status ()) == RF_RX_DR)
{
// Get the payload from the PTX and set LED1
if (radio_get_pload_byte (0) == 1)
{
LED1_ON();
}
else
{
LED1_OFF();
}
}
else
{
LED1_OFF();
}
// Set radio status to idle
radio_set_status (RF_IDLE);
}
}
static inline void i2c_irq(struct i2c_periph *periph)
{
/*
There are 7 possible reasons to get here:
If IT_EV_FEN
-------------------------
We are always interested in all IT_EV_FEV: all are required.
1) SB // Start Condition Success in Master mode
2) ADDR // Address sent received Acknoledge
[3 ADDR10] // -- 10bit address stuff
[4 STOPF] // -- only for slaves: master has no stop interrupt
5) BTF // I2C has stopped working (it is waiting for new data, all buffers are tx_empty/rx_full)
// Beware: using the buffered I2C has some interesting properties:
-in master receive mode: BTF only occurs after the 2nd received byte: after the first byte is received it is
in RD but the I2C can still receive a second byte. Only when the 2nd byte is received while the RxNE is 1
then a BTF occurs (I2C can not continue receiving bytes or they will get lost). During BTF I2C is halted (SCL held low)
-in master transmitmode: when writing a byte to WD, you instantly get a new TxE interrupt while the first is not
transmitted yet. The byte was pushed to the I2C shift register and the buffer is ready for more. You can already
fill new data in the buffer while the first is still being transmitted for max performance transmission.
// Beware: besides data buffering you can/must plan several consecutive actions. You can send 2 bytes to the buffer, ask for a stop and
a new start in one go.
-thanks to / because of this buffering and event sheduling there is not 1 interrupt per start / byte / stop
This also means you must think more in advance and a transaction could be popped from the stack even before it is
actually completely transmitted. But then you would not know the result yet so you have to keep it until the result
is known.
// Beware: the order in which Status is read determines how flags are cleared. You should not just read SR1 & SR2 every time
If IT_EV_FEN AND IT_EV_BUF
--------------------------
Buffer event are not always wanted and are tipically switched on during longer data transfers. Make sure to turn off in time.
6) RxNE
7) TxE
--------------------------------------------------------------------------------------------------
// This driver uses only a subset of the pprz_i2c_states for several reasons:
// -we have less interrupts than the I2CStatus states (for efficiency)
// -STM32 has such a powerfull I2C engine with plenty of status register flags that
only little extra status information needs to be stored.
// Status is re-used (abused) to remember the last COMMAND THAT WAS SENT to the STM I2C hardware.
// TODO: check which are used
enum I2CStatus {
I2CIdle, // No more last command
I2CStartRequested, // Last command was start
I2CRestartRequested, // Last command was restart
I2CStopRequested, // Very important to not send double stop conditions
I2CSendingByte, // Some address/data operation
// Following are not used
I2CReadingByte,
I2CAddrWrSent,
I2CAddrRdSent,
I2CSendingLastByte,
I2CReadingLastByte,
I2CComplete,
I2CFailed
};
---------
The STM waits indefinately (holding SCL low) for user interaction:
a) after a master-start (waiting for address)
b) after an address (waiting for data)
not during data sending when using buffered
c) after the last byte is transmitted (waiting for either stop or restart)
not during data receiving when using buffered
not after the last byte is received
-The STM I2C stalls indefinately when a stop condition was attempted that
did not succeed. The BUSY flag remains on.
-There is no STOP interrupt: use needs another way to finish.
*/
///////////////////////////////////////////////////////////////////////////////////
// Reading the status:
// - Caution: this clears several flags and can start transmissions etc...
// - Certain flags like STOP / (N)ACK need to be guaranteed to be set before
// the transmission of the byte is finished. At higher clock rates that can be
// quite fast: so we allow no other interrupt to be triggered in between
// reading the status and setting all needed flags
// Direct Access to the I2C Registers
// Do not read SR2 as it might start the reading while an (n)ack bit might be needed first
I2C_TypeDef *regs = (I2C_TypeDef *) periph->reg_addr;
#ifdef I2C_DEBUG_LED
LED1_ON();
LED1_OFF();
#endif
///////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////////
//
// TRANSACTION HANDLER
enum STMI2CSubTransactionStatus ret = 0;
///////////////////////
// Nothing Left To Do
if (periph->trans_extract_idx == periph->trans_insert_idx)
{
#ifdef I2C_DEBUG_LED
LED2_ON();
LED1_ON();
LED2_OFF();
LED1_OFF();
// no transaction and also an error?
LED_SHOW_ACTIVE_BITS(regs);
#endif
// If we still get an interrupt but there are no more things to do
// (which can happen if an event was sheduled just before a bus error occurs)
// then its easy: just stop: clear all interrupt generating bits
// Count The Errors
i2c_error(periph);
// Clear Running Events
stmi2c_clear_pending_interrupts(regs);
// Mark this as a special error
periph->errors->unexpected_event_cnt++;
periph->status = I2CIdle;
// There are no transactions anymore:
// furtheron we need a transaction pointer: so we are not allowed to continue
return;
}
struct i2c_transaction* trans = periph->trans[periph->trans_extract_idx];
///////////////////////////
// If there was an error:
if (( regs->SR1 & I2C_SR1_BITS_ERR ) != 0x0000)
{
#ifdef I2C_DEBUG_LED
LED1_ON();
LED2_ON();
LED1_OFF();
LED2_OFF();
LED_SHOW_ACTIVE_BITS(regs);
#endif
// Set result in transaction
trans->status = I2CTransFailed;
// Prepare for next
ret = STMI2C_SubTra_Ready;
// Make sure a TxRx does not Restart
trans->type = I2CTransRx;
/*
// There are 2 types of errors: some need a STOP, some better do without: Following will not get an extra stop
if (
// Lost Arbitration
(BIT_X_IS_SET_IN_REG( I2C_SR1_BIT_ERR_ARLO, regs->SR1 ) )
// Buss Error When Master Only
|| ((BIT_X_IS_SET_IN_REG( I2C_SR1_BIT_ERR_BUS, regs->SR1 ) ) && (!BIT_X_IS_SET_IN_REG( I2C_SR2_BIT_MSL, regs->SR2 ) ))
|| (BIT_X_IS_SET_IN_REG( I2C_SR1_BIT_ERR_OVR, regs->SR1 ) )
)
{
ret = STMI2C_SubTra_Error;
}
*/
// Count The Errors
i2c_error(periph);
// Clear Running Events
stmi2c_clear_pending_interrupts(regs);
}
///////////////////////////
// Normal Event:
else
{
if (trans->type == I2CTransRx) // TxRx are converted to Rx after the Tx Part
{
switch (trans->len_r)
{
case 1:
ret = stmi2c_read1(regs,trans);
break;
case 2:
ret = stmi2c_read2(regs,trans);
break;
default:
ret = stmi2c_readmany(regs,periph, trans);
break;
}
}
else // TxRx or Tx
{
ret = stmi2c_send(regs,periph,trans);
}
}
/////////////////////////////////
// Sub-transaction has finished
if (ret != STMI2C_SubTra_Busy)
{
// If a restart is not needed
if (trans->type != I2CTransTxRx)
{
// Ready, no stop condition set yet
if (ret == STMI2C_SubTra_Ready)
{
// Program a stop
PPRZ_I2C_SEND_STOP(regs);
// Silent any BTF that would occur before STOP is executed
regs->DR = 0x00;
}
// In case of unexpected condition: e.g. not slave, no event
if (ret == STMI2C_SubTra_Error)
{
trans->status = I2CTransFailed;
// Error
#ifdef I2C_DEBUG_LED
LED2_ON();
LED1_ON();
LED2_OFF();
LED1_OFF();
#endif
LED_SHOW_ACTIVE_BITS(regs);
// Clear Running Events
stmi2c_clear_pending_interrupts(regs);
}
// Jump to the next transaction
periph->trans_extract_idx++;
if (periph->trans_extract_idx >= I2C_TRANSACTION_QUEUE_LEN)
periph->trans_extract_idx = 0;
// Tell everyone we are ready
periph->status = I2CIdle;
// if we have no more transaction to process, stop here
if (periph->trans_extract_idx == periph->trans_insert_idx)
{
#ifdef I2C_DEBUG_LED
LED2_ON();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED2_OFF();
#endif
}
// if not, start next transaction
else
{
// Restart transaction doing the Rx part now
// --- moved to idle function
PPRZ_I2C_SEND_START(periph);
// ------
}
}
// RxTx -> Restart and do Rx part
else
{
trans->type = I2CTransRx;
periph->status = I2CStartRequested;
regs->CR1 |= I2C_CR1_BIT_START;
// Silent any BTF that would occur before SB
regs->DR = 0x00;
}
}
return;
}
static inline enum STMI2CSubTransactionStatus stmi2c_readmany(I2C_TypeDef *regs, struct i2c_periph *periph, struct i2c_transaction *trans)
{
uint16_t SR1 = regs->SR1;
// Start Condition Was Just Generated
if (BIT_X_IS_SET_IN_REG( I2C_SR1_BIT_SB, SR1 ) )
{
regs->CR2 &= ~ I2C_CR2_BIT_ITBUFEN;
// The first data byte will be acked in read many so the slave knows it should send more
regs->CR1 &= ~ I2C_CR1_BIT_POS;
regs->CR1 |= I2C_CR1_BIT_ACK;
// Clear the SB flag
regs->DR = trans->slave_addr | 0x01;
}
// Address Was Sent
else if (BIT_X_IS_SET_IN_REG(I2C_SR1_BIT_ADDR, SR1) )
{
periph->idx_buf = 0;
// Enable RXNE: receive an interrupt any time a byte is available
// only enable if MORE than 3 bytes need to be read
if (periph->idx_buf < (trans->len_r - 3))
{
regs->CR2 |= I2C_CR2_BIT_ITBUFEN;
}
// ACK is still on to get more DATA
// Read SR2 to clear the ADDR (next byte will start arriving)
uint16_t SR2 __attribute__ ((unused)) = regs->SR2;
}
// one or more bytes are available AND we were interested in Buffer interrupts
else if ( (BIT_X_IS_SET_IN_REG(I2C_SR1_BIT_RXNE, SR1) ) && (BIT_X_IS_SET_IN_REG(I2C_CR2_BIT_ITBUFEN, regs->CR2)) )
{
// read byte until 3 bytes remain to be read (e.g. len_r = 6, -> idx=3 means idx 3,4,5 = 3 remain to be read
if (periph->idx_buf < (trans->len_r - 3))
{
trans->buf[periph->idx_buf] = regs->DR;
periph->idx_buf ++;
}
// from : 3bytes -> last byte: do nothing
//
// finally: this was the last byte
else if (periph->idx_buf >= (trans->len_r - 1))
{
regs->CR2 &= ~ I2C_CR2_BIT_ITBUFEN;
// Last Value
trans->buf[periph->idx_buf] = regs->DR;
periph->idx_buf ++;
// We got all the results
trans->status = I2CTransSuccess;
return STMI2C_SubTra_Ready_StopRequested;
}
// Check for end of transaction: start waiting for BTF instead of RXNE
if (periph->idx_buf < (trans->len_r - 3))
{
regs->CR2 |= I2C_CR2_BIT_ITBUFEN;
}
else // idx >= len-3: there are 3 bytes to be read
{
// We want to halt I2C to have sufficient time to clear ACK, so:
// Stop listening to RXNE as it will be triggered infinitely since we did not empty the buffer
// on the next (second in buffer) received byte BTF will be set (buffer full and I2C halted)
regs->CR2 &= ~ I2C_CR2_BIT_ITBUFEN;
}
}
// Buffer is full while this was not a RXNE interrupt
else if (BIT_X_IS_SET_IN_REG(I2C_SR1_BIT_BTF, SR1) )
{
// Now the shift register and data register contain data(n-2) and data(n-1)
// And I2C is halted so we have time
// --- Make absolutely sure the next 2 I2C actions are performed with no delay
__I2C_REG_CRITICAL_ZONE_START;
// First we clear the ACK while the SCL is held low by BTF
regs->CR1 &= ~ I2C_CR1_BIT_ACK;
// Now that ACK is cleared we read one byte: instantly the last byte is being clocked in...
trans->buf[periph->idx_buf] = regs->DR;
periph->idx_buf ++;
// Now the last byte is being clocked. Stop in MUST be set BEFORE the transfer of the last byte is complete
PPRZ_I2C_SEND_STOP(regs);
__I2C_REG_CRITICAL_ZONE_STOP;
// --- end of critical zone -----------
// read the byte2 we had in the buffer (BTF means 2 bytes available)
trans->buf[periph->idx_buf] = regs->DR;
periph->idx_buf ++;
// Ask for an interrupt to read the last byte (which is normally still busy now)
// The last byte will be received with RXNE
regs->CR2 |= I2C_CR2_BIT_ITBUFEN;
}
else // Hardware error
{
// Error
#ifdef I2C_DEBUG_LED
LED2_ON();
LED1_ON();
LED2_OFF();
LED1_OFF();
#endif
return STMI2C_SubTra_Error;
}
return STMI2C_SubTra_Busy;
}
static inline void LED_SHOW_ACTIVE_BITS(I2C_TypeDef *regs)
{
uint16_t CR1 = regs->CR1;
uint16_t SR1 = regs->SR1;
uint16_t SR2 = regs->SR2;
// Note: reading SR1 and then SR2 will clear ADDR bits
LED1_ON();
// 1 Start
if (BIT_X_IS_SET_IN_REG( I2C_SR1_BIT_SB, SR1 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// 2 Addr
if (BIT_X_IS_SET_IN_REG( I2C_SR1_BIT_ADDR, SR1 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// 3 BTF
if (BIT_X_IS_SET_IN_REG( I2C_SR1_BIT_BTF, SR1 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// 4 ERROR
if (( SR1 & I2C_SR1_BITS_ERR ) != 0x0000)
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// Anything?
if (( SR1 + SR2) != 0x0000)
LED2_ON();
else
LED2_OFF();
LED2_OFF();
LED1_OFF();
LED1_ON();
// 1 Start
if (BIT_X_IS_SET_IN_REG( I2C_CR1_BIT_START, CR1 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// 2 Stop
if (BIT_X_IS_SET_IN_REG( I2C_CR1_BIT_STOP, CR1 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// 3 Busy
if (BIT_X_IS_SET_IN_REG( I2C_SR2_BIT_BUSY, SR2 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// 4 Tra
if (BIT_X_IS_SET_IN_REG( I2C_SR2_BIT_TRA, SR2 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// 5 Master
if (BIT_X_IS_SET_IN_REG( I2C_SR2_BIT_MSL, SR2 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
LED1_OFF();
//#define I2C_DEBUG_LED_CONTROL
#ifdef I2C_DEBUG_LED_CONTROL
LED1_ON();
// 1 Anything CR?
if (( CR1) != 0x0000)
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// 2 PE
if (BIT_X_IS_SET_IN_REG( I2C_CR1_BIT_PE, CR1 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
// 3 SWRESET
if (BIT_X_IS_SET_IN_REG( I2C_CR1_BIT_SWRST, CR1 ) )
LED2_ON();
else
LED2_OFF();
LED2_OFF();
LED1_OFF();
#endif
}
void i2c_event(void)
{
static uint32_t cnt = 0;
//I2C_TypeDef *regs;
cnt++;
if (cnt > 10000) cnt = 0;
#ifndef I2C_DEBUG_LED
#ifdef USE_I2C1
if (i2c1.status == I2CIdle)
{
if (i2c_idle(&i2c1))
{
__disable_irq();
// More work to do
if (i2c1.trans_extract_idx != i2c1.trans_insert_idx)
{
// Restart transaction doing the Rx part now
PPRZ_I2C_SEND_START(&i2c1);
}
__enable_irq();
}
}
#endif
#endif
#ifdef USE_I2C2
#ifdef I2C_DEBUG_LED
if (cnt == 0)
{
__disable_irq();
LED2_ON();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
if (i2c2.status == I2CIdle)
{
LED1_ON();
LED1_OFF();
}
else if (i2c2.status == I2CStartRequested)
{
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
}
LED2_OFF();
//regs = (I2C_TypeDef *) i2c2.reg_addr;
//LED_SHOW_ACTIVE_BITS(regs);
__enable_irq();
}
#endif
//if (i2c2.status == I2CIdle)
{
//if (i2c_idle(&i2c2))
{
//__disable_irq();
// More work to do
//if (i2c2.trans_extract_idx != i2c2.trans_insert_idx)
{
// Restart transaction doing the Rx part now
//PPRZ_I2C_SEND_START(&i2c2);
}
//__enable_irq();
}
}
#endif
}
static inline void i2c_irq(struct i2c_periph *periph)
{
/*
There are 7 possible event reasons to get here + all errors
If IT_EV_FEN
-------------------------
We are always interested in all IT_EV_FEV: all are required.
1) SB // Start Condition Success in Master mode
2) ADDR // Address sent received Acknoledge
[ADDR10] // -- 10bit address stuff: not used
[STOPF] // -- only for slaves: master has no stop interrupt: not used
3) BTF // I2C has stopped working (it is waiting for new data, all buffers are tx_empty/rx_full)
// Beware: using the buffered I2C has some interesting properties:
- in master receive mode: BTF only occurs after the 2nd received byte: after the first byte is received it is
in RD but the I2C can still receive a second byte. Only when the 2nd byte is received while the RxNE is 1
then a BTF occurs (I2C can not continue receiving bytes or they will get lost). During BTF I2C is halted (SCL held low)
- in master transmit mode: when writing a byte to WD, you instantly get a new TxE interrupt while the first is not
transmitted yet. The byte was pushed to the I2C shift register and the buffer is ready for more. You can already
fill new data in the buffer while the first is still being transmitted for max performance transmission.
// Beware: besides data buffering you can/must plan several consecutive actions. You can send 2 bytes to the buffer, ask for a stop and
a new start in one go.
- thanks to / because of this buffering and event sheduling there is not 1 interrupt per start / byte / stop
This also means you must think more in advance and a transaction could be popped from the transaction stack even before it's
stop condition is actually generated.
// Beware: the order in which Status (and other register) is read determines how flags are cleared.
You should NOT simply read SR1 & SR2 every time
If IT_EV_FEN AND IT_EV_BUF
--------------------------
Buffer event are not always wanted and are typically switched on during longer data transfers. Make sure to turn off in time.
4) RxNE
5) TxE
--------------------------------------------------------------------------------------------------
The STM waits indefinately (holding SCL low) for user interaction:
a) after a master-start (waiting for address)
b) after an address (waiting for data)
not during data sending when using buffered
c) after the last byte is transmitted (waiting for either stop or restart)
not during data receiving when using buffered
not after the last byte is received
- The STM I2C stalls indefinately when a stop condition was attempted that
did not succeed. The BUSY flag remains on.
- There is no STOP interrupt.
Caution Reading the status:
- Caution: this clears several flags and can start transmissions etc...
- Certain flags like STOP / (N)ACK need to be guaranteed to be set before
the transmission of the byte is finished. At higher clock rates that can be
quite fast: so we allow no other interrupt to be triggered in between
reading the status and setting all needed flags
*/
// Here we go ...
// Apparently we got an I2C interrupt: EVT BUF or ERR
#ifdef I2C_DEBUG_LED
// Notify ISR is triggered
LED1_ON();
LED1_OFF();
#endif
// Save Some Direct Access to the I2C Registers ...
uint32_t i2c = (uint32_t) periph->reg_addr;
/////////////////////////////
// Check if we were ready ...
if (periph->trans_extract_idx == periph->trans_insert_idx)
{
// Nothing Left To Do
#ifdef I2C_DEBUG_LED
LED2_ON();
LED1_ON();
LED2_OFF();
LED1_OFF();
// no transaction and also an error?
LED_SHOW_ACTIVE_BITS(regs);
#endif
// If we still get an interrupt but there are no more things to do
// (which can happen if an event was sheduled just before a bus error occurs)
// (or can happen if both error and event interrupts were called together [the 2nd will then get this error])
// since there is nothing more to do: its easy: just stop: clear all interrupt generating bits
// Count The Errors
i2c_error(periph);
// Clear Running Events
stmi2c_clear_pending_interrupts(i2c);
// Mark this as a special error
periph->errors->last_unexpected_event++;
// Document the current Status
periph->status = I2CIdle;
// There are no transactions anymore: return
// further-on in this routine we need a transaction pointer: so we are not allowed to continue
return;
}
// get the I2C transaction we were working on ...
enum STMI2CSubTransactionStatus ret = 0;
struct i2c_transaction* trans = periph->trans[periph->trans_extract_idx];
///////////////////////////
// If there was an error:
if (( I2C_SR1(i2c) & I2C_SR1_ERR_MASK ) != 0x0000)
{
#ifdef I2C_DEBUG_LED
LED1_ON();
LED2_ON();
LED1_OFF();
LED2_OFF();
LED_SHOW_ACTIVE_BITS(regs);
#endif
// Notify everyone about the error ...
// Set result in transaction
trans->status = I2CTransFailed;
// Document the current Status
periph->status = I2CFailed;
// Make sure a TxRx does not Restart
trans->type = I2CTransRx;
// Count The Errors
i2c_error(periph);
// Clear Running Events
stmi2c_clear_pending_interrupts(i2c);
// Now continue as if everything was normal from now on
ret = STMI2C_SubTra_Ready;
}
///////////////////////////
// Normal Event:
else
{
///////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////////
//
// SUB-TRANSACTION HANDLER
if (trans->type == I2CTransRx) // TxRx are converted to Rx after the Tx Part
{
switch (trans->len_r)
{
case 1:
ret = stmi2c_read1(i2c,periph,trans);
break;
case 2:
ret = stmi2c_read2(i2c,periph,trans);
break;
default:
ret = stmi2c_readmany(i2c,periph,trans);
break;
}
}
else // TxRx or Tx
{
ret = stmi2c_send(i2c,periph,trans);
}
}
/////////////////////////////////
// Sub-transaction has finished
if (ret != STMI2C_SubTra_Busy)
{
// Ready or SubTraError
// -ready: with or without stop already asked
// In case of unexpected event condition during subtransaction handling:
if (ret == STMI2C_SubTra_Error)
{
// Tell everyone about the subtransaction error:
// this is the previously called SPURRIOUS INTERRUPT
periph->status = I2CFailed;
trans->type = I2CTransRx; // Avoid possible restart
trans->status = I2CTransFailed; // Notify Ready
periph->errors->unexpected_event_cnt++;
// Error
#ifdef I2C_DEBUG_LED
LED2_ON();
LED1_ON();
LED2_OFF();
LED1_OFF();
LED_SHOW_ACTIVE_BITS(regs);
#endif
// Clear Running Events
stmi2c_clear_pending_interrupts(i2c);
}
// RxTx -> Restart and do Rx part
if (trans->type == I2CTransTxRx)
{
trans->type = I2CTransRx;
periph->status = I2CStartRequested;
i2c_send_start(i2c);
// Silent any BTF that would occur before SB
i2c_send_data(i2c, 0x00);
}
// If a restart is not needed: Rx part or Tx-only
else
{
// Ready, no stop condition set yet
if (ret == STMI2C_SubTra_Ready)
{
// Program a stop
PPRZ_I2C_SEND_STOP(i2c);
// Silent any BTF that would occur before STOP is executed
i2c_send_data(i2c, 0x00);
}
// Jump to the next transaction
periph->trans_extract_idx++;
if (periph->trans_extract_idx >= I2C_TRANSACTION_QUEUE_LEN)
periph->trans_extract_idx = 0;
// Tell everyone we are ready
periph->status = I2CIdle;
// if we have no more transaction to process, stop here
if (periph->trans_extract_idx == periph->trans_insert_idx)
{
periph->watchdog = -1; // stop watchdog
#ifdef I2C_DEBUG_LED
LED2_ON();
LED1_ON();
LED1_OFF();
LED1_ON();
LED1_OFF();
LED2_OFF();
#endif
}
// if not, start next transaction
else
{
// Restart transaction doing the Rx part now
// --- moved to idle function
PPRZ_I2C_SEND_START(periph);
// ------
}
}
}
return;
}
static void vSensorTask( void *pvParameters )
{
portTickType xLastWakeTime;
uint16_t count = 0;
uint8_t bl_state = 0;
uint8_t bl_state_p = 0;
pause(200);
debug_init(115200);
pause(300);
if(stack_start(NULL)==START_SUCCESS)
{
debug("Start Ok\r\n");
}
xLastWakeTime = xTaskGetTickCount();
LED1_ON();
vTaskDelayUntil( &xLastWakeTime, 1000 / portTICK_RATE_MS );
LED1_OFF();
P6DIR |= 0xC0;
P6DIR &= ~0x0F;
P6OUT |= 0xC0;
P5DIR &= ~0x80;
P2DIR &= ~0x01;
for (;;)
{
vTaskDelayUntil( &xLastWakeTime, 20 / portTICK_RATE_MS );
bl_state &= ~ 0x33;
/*read example board buttons*/
if (P2IN & 0x01)
{
bl_state |= 0x10;
}
if (P5IN & 0x80)
{
bl_state |= 0x20;
}
/*setup example board LEDs according to button changes*/
if ((bl_state ^ bl_state_p) & 0x10)
{
P6OUT ^= 0x40;
}
if ((bl_state ^ bl_state_p) & 0x20)
{
P6OUT ^= 0x80;
}
if (P6OUT & 0x40) bl_state |= 0x01;
if (P6OUT & 0x80) bl_state |= 0x02;
if (bl_state != bl_state_p)
{
ssi_sensor_update(2, (uint32_t) bl_state);
}
bl_state_p = bl_state;
if (adc_state == 0)
{ /*adc read complete, new values available*/
ssi_sensor_update(0, (uint32_t) adc_value[2]);
ssi_sensor_update(1, (uint32_t) adc_value[0]);
adc_state = 16;
}
if (count++ >= 49)
{
uint8_t channels[] = {0,1,2};
LED1_ON();
adc_read(channels,sizeof(channels));
count = 0;
}
else
{
LED1_OFF();
}
}
}
void i2c_setbitrate(struct i2c_periph *periph, int bitrate)
{
// If NOT Busy
if (i2c_idle(periph))
{
volatile int devider;
volatile int risetime;
uint32_t i2c = (uint32_t) periph->reg_addr;
/*****************************************************
Bitrate:
-CR2 + CCR + TRISE registers
-only change when PE=0
e.g.
10kHz: 36MHz + Standard 0x708 + 0x25
70kHz: 36MHz + Standard 0x101 +
400kHz: 36MHz + Fast 0x1E + 0xb
// 1) Program peripheral input clock CR2: to get correct timings
// 2) Configure clock control registers
// 3) Configure rise time register
******************************************************/
if (bitrate < 3000)
bitrate = 3000;
// rcc_ppre1_frequency is normally configured to max: 36MHz on F1 and 42MHz on F4
// in fast mode: 2counts low 1 count high -> / 3:
// in standard mode: 1 count low, 1 count high -> /2:
devider = (rcc_ppre1_frequency/2000) / (bitrate/1000);
// never allow faster than 600kbps
if (devider < 20)
devider = 20;
// no overflow either
if (devider >=4095)
devider = 4095;
// risetime can be up to 1/6th of the period
risetime = 1000000 / (bitrate/1000) / 6 / 28;
if (risetime < 10)
risetime = 10;
// more will overflow the register: for more you should lower the FREQ
if (risetime >=31)
risetime = 31;
// we do not expect an interrupt as the interface should have been idle, but just in case...
__disable_irq(); // this code is in user space:
// CCR can only be written when PE is disabled
// p731 note 5
i2c_peripheral_disable(i2c);
// 1)
#ifdef STM32F1
i2c_set_clock_frequency(i2c, I2C_CR2_FREQ_36MHZ);
#else // STM32F4
i2c_set_clock_frequency(i2c, I2C_CR2_FREQ_42MHZ);
#endif
// 2)
//i2c_set_fast_mode(i2c);
i2c_set_ccr(i2c, devider);
// 3)
i2c_set_trise(i2c, risetime);
// Re-Enable
i2c_peripheral_enable(i2c);
__enable_irq();
#ifdef I2C_DEBUG_LED
__disable_irq(); // this code is in user space:
LED2_ON();
LED1_ON();
LED2_OFF();
LED1_OFF();
LED2_ON();
LED1_ON();
LED2_OFF();
LED1_OFF();
__enable_irq();
#endif
}
}
