void UART_2_ISR(void)
{
/* Check for RX data valid interrupt */
if(UART_2_DEV->STATUS & LEUART_STATUS_RXDATAV) {
/* Copy data into RX Buffer */
uint8_t rxData = LEUART_Rx(UART_2_DEV);
irq_read(UART_2, rxData);
}
/* Check TX buffer level status */
if(UART_2_DEV->IF & LEUART_IF_TXBL & UART_2_DEV->IEN) {
#if UART_2_ENABLE_BUF
int data = ringbuffer_get_one(&rb_uart2);
if(-1 != data) {
/* Avoid deadlock if modifying the same register twice when freeze mode is */
/* activated. */
if(!(UART_2_DEV->FREEZE & LEUART_FREEZE_REGFREEZE)) {
/* Wait for any pending previous write operation to have been completed */
/* in low frequency domain */
while(UART_2_DEV->SYNCBUSY & LEUART_SYNCBUSY_TXDATA)
;;
}
/* Write data to TX register */
UART_2_DEV->TXDATA = (uint32_t)data;
} else {
LEUART_IntDisable(UART_2_DEV, LEUART_IF_TXBL);
}
#endif
}
if(sched_context_switch_request) {
thread_yield();
}
}
/************************************************************************************//**
** \brief Receives a communication interface byte if one is present.
** \param data Pointer to byte where the data is to be stored.
** \return 1 if a byte was received, 0 otherwise.
**
****************************************************************************************/
static unsigned char UartReceiveByte(unsigned char *data)
{
/* check to see if a new bytes was received */
if ((LEUART1->IF & LEUART_IF_RXDATAV) != 0)
{
/* store the received data byte and set return value to positive */
*data = LEUART_Rx(LEUART1);
return 1;
}
/* still here to no new byte received */
return 0;
} /*** end of UartReceiveByte ***/
static int efm32_uart_getc(struct uart *dev) {
return LEUART_Rx((void *) dev->base_addr);
}
