/**
* @brief Enable chip clock source and select CPU clock.
* @param None
* @return None
*/
void SysInit_Clock(void)
{
__IO uint32_t delayCnt;
/* Enable system clock source, HIRC and LIRC are default enabled */
UNLOCKREG();
CLK->PWRCTL |= (CLK_PWRCTL_HXT_EN | CLK_PWRCTL_LXT_EN);
//LOCKREG();
/* Set HCLK to HIRC*/
CLK->CLKDIV0 &= ~CLK_CLKDIV0_HCLK_MASK; /* divider is 0 */
//UNLOCKREG();
CLK->CLKSEL0 = (CLK->CLKSEL0 & ~CLK_CLKSEL0_HCLK_MASK) | CLK_CLKSEL0_HCLK_HIRC; /* HCLK = 12MHz */
LOCKREG();
/* Update CPU Clock Frequency */
SystemCoreClockUpdate();
}
//------------------------------
void bacarfid(){
uint8_t hasiluart[8];
STR_UART_T sParam;
UNLOCKREG();
DrvSYS_Open(50000000);
LOCKREG();
/* Set UART Pin */
DrvGPIO_InitFunction(E_FUNC_UART0);
/* UART Setting */
sParam.u32BaudRate = 9600;
sParam.u8cDataBits = DRVUART_DATABITS_8;
sParam.u8cStopBits = DRVUART_STOPBITS_1;
sParam.u8cParity = DRVUART_PARITY_NONE;
sParam.u8cRxTriggerLevel= DRVUART_FIFO_1BYTES;
DrvUART_Open(UART_PORT0,&sParam);
}
//============================================================================
// u32addr : 0-1024
//============================================================================
uint32_t DATA_FLASH_Read(uint32_t u32add)
{
uint32_t u32data;
#ifdef M451
SYS_UnlockReg();
FMC_Open();
u32data = FMC_Read(u32add*4+DATA_Flash_Start_ADD);
FMC_Close();
SYS_LockReg();
#else
__set_PRIMASK(1);
UNLOCKREG();
DrvFMC_EnableISP();
DrvFMC_Read(u32add*4+DATA_Flash_Start_ADD, &u32data);
DrvFMC_DisableISP();
LOCKREG();
__set_PRIMASK(0);
#endif
return u32data;
}
//============================================================================
// DATA FLASH OPERATION
// u32addr : 0-1024 (For 4KBytes Data Flash)
// u32data : 0-0xFFFFFFFF (4Bytes)
//============================================================================
void DATA_FLASH_Write(uint32_t u32addr,uint32_t u32data)
{
uint32_t i=0;
#ifdef M451
SYS_UnlockReg();
FMC_Open();
for(i=0; i<PAGE_SIZE; i++)
data_buff[i] = FMC_Read(DATA_Flash_Start_ADD+i*4+ u32addr/PAGE_SIZE*2048);
FMC_Erase(DATA_Flash_Start_ADD+u32addr/PAGE_SIZE*2048);
data_buff[u32addr%PAGE_SIZE]=u32data;
for(i=0; i<PAGE_SIZE; i++)
FMC_Write(DATA_Flash_Start_ADD+i*4+ u32addr/PAGE_SIZE*2048, data_buff[i]);
FMC_Close();
SYS_LockReg();
#else
uint32_t data_buff[PAGE_SIZE];
__set_PRIMASK(1);//Avoid interrupt
UNLOCKREG();
DrvFMC_EnableISP();
for(i=0; i<PAGE_SIZE; i++)
DrvFMC_Read(DATA_Flash_Start_ADD+i*4+ u32addr/128*512, &data_buff[i]);
DrvFMC_Erase(DATA_Flash_Start_ADD+u32addr/128*512);
data_buff[u32addr%128]=u32data;
for(i=0; i<PAGE_SIZE; i++)
DrvFMC_Write(DATA_Flash_Start_ADD+i*4+ u32addr/128*512, data_buff[i]);
DrvFMC_DisableISP();
LOCKREG();
__set_PRIMASK(0);
#endif
}
/*20150515 added by michael*/
void Set_AD5259_Potential ( uint8_t word_addr, uint8_t data )
{
Tx_Data0[0] = word_addr;
Tx_Data0[1] = 2;
Tx_Data0[2] = data;
UNLOCKREG();
DrvI2C_InstallCallback(I2C_PORT0, I2CFUNC, I2C0_Callback_Tx);
DrvI2C_InstallCallback(I2C_PORT0, TIMEOUT, I2C0_Timeout);
DrvI2C_EnableTimeoutCount(I2C_PORT0, 1, 1);
/* I2C0 as master sends START signal */
start_I2C = 0;
EndFlag0 = 0;
Active_I2C_Slave_Addr = AD5259_I2C_Slave_Addr;
DrvI2C_Ctrl(I2C_PORT0, 1, 0, 0, 0);
while (EndFlag0 == 0);
DrvI2C_UninstallCallBack(I2C_PORT0, I2CFUNC);
DrvI2C_UninstallCallBack(I2C_PORT0, TIMEOUT);
DrvI2C_EnableTimeoutCount(I2C_PORT0, 0, 0);
LOCKREG();
}
void setupSystemClock()
{
#ifdef M451
SYS_UnlockReg();
/* Enable HIRC clock */
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
/* Waiting for HIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
/* Switch HCLK clock source to HIRC */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
/* Set core clock as PLL_CLOCK from PLL and SysTick source to HCLK/2*/
CLK_SetCoreClock(SYSTEM_CLOCK);
CLK_SetSysTickClockSrc(CLK_CLKSEL0_STCLKSEL_HCLK_DIV2);
SYS_LockReg();
#else
uint32_t u32PllCr;
uint16_t i;
UNLOCKREG();
DrvSYS_SetOscCtrl(E_SYS_OSC22M, 1);
while (DrvSYS_GetChipClockSourceStatus(E_SYS_OSC22M) != 1);
DrvSYS_SelectPLLSource(E_SYS_INTERNAL_22M);
u32PllCr = DrvSYS_GetPLLContent(E_SYS_INTERNAL_22M, SYSTEM_CLOCK);
/*Delay for 12M or 22M stable*/
for (i=0;i<10000;i++);
DrvSYS_SetPLLContent(u32PllCr);
SYSCLK->PLLCON.OE = 0;
SYSCLK->PLLCON.PD = 0;
/*Delay for PLL stable*/
for (i=0;i<10000;i++);
/* Change HCLK clock source to be PLL. */
DrvSYS_SelectHCLKSource(2);
LOCKREG(); // Lock the protected registers
#endif
}
/*---------------------------------------------------------------------------------------------------------*/
void DrvPMU_DeepPowerDown(uint32_t u32DPDWakeupMode, uint32_t u32TimerSel)
{
UNLOCKREG();
SCB->SCR = SCB_SCR_SLEEPDEEP;
SYSCLK->PWRCON.DEEP_PD = 1;
SYSCLK->PWRCON.STOP = 0;
SYSCLK->PWRCON.STANDBY_PD = 0;
SYSCLK->PWRCON.PIN_ENB= 0;
SYSCLK->PWRCON.OSC10K_ENB= 0;
SYSCLK->PWRCON.TIMER_SEL = u32TimerSel;
switch(u32DPDWakeupMode)
{
case DPDWAKEUPMODE_PINOSC10KWAKEUP:
break;
case DPDWAKEUPMODE_PINWAKEUP:
SYSCLK->PWRCON.OSC10K_ENB = 1; //Disable OSC10K Wakeup
break;
case DPDWAKEUPMODE_OSC10KWAKEUP:
SYSCLK->PWRCON.PIN_ENB = 1; //Disable PIN Wakeup
break;
case DPDWAKEUPMODE_ONLYPORWAKEUP:
SYSCLK->PWRCON.PIN_ENB = 1; //Disable PIN Wakeup
SYSCLK->PWRCON.OSC10K_ENB = 1; //Disable OSC10K Wakeup
break;
}
LOCKREG();
__wfi();
}
void DataFlashRead(uint32_t addr, uint32_t size, uint32_t buffer)
{
/* This is low level read function of USB Mass Storage */
int32_t len;
/* Modify the address to MASS_STORAGE_OFFSET */
addr += MASS_STORAGE_OFFSET;
len = (int32_t)size;
UNLOCKREG();
//FMC_Init();
while(len >= FLASH_PAGE_SIZE)
{
FMC_ReadPage(addr, (uint32_t *)buffer);
addr += FLASH_PAGE_SIZE;
buffer += FLASH_PAGE_SIZE;
len -= FLASH_PAGE_SIZE;
}
//FMC_DeInit();
LOCKREG();
}
int main(void)
{
uint8_t buffer[32] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16};
/* Unlock the protected registers */
UNLOCKREG();
/* Enable the 12MHz oscillator oscillation */
DrvSYS_SetOscCtrl(E_SYS_XTL12M, 1);
/* Waiting for 12MHz Xtal stable */
DrvSYS_Delay(5000);
/* HCLK clock source. 0: external 12MHz. */
DrvSYS_SelectHCLKSource(0);
LOCKREG();
DrvSYS_SetClockDivider(E_SYS_HCLK_DIV, 0); /* HCLK clock frequency = HCLK clock source / (HCLK_N + 1) */
nrf_init();
nrf_detect();
//nrf_rx_mode_no_aa(addr,5,16,40);
//nrf_rx_mode(addr,5,16,40);
nrf_rx_mode_dual(addr,5,40);
nrf_test_reg();
DrvGPIO_Open(E_GPA, 2, E_IO_OUTPUT);
DrvGPIO_Open(E_GPA, 3, E_IO_OUTPUT);
DrvGPIO_Open(E_GPA, 4, E_IO_OUTPUT);
DrvGPIO_Open(E_GPA, 5, E_IO_OUTPUT);
{
uint8_t status = nrf_read_reg(NRF_STATUS);
nrf_write_reg(NRF_WRITE_REG|NRF_STATUS,status); // clear IRQ flags
nrf_write_reg(NRF_FLUSH_RX, 0xff);
nrf_write_reg(NRF_FLUSH_TX, 0xff);
}
while(1) {
uint8_t buffer[32];
if(tx_done) {
static uint8_t yy = 0;
yy++;
if(yy&1) {
DrvGPIO_SetBit(E_GPA,2);
} else {
DrvGPIO_ClrBit(E_GPA,2);
}
if(tx_done == 1) {
} else {
}
buffer[0] = tx_done;
tx_done = 0;
}
if(rx_done) {
static uint8_t xx = 0;
rx_done = 0;
xx++;
if(xx & 1)
DrvGPIO_SetBit(E_GPA,5);
else
DrvGPIO_ClrBit(E_GPA,5);
//nrf_ack_packet(0,buffer, (xx&15) + 1);
nrf_ack_packet(0,rx_buffer, rx_len);
}
}
while(1) {
static uint8_t cnt = 0;
if(cnt&1) {
DrvGPIO_SetBit(E_GPA,2);
} else {
DrvGPIO_ClrBit(E_GPA,2);
}
DrvSYS_Delay(50000*2);
cnt++;
//nrf_tx_packet(buffer, 16);
//buffer[0]++;
if(nrf_rx_packet(buffer,16) == NRF_RX_OK)
{
static uint8_t xx = 0;
xx++;
if(xx & 1)
DrvGPIO_SetBit(E_GPA,5);
else
DrvGPIO_ClrBit(E_GPA,5);
}
}
return 0;
}
void DataFlashWrite(uint32_t addr, uint32_t size, uint32_t buffer)
{
/* This is low level write function of USB Mass Storage */
int32_t len, i, offset;
uint32_t *pu32;
uint32_t alignAddr;
/* Modify the address to MASS_STORAGE_OFFSET */
addr += MASS_STORAGE_OFFSET;
len = (int32_t)size;
UNLOCKREG();
//FMC_Init();
if ( len == FLASH_PAGE_SIZE && ((addr & (FLASH_PAGE_SIZE-1)) == 0) )
{
FMC_Erase(addr);
while (len >= FLASH_PAGE_SIZE)
{
FMC_ProgramPage(addr, (uint32_t *) buffer);
len -= FLASH_PAGE_SIZE;
buffer += FLASH_PAGE_SIZE;
addr += FLASH_PAGE_SIZE;
}
}
else
{
do
{
alignAddr = addr & 0x1FE00;
/* Get the sector offset*/
offset = ( addr & (FLASH_PAGE_SIZE-1) );
if ( offset || (size < FLASH_PAGE_SIZE) )
{
/* Non 4k alignment. Note: It needs to avoid add MASS_STORAGE_OFFSET twice. */
DataFlashRead(alignAddr - MASS_STORAGE_OFFSET, FLASH_PAGE_SIZE, (uint32_t)&g_sectorBuf[0]);
}
/* Update the data */
pu32 = (uint32_t *)buffer;
len = FLASH_PAGE_SIZE - offset;
if (size < len)
len = size;
for (i=0; i<len/4; i++)
{
g_sectorBuf[offset/4 + i] = pu32[i];
}
FMC_Erase(alignAddr);
for(i=0; i<16; i++)
{
FMC_ProgramPage(alignAddr + (i << 8), (uint32_t *) g_sectorBuf + (i << 8));
}
size -= len;
addr += len;
buffer += len;
} while (size > 0);
}
//FMC_DeInit();
LOCKREG();
}
void SystemInit (void)
{
// set init port pin values and types for LDG34+ HW
PORT0->DOUT = 0;
PORT1->DOUT = 0;
PORT2->DOUT = 0;
PORT3->DOUT = BIT5 + BIT4 + BIT1; // inputs and TXD remain high
PORT3->DMASK = BIT7; // reserved for debugging
// open pins are set to QBM to keep them fixed
// PORT0 7:OUT 6:QBM 5:OUT 4:OUT 3:QBM 2:QBM 1:OUT 0:OUT
outpw(&PORT0->PMD, (1<<14)+(3<<12)+(1<<10)+(1<<8)+(3<<6)+(3<<4)+(1<<2)+ 1);
// PORT1 7:QBM 6:QBM 5:IN 4:IN 3:OUT 2:OUT 1:QBM 0:IN
outpw(&PORT1->PMD, (3<<14)+(3<<12)+(0<<10)+(0<<8)+(1<<6)+(1<<4)+(3<<2)+ 0);
// PORT2 7:QBM 6:OUT 5:OUT 4:OUT 3:OUT 2:OUT 1:QBM 0:QBM
outpw(&PORT2->PMD, (3<<14)+(1<<12)+(1<<10)+(1<<8)+(1<<6)+(1<<4)+(3<<2)+ 3);
// PORT3 7:QBM 6:OUT 5:QBM 4:QBM 3:QBM 2:IN 1:QBM 0:QBM
outpw(&PORT3->PMD, (3<<14)+(1<<12)+(3<<10)+(3<<8)+(3<<6)+(0<<4)+(3<<2)+ 3);
/* Unlock proctected registers */
UNLOCKREG();
/* Enable external 12M Crystal */
SYSCLK->PWRCON.XTL12M_EN = 1;
/* Wait until 12M clock is stable. */
while(SYSCLK->CLKSTATUS.XTL12M_STB == 0);
/* switch PLL to fast CPU clock */
outpw(&SYSCLK->PLLCON, (0xC1FE + CPUFREQ));
/* Wait for PLL stable */
while (SYSCLK->CLKSTATUS.PLL_STB == 0);
/* Change HCLK clock source to be PLL. */
SYSCLK->CLKSEL0.HCLK_S = 2;
/* Lock procteted registers */
LOCKREG();
/* enable required clock lines and select 12M clock */
SYSCLK->u32APBCLK = 0xFFFFFFFF;
SYSCLK->u32CLKSEL1 = 0;
SYSCLK->u32CLKSEL2 = 0;
/* initialise configuration data from DataFlah */
Init_CV_area();
/* Select timer0 Operation mode as period mode */
TIMER0->TCSR.MODE = 1;
/* Select Time out period = (Period of timer clock input) * (8-bit Prescale + 1) * (24-bit TCMP)*/
TIMER0->TCSR.PRESCALE = 12-1; // steps of 1 us
TIMER0->TCMPR = 8; // Set TCMPR [0~16777215]
/* Enable timer0 interrupt */
TIMER0->TCSR.IE = 1;
NVIC->ISER[0] = BIT8;
/* Enable Timer0 */
TIMER0->TCSR.CEN = 1;
// set type, alt, mfp for all pins
outpw(&SYS->P0_MFP, 0);
outpw(&SYS->P1_MFP, 0x001 + (0x001<<4) + (0x001<<5)); // analog inputs
outpw(&SYS->P2_MFP, (0x100<<2) + (0x100<<6)); // PWM
outpw(&SYS->P3_MFP, 0xFF0000 + (0x001<<1) + (0x001<<2)); // TXD and INT0, Schmitt Trigger
// outpw(&SYS->P4_MFP, BIT7 + BIT6); // Emulator seem automatically be detected ?
/* int HW for feedback */
InitFeedback();
/* select usable ADC input channels, chan 7 for temperature */
SYS->TEMPCR = 1; // enable temperature sensor
ADC->u32ADCHER = 0x200 + BIT7 + BIT5 + BIT4 + BIT0;
/* set ADC mode and start it */
ADC->u32ADCR = 0xD;
ADC->ADCR.ADST = 1;
// enable rail signal detection via INT0
Init_Rail_detect();
}
/******************************************************************************//**
*@brief A simple FMC example. It Erase the LDROM and Verify ,then Program LDROM
* and read out data to compare.
*@param None
*@return None
**********************************************************************************/
void FMC_LDROM(void)
{
uint32_t u32Data, i;
int32_t i32Err;
// STR_UART_T sParam;
/* Unlock the protected registers */
UNLOCKREG();
/* Enable the 12MHz oscillator oscillation */
SYSCLK->PWRCON.XTL12M_EN = 1;
/* Waiting for 12M Xtal stable */
while (DrvSYS_GetChipClockSourceStatus(E_SYS_XTL12M) != 1);
/* Set UART Pin */
DrvGPIO_InitFunction(E_FUNC_UART0);
/* UART Setting */
/* sParam.u32BaudRate = 115200;
sParam.u8cDataBits = DRVUART_DATABITS_8;
sParam.u8cStopBits = DRVUART_STOPBITS_1;
sParam.u8cParity = DRVUART_PARITY_NONE;
sParam.u8cRxTriggerLevel= DRVUART_FIFO_1BYTES;
*/
/* Select UART Clock Source From 12MHz */
DrvSYS_SelectIPClockSource(E_SYS_UART_CLKSRC, 0);
/* Set UART Configuration */
// DrvUART_Open(UART_PORT0, &sParam);
/* Enable ISP function */
DrvFMC_EnableISP();
/* Enable LDROM update */
DrvFMC_EnableLDUpdate();
/* Page Erase LDROM */
printf("Erase LDROM test...............................");
for(i=0; i<4096; i+=PAGE_SIZE)
DrvFMC_Erase(LDROM_BASE + i);
/* Erase Verify */
i32Err = 0;
for(i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4)
{
DrvFMC_Read(i, &u32Data);
if(u32Data != 0xFFFFFFFF)
{
i32Err = 1;
}
}
if (i32Err)
printf("[FAIL]\n\r");
else
printf("[OK]\n\r");
/* Program LD ROM and read out data to compare */
printf("Program LDROM test.............................");
for(i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4)
{
DrvFMC_Write(i, i);
}
i32Err = 0;
for(i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4)
{
DrvFMC_Read(i, &u32Data);
if(u32Data != i)
{
i32Err = 1;
}
}
if (i32Err)
printf("[FAIL]\n\r");
else
printf("[OK]\n\r");
/* Disable ISP function */
DrvFMC_DisableISP();
/* Lock protected registers */
LOCKREG();
printf("FMC Sample Code Completed!\n\r");
}
/**
* @brief Main funcion
* @param None
* @retval 0: Success; <0: Failed
*/
int32_t main (void)
{
int32_t i32Err;
uint32_t u32Data, i, u32ImageSize, j, *pu32Loader;
uint8_t ch;
UNLOCKREG();
/* Enable FMC ISP function */
FMC_Init();
/* Read Company ID */
u32Data = 0;
FMC_ReadCID(&u32Data);
if (u32Data != 0xda)
{
printf("Wrong CID: 0x%x\n", u32Data);
goto lexit;
}
/* Check the signature to check if Simple LD code is finished or not */
if (inpw(KEY_ADDR) == SIGNATURE)
{
/* Just clear SIGNATURE and finish the sample code if Simple LD code has been executed. */
outpw(KEY_ADDR, 0);
/* Read BS */
printf(" Boot Mode .................................. ");
if (FMC_GetBootSelect() == E_FMC_APROM)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
}
goto lexit;
}
printf("\n\n");
printf("+-------------------------------------------------------------------------+\n");
printf("| NANO1xx Flash Memory Controller Driver Sample Code |\n");
printf("+-------------------------------------------------------------------------+\n");
printf(" NOTE: This sample must be applied to NANO1xx series equipped with 16KB RAM.\n");
/* Read BS */
printf(" Boot Mode .................................. ");
if (FMC_GetBootSelect() == E_FMC_APROM)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
goto lexit;
}
/* Read Data Flash base address */
u32Data = FMC_ReadDataFlashBaseAddr();
printf(" Data Flash Base Address .................... [0x%08x]\n", u32Data);
/* Check the data in LD ROM to avoid overwrite them */
FMC_Read(LDROM_BASE, &u32Data);
if (u32Data != 0xFFFFFFFF)
{
printf("\n WARNING: There is code in LD ROM.\n If you proceed, the code in LD ROM will be corrupted.\n");
printf(" Continue? [y/n]:");
ch = getchar();
putchar(ch);
if (ch != 'y')
goto lexit;
printf("\n\n");
}
/* Enable LDROM update */
FMC_EnableLDUpdate();
printf(" Erase LD ROM ............................... ");
/* Page Erase LDROM */
for (i = 0; i < 4096; i += PAGE_SIZE)
FMC_Erase(LDROM_BASE + i);
/* Erase Verify */
i32Err = 0;
for (i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4)
{
FMC_Read(i, &u32Data);
if(u32Data != 0xFFFFFFFF)
{
printf(" u32Data = 0x%x\n", u32Data);
i32Err = 1;
}
}
if (i32Err)
printf("[FAIL]\n");
else
printf("[OK]\n");
printf(" Program LD ROM test ........................ ");
/* Program LD ROM and read out data to compare it */
for (i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4)
{
FMC_Write(i, i);
}
i32Err = 0;
for (i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4)
{
FMC_Read(i, &u32Data);
if(u32Data != i)
{
i32Err = 1;
}
}
if (i32Err)
printf("[FAIL]\n");
else
printf("[OK]\n");
/* Check LD image size */
u32ImageSize = (uint32_t)&loaderImageLimit - (uint32_t)&loaderImageBase;
if (u32ImageSize == 0)
{
printf(" ERROR: Loader Image is 0 bytes!\n");
goto lexit;
}
if (u32ImageSize > 4096)
{
printf(" ERROR: Loader Image is larger than 4KBytes!\n");
goto lexit;
}
printf(" Program Simple LD Code ..................... ");
pu32Loader = (uint32_t *)&loaderImageBase;
for (i = 0; i < u32ImageSize; i += PAGE_SIZE)
{
FMC_Erase(LDROM_BASE + i);
for (j = 0; j < PAGE_SIZE; j += 4)
{
FMC_Write(LDROM_BASE + i + j, pu32Loader[(i + j) / 4]);
}
}
/* Verify loader */
i32Err = 0;
for (i = 0; i < u32ImageSize; i += PAGE_SIZE)
{
for(j = 0; j < PAGE_SIZE; j += 4)
{
FMC_Read(LDROM_BASE + i + j, &u32Data);
if (u32Data != pu32Loader[(i+j)/4])
i32Err = 1;
if (i + j >= u32ImageSize)
break;
}
}
if(i32Err)
{
printf("[FAIL]\n");
}
else
{
printf("[OK]\n");
/* Reset CPU to boot to LD mode */
printf("\n >>> Reset to LD mode <<<\n");
FMC_BootSelect(E_FMC_LDROM);
GCR->IPRST_CTL1 = GCR_IPRSTCTL1_CPU;
}
lexit:
/* Disable FMC ISP function */
FMC_DeInit();
/* Lock protected registers */
LOCKREG();
printf("\nFMC Sample Code Completed.\n");
}
void kumpul(){
clr_all_pannal();
uint8_t hasiluart[8];
while(key==1){
DrvGPIO_ClrBit(E_GPC,12);
DrvSYS_Delay(10000);
DrvGPIO_ClrBit(E_GPB,0);
print_lcd(0,"Tap Kartu Anda");
print_lcd(1,"Pada Reader");
print_lcd(2,"Tekan Button");
print_lcd(3,"untuk Kembali");
if(DrvGPIO_GetBit(E_GPB,15)==0){
main();}
bacarfid();
DrvUART_Read(UART_PORT0,hasiluart,1);
if(hasiluart[0]=='B'){
DrvGPIO_ClrBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_SetBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_ClrBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_SetBit(E_GPB,11);
DrvSYS_Delay(100000);
clr_all_pannal();
goto benar;
}
if(hasiluart[0]!='B'){
SYSCLK->PWRCON.XTL12M_EN = 1;//Enable 12MHz Crystal
SYSCLK->CLKSEL0.HCLK_S = 0;
LOCKREG();
clr_all_pannal();
print_lcd(0,"Maaf :(");
print_lcd(1,"Nama kamu gak");
print_lcd(2,"Ada di Basis Data");
print_lcd(3,"COBA LAGI !!!");
DrvGPIO_ClrBit(E_GPB,11);
DrvGPIO_ClrBit(E_GPB,11);
DrvSYS_Delay(500000);
DrvGPIO_SetBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_ClrBit(E_GPB,11);
DrvSYS_Delay(500000);
DrvGPIO_SetBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_ClrBit(E_GPB,11);
delay(5000000);
kumpul();
}
//key2=Scankey();
/*if(key2==2){
DrvGPIO_ClrBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_SetBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_ClrBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_SetBit(E_GPB,11);
DrvSYS_Delay(100000);
clr_all_pannal();
}*/
//mennu harus diubah klo uart dah jadi
benar:
while(hasiluart[0]=='B'){
print_lcd(0,"Silakan Masukkan");
print_lcd(1,"Borang Kamu");
SYSCLK->PWRCON.XTL12M_EN = 1;//Enable 12MHz Crystal
SYSCLK->CLKSEL0.HCLK_S = 0;
LOCKREG();
servo_buka();
DrvSYS_Delay(10);
Scankey();
if(DrvGPIO_GetBit(E_GPA,0)==0){
clr_all_pannal();
print_lcd(0,"Terima Kasih :)");
print_lcd(1,"Tito Alvi");
hitung++;
DrvGPIO_ClrBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_SetBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_ClrBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_SetBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_ClrBit(E_GPB,11);
DrvSYS_Delay(100000);
DrvGPIO_SetBit(E_GPB,11);
DrvSYS_Delay(100000);
print_lcd(0,"Terima Kasih :)");
DrvSYS_Delay(2000000);
main();
}
while(DrvGPIO_GetBit(E_GPA,0)==0){ //sensor cahaya = GPA0 - SIG
main();}
}
}
}
void WDT_Feed()
{
UNLOCKREG();
DrvWDT_Ioctl(E_WDT_IOC_RESET_TIMER, 0);
LOCKREG();
}
//*****************************************************************************
//
//! \brief PWM Output.
//!
//! \param None
//!
//! \return None
//
//*****************************************************************************
void PWMOutput(void)
{
S_DRVPWM_TIME_DATA_T sPt;
int32_t i32Loop = 1;
UNLOCKREG();
//
// P5.1 -> XTAL2, P5.0 -> XTAL1
//
GCR->P5_MFP = (GCR->P5_MFP & 0x00FFFCFC) | 0x03;
CLK->PWRCON_BITS.XTLCLK_EN = 1;
//
// Waiting for 12M Xtal stalble
//
DrvSYS_Delay(5000);
//
//Enable PWM clock
//
DrvPWM_Open();
CLK->CLKSEL1_BITS.PWM23_S = 2;
//
// Set PWM pin
//
DrvGPIO_InitFunction(FUNC_PWM3);
UNLOCKREG();
DrvSYS_SelectHCLKSource(0);
LOCKREG();
while(i32Loop)
{
uint8_t u8ItemOK;
u8ItemOK = 1;
g_u16Frequency = 256;
if (u8ItemOK && g_u8PWMCount == 0)
{
s_u32Pulse = 0;
g_u8PWMCount = 1;
//
// PWM Timer property
//
sPt.u8Mode = DRVPWM_AUTO_RELOAD_MODE;
sPt.u32Frequency = g_u16Frequency;
//
// High Pulse peroid : Total Pulse peroid = 10 : 90
//
sPt.u8HighPulseRatio = 90;
sPt.i32Inverter = 0;
//
// Set PWM Timer Configuration
//
DrvPWM_SetTimerClk(DRVPWM_TIMER3, &sPt);
//
// Enable Output for PWM Timer */
//
DrvPWM_SetTimerIO(DRVPWM_TIMER3, 1);
//
// Enable Interrupt Sources of PWM Timer and install call back function
//
DrvPWM_EnableInt(DRVPWM_TIMER3, PWM_INT_PERIOD, PWMA_IRQHandler, 0);
//
//Enable the PWM Timer
//
DrvPWM_Enable(DRVPWM_TIMER3);
while (g_u8PWMCount);
DrvPWM_Disable(DRVPWM_TIMER3);
}
}
DrvPWM_Close();
}
//==============================================================================
//Subroutine: Get_Maestro_RTC
//Function: Get date/time from RTC
//==============================================================================
void Get_Maestro_RTC(union MaestroDate *pDate, int index)
{
int i;
UNLOCKREG();
Rx_Data0[1] = 2;
DrvI2C_InstallCallback(I2C_PORT0, I2CFUNC, I2C0_Callback_Rx);
DrvI2C_InstallCallback(I2C_PORT0, TIMEOUT, I2C0_Timeout);
DrvI2C_EnableTimeoutCount(I2C_PORT0, 1, 1);
for (i = 5; i >= 0; i--) {
EndFlag0 = 0;
if (i > 2)
Rx_Data0[0] = i + 1;
else
Rx_Data0[0] = i;
/* I2C0 as master sends START signal */
start_I2C = 0;
EndFlag0 = 0;
Date_valid = 1;
Active_I2C_Slave_Addr = M41T0_I2C_Slave_Addr;
DrvI2C_Ctrl(I2C_PORT0, 1, 0, 0, 0);
while (EndFlag0 == 0);
// Get_Maestro_RTC(&temp_date, i);
// }
if (Date_valid) {
switch(i) {
case 0:
pDate->PackDate.Second = 10 * ((Rx_Data0[2]&0x7f) >> 4) + (Rx_Data0[2]&0x0f);
break;
case 1:
pDate->PackDate.Minute = 10 * ((Rx_Data0[2]&0x7f) >> 4) + (Rx_Data0[2]&0x0f);
break;
case 2:
pDate->PackDate.Hour = 10 * ((Rx_Data0[2]&0x3f) >> 4) + (Rx_Data0[2]&0x0f);
break;
case 3:
pDate->PackDate.Day = 10 * ((Rx_Data0[2]&0x3f) >> 4) + (Rx_Data0[2]&0x0f);
break;
case 4:
pDate->PackDate.Month = 10 * ((Rx_Data0[2]&0x1f) >> 4) + (Rx_Data0[2]&0x0f);
break;
case 5:
pDate->PackDate.Year = 10 * ((Rx_Data0[2]&0xff) >> 4) + (Rx_Data0[2]&0x0f);
if (pDate->PackDate.Year < 100)
pDate->PackDate.Year += 2000;
break;
}
}
}
DrvI2C_UninstallCallBack(I2C_PORT0, TIMEOUT);
DrvI2C_UninstallCallBack(I2C_PORT0, I2CFUNC);
DrvI2C_EnableTimeoutCount(I2C_PORT0, 0, 0);
LOCKREG();
/* pDate->PackDate.Second = 10 * ((Rx_Data0[2]&0x7f) >> 4) + (Rx_Data0[2]&0x0f);
pDate->PackDate.Minute = 10 * ((Rx_Data0[3]&0x7f) >> 4) + (Rx_Data0[3]&0x0f);
pDate->PackDate.Hour = 10 * ((Rx_Data0[4]&0x3f) >> 4) + (Rx_Data0[4]&0x0f);
pDate->PackDate.Day = 10 * ((Rx_Data0[6]&0x3f) >> 4) + (Rx_Data0[6]&0x0f);
pDate->PackDate.Month = 10 * ((Rx_Data0[7]&0x1f) >> 4) + (Rx_Data0[7]&0x0f);
pDate->PackDate.Year = 10 * ((Rx_Data0[8]&0xff) >> 4) + (Rx_Data0[8]&0x0f);*/
/*const unsigned char gImage_kkk1[32] = {
0X00,0X00,0X03,0XC0,0X7C,0X00,0X00,0X00,0X00,0X00,0X07,0XE0,0XFC,0X00,0X00,0X00,
0X00,0X00,0X07,0XF0,0XFE,0X00,0X00,0X00,0X00,0X00,0X0F,0XF1,0XFF,0X00,0X00,0X00,
};*/
}
//==============================================================================
//Subroutine: Set_Maestro_RTC
//Function: Set date/time from RTC
//==============================================================================
void Set_Maestro_RTC(union MaestroDate *pDate, int index)
{
// Set_Maestro_RTC(&temp_date, 10);
/* Tx_Data0[2] = (pDate->PackDate.Second / 10) << 4 + (pDate->PackDate.Second % 10);
Tx_Data0[3] = (pDate->PackDate.Minute / 10) << 4 + (pDate->PackDate.Minute % 10);
Tx_Data0[4] = (pDate->PackDate.Hour / 10) << 4 + (pDate->PackDate.Hour % 10);
Tx_Data0[5] = 3;
Tx_Data0[6] = (pDate->PackDate.Day / 10) << 4 + (pDate->PackDate.Day % 10);
Tx_Data0[7] = (pDate->PackDate.Month / 10) << 4 + (pDate->PackDate.Month % 10);
Tx_Data0[8] = (pDate->PackDate.Year / 10) << 4 + (pDate->PackDate.Year % 10);*/
//Tx_Data0[2] = pDate->PackDate.Second;
Tx_Data0[2] = (pDate->PackDate.Second / 10) << 4;
Tx_Data0[2] += (pDate->PackDate.Second % 10);
//Tx_Data0[3] = pDate->PackDate.Minute;
Tx_Data0[3] = (pDate->PackDate.Minute / 10) << 4;
Tx_Data0[3] += (pDate->PackDate.Minute % 10);
//Tx_Data0[4] = pDate->PackDate.Hour;
Tx_Data0[4] = (pDate->PackDate.Hour / 10) << 4;
Tx_Data0[4] += (pDate->PackDate.Hour % 10);
Tx_Data0[5] = 3;
//Tx_Data0[6] = pDate->PackDate.Day;
Tx_Data0[6] = (pDate->PackDate.Day / 10) << 4;
Tx_Data0[6] += (pDate->PackDate.Day % 10);
//Tx_Data0[7] = pDate->PackDate.Month;
Tx_Data0[7] = (pDate->PackDate.Month / 10) << 4;
Tx_Data0[7] += (pDate->PackDate.Month % 10);
//Tx_Data0[8] = pDate->PackDate.Year;
if (pDate->PackDate.Year < 100) {
Tx_Data0[8] = (pDate->PackDate.Year / 10) << 4;
Tx_Data0[8] += (pDate->PackDate.Year % 10);
}
else {
Tx_Data0[8] = ((pDate->PackDate.Year-2000) / 10) << 4;
Tx_Data0[8] += ((pDate->PackDate.Year-2000) % 10);
}
Tx_Data0[1] = 8;
Tx_Data0[0] = 0;
switch (index) {
case 0:
Tx_Data0[0] = 0;
break;
case 1:
Tx_Data0[0] = 1;
Tx_Data0[2] = Tx_Data0[3];
break;
case 2:
Tx_Data0[0] = 2;
Tx_Data0[2] = Tx_Data0[4];
break;
case 3:
Tx_Data0[0] = 4;
Tx_Data0[2] = Tx_Data0[6];
break;
case 4:
Tx_Data0[0] = 5;
Tx_Data0[2] = Tx_Data0[7];
break;
case 5:
Tx_Data0[0] = 6;
Tx_Data0[2] = Tx_Data0[8];
break;
}
if (index < 6) {
Tx_Data0[1] = 2;
}
UNLOCKREG();
DrvI2C_InstallCallback(I2C_PORT0, I2CFUNC, I2C0_Callback_Tx);
DrvI2C_InstallCallback(I2C_PORT0, TIMEOUT, I2C0_Timeout);
DrvI2C_EnableTimeoutCount(I2C_PORT0, 1, 1);
/* I2C0 as master sends START signal */
start_I2C = 0;
EndFlag0 = 0;
Active_I2C_Slave_Addr = M41T0_I2C_Slave_Addr;
DrvI2C_Ctrl(I2C_PORT0, 1, 0, 0, 0);
while (EndFlag0 == 0);
DrvI2C_UninstallCallBack(I2C_PORT0, I2CFUNC);
DrvI2C_UninstallCallBack(I2C_PORT0, TIMEOUT);
DrvI2C_EnableTimeoutCount(I2C_PORT0, 0, 0);
LOCKREG();
}