/**
* @brief Set Salve Address
* @param[in] Address Value of Salve Address ( 0x02 ~ 0xFE )
* @return None.
* @remarks LSB[0] bit must set to 0.
* @see MES_I2C_SetClockPrescaler, MES_I2C_GetClockPrescaler
* MES_I2C_SetExtendedIRQEnable, MES_I2C_GetExtendedIRQEnable,
* MES_I2C_GetSlaveAddress,
* MES_I2C_SetDataDelay, MES_I2C_GetDataDelay
*/
void MES_I2C_SetSlaveAddress( U32 ModuleIndex, U8 Address)
{
MES_ASSERT( 0 == (Address & 0x01) );
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
__g_ModuleVariables[ModuleIndex].pRegister->IAR = (U32)Address;
}
/**
* @brief Set PCLK divider and clock prescaler.
* @param[out] pPclkDivider Get PCLK divider ( 16, 256 )
* @param[out] pPrescaler Get prescaler. \n
* @return None.
* @see MES_I2C_SetClockPrescaler,
* MES_I2C_SetExtendedIRQEnable, MES_I2C_GetExtendedIRQEnable,
* MES_I2C_SetSlaveAddress, MES_I2C_GetSlaveAddress,
* MES_I2C_SetDataDelay, MES_I2C_SetDataDelay
*/
void MES_I2C_GetClockPrescaler( U32 ModuleIndex, U32* pPclkDivider, U32* pPrescaler )
{
const U32 CLKSRC_POS = 6;
const U32 CLKSRC_MASK = 1UL << CLKSRC_POS;
const U32 CLK_SCALER_MASK = 0x0F;
register U32 ReadValue;
MES_ASSERT( CNULL != pPclkDivider );
MES_ASSERT( CNULL != pPrescaler );
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
ReadValue = __g_ModuleVariables[ModuleIndex].pRegister->ICCR;
if( ReadValue & CLKSRC_MASK )
{
*pPclkDivider = 256;
}
else
{
*pPclkDivider = 16;
}
*pPrescaler = (ReadValue & CLK_SCALER_MASK)+1;
}
/**
* @brief Set Send Data
* @param[in] WriteData Value of Write Data ( 0x0 ~ 0xFF )
* @return None.
* @see MES_I2C_SetAckGenerationEnable, MES_I2C_GetAckGenerationEnable,
* MES_I2C_ClearOperationHold, MES_I2C_ControlMode,
* MES_I2C_ReadByte,
* MES_I2C_IsBusy, MES_I2C_BusDisable
*/
void MES_I2C_WriteByte ( U32 ModuleIndex, U8 WriteData)
{
MES_ASSERT( 0xff >= WriteData ); // ghcstop fix
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
__g_ModuleVariables[ModuleIndex].pRegister->IDSR = (U32)( WriteData );
}
void MES_ADC_SetClockPClkMode( MES_PCLKMODE mode )
{
const U32 PCLKMODE_POS = 3;
register struct MES_ADC_RegisterSet* pRegister;
register U32 regvalue;
U32 clkmode=0;
MES_ASSERT( CNULL != __g_pRegister );
pRegister = __g_pRegister;
switch(mode)
{
case MES_PCLKMODE_DYNAMIC: clkmode = 0; break;
case MES_PCLKMODE_ALWAYS: clkmode = 1; break;
default: MES_ASSERT( CFALSE );
}
regvalue = pRegister->CLKENB;
regvalue &= ~(1UL<<PCLKMODE_POS);
regvalue |= ( clkmode & 0x01 ) << PCLKMODE_POS;
pRegister->CLKENB = regvalue;
}
/**
* @brief Indicates whether a specified interrupt is enabled or disabled.
* @param[in] IntNum Interrupt Number ( 0 ).
* @return \b CTRUE indicate that Interrupt is enabled. \n
* \b CFALSE indicate that Interrupt is disabled.
* @remarks ADC Module Only have one interrupt. So always \e IntNum set to 0.
* @see MES_ADC_GetInterruptNumber, MES_ADC_SetInterruptEnable,
* MES_ADC_GetInterruptPending,
* MES_ADC_ClearInterruptPending, MES_ADC_SetInterruptEnableAll,
* MES_ADC_GetInterruptEnableAll, MES_ADC_GetInterruptPendingAll,
* MES_ADC_ClearInterruptPendingAll, MES_ADC_GetInterruptPendingNumber
*/
CBOOL MES_ADC_GetInterruptEnable( S32 IntNum )
{
MES_ASSERT( 0 == IntNum );
MES_ASSERT( CNULL != __g_pRegister );
return (CBOOL)( __g_pRegister->ADCINTENB & 0x01);
}
/**
* @brief Indicates whether a specified interrupt is pended or not
* @param[in] IntNum Interrupt Number ( 0 ).
* @return \b CTRUE indicate that Pending is seted. \n
* \b CFALSE indicate that Pending is Not Seted.
* @remarks ADC Module Only have one interrupt. So always \e IntNum set to 0.
* @see MES_ADC_GetInterruptNumber, MES_ADC_SetInterruptEnable,
* MES_ADC_GetInterruptEnable,
* MES_ADC_ClearInterruptPending, MES_ADC_SetInterruptEnableAll,
* MES_ADC_GetInterruptEnableAll, MES_ADC_GetInterruptPendingAll,
* MES_ADC_ClearInterruptPendingAll, MES_ADC_GetInterruptPendingNumber
*/
CBOOL MES_ADC_GetInterruptPending( S32 IntNum )
{
MES_ASSERT( 0 == IntNum );
MES_ASSERT( CNULL != __g_pRegister );
return (CBOOL)( __g_pRegister->ADCINTCLR & 0x01);
}
/**
* @brief Set PCLK divider and clock prescaler.
* @param[in] PclkDivider Set PCLK divider ( 16, 256 )
* @param[in] Prescaler Set prescaler. \n
* 2 ~ 16 ( when PCLK divider is seted 16 ). \n
* 1 ~ 16 ( when PCLK divider is seted 256 ).
* @return None.
* @see MES_I2C_GetClockPrescaler,
* MES_I2C_SetExtendedIRQEnable, MES_I2C_GetExtendedIRQEnable,
* MES_I2C_SetSlaveAddress, MES_I2C_GetSlaveAddress,
* MES_I2C_SetDataDelay, MES_I2C_SetDataDelay
*/
void MES_I2C_SetClockPrescaler( U32 ModuleIndex, U32 PclkDivider, U32 Prescaler )
{
const U32 CLKSRC_POS = 6;
const U32 CLKSRC_MASK = 1UL << CLKSRC_POS;
const U32 CLK_SCALER_MASK = 0x0F;
register U32 SetPclkDivider=0;
register U32 ReadValue;
MES_ASSERT( (16==PclkDivider) || (256==PclkDivider) );
MES_ASSERT( 1 <= Prescaler && Prescaler <= 16 );
MES_ASSERT( (16!=PclkDivider) || ( 2 <= Prescaler && Prescaler <= 16) );
MES_ASSERT( (CNULL != __g_ModuleVariables[ModuleIndex].pRegister) );
if( 16 == PclkDivider )
{
SetPclkDivider = 0;
}
else if( 256 == PclkDivider )
{
SetPclkDivider = 1;
}
ReadValue = __g_ModuleVariables[ModuleIndex].pRegister->ICCR;
ReadValue &= ~( CLKSRC_MASK | CLK_SCALER_MASK );
ReadValue |= ((SetPclkDivider << CLKSRC_POS) | (Prescaler-1));
__g_ModuleVariables[ModuleIndex].pRegister->ICCR = ReadValue;
}
/**
* @brief Set a base address of register set.
* @param[in] BaseAddress Module's base address
* @return None.
* @see MES_I2C_GetPhysicalAddress, MES_I2C_GetSizeOfRegisterSet,
* MES_I2C_GetBaseAddress,
* MES_I2C_OpenModule, MES_I2C_CloseModule,
* MES_I2C_CheckBusy, MES_I2C_CanPowerDown
*/
void MES_I2C_SetBaseAddress( U32 ModuleIndex, U32 BaseAddress )
{
MES_ASSERT( 0 != BaseAddress );
MES_ASSERT( NUMBER_OF_I2C_MODULE > ModuleIndex );
__g_ModuleVariables[ModuleIndex].pRegister = (struct MES_I2C_RegisterSet *)BaseAddress;
//__g_ModuleVariables[ModuleIndex].pRegister = (struct MES_I2C_RegisterSet *)BaseAddress; // ghcstop delete
}
/**
* @brief Set delay, in PCLKs, between SCL and SDA
* @param[in] delay number of PCLK ( 1 ~ 32 ) for delay
* @return None.
* @remarks SDA must be changed at center of low state of SCL from I2C spec.
* For this, you have to set delay for SDA change position from falling edge of SCL when TX.
* This delay is also used for SDA fetch postiion from rising edge of SCL when RX.
* Usually this dealy is 1/4 of SCL period in PCLKs.
* @see MES_I2C_SetClockPrescaler, MES_I2C_GetClockPrescaler
* MES_I2C_SetExtendedIRQEnable, MES_I2C_GetExtendedIRQEnable,
* MES_I2C_SetSlaveAddress, MES_I2C_GetSlaveAddress,
* MES_I2C_GetDataDelay
*/
void MES_I2C_SetDataDelay( U32 ModuleIndex, U32 delay )
{
MES_ASSERT( 1 <= delay && delay <= 32 );
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
__g_ModuleVariables[ModuleIndex].pRegister->QCNT_MAX = delay-1;
}
/**
* @brief Clear a pending state of specified interrupt.
* @param[in] IntNum Interrupt number ( 0 ).
* @return None.
* @remarks ADC Module Only have one interrupt. So always \e IntNum set to 0.
* @see MES_ADC_GetInterruptNumber, MES_ADC_SetInterruptEnable,
* MES_ADC_GetInterruptEnable, MES_ADC_GetInterruptPending,
* MES_ADC_SetInterruptEnableAll,
* MES_ADC_GetInterruptEnableAll, MES_ADC_GetInterruptPendingAll,
* MES_ADC_ClearInterruptPendingAll, MES_ADC_GetInterruptPendingNumber
*/
void MES_ADC_ClearInterruptPending( S32 IntNum )
{
MES_ASSERT( 0 == IntNum );
MES_ASSERT( CNULL != __g_pRegister );
__g_pRegister->ADCINTCLR = 0x01;
}
/**
* @brief Set a base address of register set.
* @param[in] BaseAddress Module's base address
* @return None.
* @see MES_ADC_GetPhysicalAddress, MES_ADC_GetSizeOfRegisterSet,
* MES_ADC_GetBaseAddress,
* MES_ADC_OpenModule, MES_ADC_CloseModule,
* MES_ADC_CheckBusy, MES_ADC_CanPowerDown
*/
void MES_ADC_SetBaseAddress( U32 BaseAddress )
{
MES_ASSERT( CNULL != BaseAddress );
MES_ASSERT( NUMBER_OF_ADC_MODULE > __g_CurModuleIndex );
__g_ModuleVariables[__g_CurModuleIndex].pRegister = (struct MES_ADC_RegisterSet *)BaseAddress;
__g_pRegister = (struct MES_ADC_RegisterSet *)BaseAddress;
}
/**
* @brief Indicates whether a specified interrupt is enabled or disabled.
* @param[in] IntNum Interrupt Number ( 0 ).
* @return \b CTRUE indicate that Interrupt is enabled. \n
* \b CFALSE indicate that Interrupt is disabled.
* @remarks I2C Module have one interrupt. So always \e IntNum set to 0.
* @see MES_I2C_GetInterruptNumber, MES_I2C_SetInterruptEnable,
* MES_I2C_GetInterruptPending,
* MES_I2C_ClearInterruptPending, MES_I2C_SetInterruptEnableAll,
* MES_I2C_GetInterruptEnableAll, MES_I2C_GetInterruptPendingAll,
* MES_I2C_ClearInterruptPendingAll, MES_I2C_GetInterruptPendingNumber
*/
CBOOL MES_I2C_GetInterruptEnable( U32 ModuleIndex, S32 IntNum )
{
const U32 IRQ_ENB_POS = 5;
const U32 IRQ_ENB_MASK = 1UL << IRQ_ENB_POS;
MES_ASSERT( 0 == IntNum );
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
return (CBOOL)( (__g_ModuleVariables[ModuleIndex].pRegister->ICCR & IRQ_ENB_MASK) >> IRQ_ENB_POS );
}
/**
* @brief Indicates whether a specified interrupt is pended or not
* @param[in] IntNum Interrupt Number ( 0 ).
* @return \b CTRUE indicate that Pending is seted. \n
* \b CFALSE indicate that Pending is Not Seted.
* @remarks I2C Module have one interrupt. So always \e IntNum set to 0.
* @see MES_I2C_GetInterruptNumber, MES_I2C_SetInterruptEnable,
* MES_I2C_GetInterruptEnable,
* MES_I2C_ClearInterruptPending, MES_I2C_SetInterruptEnableAll,
* MES_I2C_GetInterruptEnableAll, MES_I2C_GetInterruptPendingAll,
* MES_I2C_ClearInterruptPendingAll, MES_I2C_GetInterruptPendingNumber
*/
CBOOL MES_I2C_GetInterruptPending( U32 ModuleIndex, S32 IntNum )
{
const U32 PEND_POS = 0;
const U32 PEND_MASK = 1UL << PEND_POS;
MES_ASSERT( 0 == IntNum );
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
return (CBOOL)(__g_ModuleVariables[ModuleIndex].pRegister->PEND & PEND_MASK);
}
/**
* @brief Clear a pending state of specified interrupt.
* @param[in] IntNum Interrupt number ( 0 ).
* @return None.
* @remarks I2C Module have one interrupt. So always \e IntNum set to 0.
* @see MES_I2C_GetInterruptNumber, MES_I2C_SetInterruptEnable,
* MES_I2C_GetInterruptEnable, MES_I2C_GetInterruptPending,
* MES_I2C_SetInterruptEnableAll,
* MES_I2C_GetInterruptEnableAll, MES_I2C_GetInterruptPendingAll,
* MES_I2C_ClearInterruptPendingAll, MES_I2C_GetInterruptPendingNumber
*/
void MES_I2C_ClearInterruptPending( U32 ModuleIndex, S32 IntNum )
{
const U32 PEND_POS = 0;
const U32 PEND_MASK = 1UL << PEND_POS;
MES_ASSERT( 0 == IntNum );
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
__g_ModuleVariables[ModuleIndex].pRegister->PEND = PEND_MASK;
}
/**
* @brief Check ADC's operation
* @return \b CTRUE indicate that ADC is Busy. \n
\b CFALSE indicate that ADC Conversion is ended.
* @see MES_ADC_SetPrescalerValue, MES_ADC_GetPrescalerValue,
* MES_ADC_SetPrescalerEnable, MES_ADC_GetPrescalerEnable,
* MES_ADC_SetInputChannel, MES_ADC_GetInputChannel,
* MES_ADC_SetStandbyMode, MES_ADC_GetStandbyMode,
* MES_ADC_Start,
* MES_ADC_GetConvertedData
*/
CBOOL MES_ADC_IsBusy( void )
{
const U32 ADEN_MASK = (0x01 << 0);
MES_ASSERT( CNULL != __g_pRegister );
return (CBOOL)(__g_pRegister->ADCCON & ADEN_MASK );
}
/**
* @brief I2C's Bus Disable
* @return None.
* @remarks Only use for Clear Arbitration fail status. \n
* Arbitration status means that conflicting two I2C master device when
* data send. \n
* This case, master device ( high prority ) send data, but master
* device(low prority) become arbitraion fail status.
*
* @see MES_I2C_SetAckGenerationEnable, MES_I2C_GetAckGenerationEnable,
* MES_I2C_ClearOperationHold, MES_I2C_ControlMode,
* MES_I2C_WriteByte, MES_I2C_ReadByte,
* MES_I2C_IsBusy
*/
void MES_I2C_BusDisable( U32 ModuleIndex )
{
const U32 TXRX_ENB_MASK = ( 0x01 << 4 );
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
__g_ModuleVariables[ModuleIndex].pRegister->ICSR &= ~TXRX_ENB_MASK;
}
S32 MES_I2C_GetInterruptNumber( U32 ModuleIndex )
{
const U32 I2CInterruptNumber[NUMBER_OF_I2C_MODULE] = { INTNUM_OF_I2C0_MODULE, INTNUM_OF_I2C1_MODULE };
MES_ASSERT( NUMBER_OF_I2C_MODULE > ModuleIndex );
return I2CInterruptNumber[ModuleIndex];
}
/**
* @brief Check Prescaler is enabled or disabled
* @return \b CTRUE indicate that Prescaler is Enabled.\n
* \b CFALSE indicate that Prescaler is Disabled.
* @see MES_ADC_SetPrescalerValue, MES_ADC_GetPrescalerValue,
* MES_ADC_SetPrescalerEnable,
* MES_ADC_SetInputChannel, MES_ADC_GetInputChannel,
* MES_ADC_SetStandbyMode, MES_ADC_GetStandbyMode,
* MES_ADC_Start, MES_ADC_IsBusy,
* MES_ADC_GetConvertedData
*/
CBOOL MES_ADC_GetPrescalerEnable( void )
{
const U32 APEN_POS = 14;
MES_ASSERT( CNULL != __g_pRegister );
return (CBOOL)( ( __g_pRegister->ADCCON >> APEN_POS ) & 0x01 );
}
/**
* @brief Check Bus Arbitration status
* @return \b CTRUE Indicate that Bus Arbitration Failed. \n
* \b CFALSE Indicate that Bus Arbitration is Not Failed.
* @remarks Interrupt is Occured when Extend IRQ Enable and Bus arbitration is failed.
* @see MES_I2C_IsSlaveAddressMatch, MES_I2C_ClearSlaveAddressMatch,
* MES_I2C_IsGeneralCall, MES_I2C_ClearGeneralCall,
* MES_I2C_IsSlaveRxStop, MES_I2C_ClearSlaveRxStop,
* MES_I2C_IsACKReceived
*/
CBOOL MES_I2C_IsBusArbitFail( U32 ModuleIndex )
{
const U32 ARBIT_FAIL_POS = 3;
const U32 ARBIT_FAIL_MASK = 1UL << ARBIT_FAIL_POS;
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
return (CBOOL)( (__g_ModuleVariables[ModuleIndex].pRegister->ICSR & ARBIT_FAIL_MASK) >> ARBIT_FAIL_POS );
}
/**
* @brief Check ACK Status
* @return \b CTRUE Indicate that ACK Received.\n
* \b CFALSE Indicate that ACK \b NOT received.
* @remarks Interrupt is Occured when Extend IRQ Enable and NAck Received.\n
* @see MES_I2C_IsSlaveAddressMatch, MES_I2C_ClearSlaveAddressMatch,
* MES_I2C_IsGeneralCall, MES_I2C_ClearGeneralCall,
* MES_I2C_IsSlaveRxStop, MES_I2C_ClearSlaveRxStop,
* MES_I2C_IsBusArbitFail
*/
CBOOL MES_I2C_IsACKReceived( U32 ModuleIndex )
{
const U32 ACK_STATUS_POS = 0;
const U32 ACK_STATUS_MASK = 1UL << ACK_STATUS_POS;
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
return (CBOOL)(((__g_ModuleVariables[ModuleIndex].pRegister->ICSR & ACK_STATUS_MASK) >> ACK_STATUS_POS ) ^ 1); // 0 : CTRUE, 1 : CFALSE
}
/**
* @brief Indicates whether the selected modules is busy or not.
* @return \b CTRUE indicate that Module is Busy. \n
* \b CFALSE indicate that Module is NOT Busy.
* @see MES_ADC_GetPhysicalAddress, MES_ADC_GetSizeOfRegisterSet,
* MES_ADC_SetBaseAddress, MES_ADC_GetBaseAddress,
* MES_ADC_OpenModule, MES_ADC_CloseModule,
* MES_ADC_CanPowerDown
*/
CBOOL MES_ADC_CheckBusy( void )
{
const U32 ADEN_BITPOS = 0;
MES_ASSERT( CNULL != __g_pRegister );
return (CBOOL)((__g_pRegister->ADCCON >> ADEN_BITPOS) & 0x01 );
}
/**
* @brief Check state of slave address is matched or NOT.
* @return \b CTRUE Indicate that Slave address is matched. \n
* \b CFALSE Indicate that Slave address is NOT matched.
* @remarks Interrupt is occurred when slave address is matched. \n
* @see MES_I2C_ClearSlaveAddressMatch,
* MES_I2C_IsGeneralCall, MES_I2C_ClearGeneralCall,
* MES_I2C_IsSlaveRxStop, MES_I2C_ClearSlaveRxStop,
* MES_I2C_IsBusArbitFail, MES_I2C_IsACKReceived
*/
CBOOL MES_I2C_IsSlaveAddressMatch( U32 ModuleIndex )
{
const U32 SLAVE_MATCH_OCCUR_POS = 10;
const U32 SLAVE_MATCH_OCCUR_MASK = 1UL << SLAVE_MATCH_OCCUR_POS;
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
return (CBOOL)( (__g_ModuleVariables[ModuleIndex].pRegister->ICSR & SLAVE_MATCH_OCCUR_MASK) >> SLAVE_MATCH_OCCUR_POS );
}
/**
* @brief Check state of slave RX is stopped or NOT.
* @return \b CTRUE Indicate that Slave RX is stopped. \n
* \b CFALSE Indicate that Slave RX is NOT stopped.
* @remarks Interrupt is occurred when slave RX is stopped.\n
* @see MES_I2C_IsSlaveAddressMatch, MES_I2C_ClearSlaveAddressMatch,
* MES_I2C_IsGeneralCall, MES_I2C_ClearGeneralCall,
* MES_I2C_ClearSlaveRxStop,
* MES_I2C_IsBusArbitFail, MES_I2C_IsACKReceived
*/
CBOOL MES_I2C_IsSlaveRxStop( U32 ModuleIndex )
{
const U32 SLV_RX_STOP_POS = 8;
const U32 SLV_RX_STOP_MASK = 1UL << SLV_RX_STOP_POS;
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
return (CBOOL)( (__g_ModuleVariables[ModuleIndex].pRegister->ICSR & SLV_RX_STOP_MASK) >> SLV_RX_STOP_POS );
}
/**
* @brief Get Input Channel
* @return Value of Input Channel ( 0 ~ 7 )
* @see MES_ADC_SetPrescalerValue, MES_ADC_GetPrescalerValue,
* MES_ADC_SetPrescalerEnable, MES_ADC_GetPrescalerEnable,
* MES_ADC_SetInputChannel,
* MES_ADC_SetStandbyMode, MES_ADC_GetStandbyMode,
* MES_ADC_Start, MES_ADC_IsBusy,
* MES_ADC_GetConvertedData
*/
U32 MES_ADC_GetInputChannel( void )
{
const U32 ASEL_MASK = ( 0x07 << 3 );
const U32 ASEL_BITPOS = 3;
MES_ASSERT( CNULL != __g_pRegister );
return (U32)( ( __g_pRegister->ADCCON & ASEL_MASK ) >> ASEL_BITPOS );
}
/**
* @brief Get Prescaler Value of A/D Converter
* @return Value of Prescaler
* @see MES_ADC_SetPrescalerValue,
* MES_ADC_SetPrescalerEnable, MES_ADC_GetPrescalerEnable,
* MES_ADC_SetInputChannel, MES_ADC_GetInputChannel,
* MES_ADC_SetStandbyMode, MES_ADC_GetStandbyMode,
* MES_ADC_Start, MES_ADC_IsBusy,
* MES_ADC_GetConvertedData
*/
U32 MES_ADC_GetPrescalerValue( void )
{
const U32 APSV_MASK = ( 0xFF << 6 );
const U32 APSV_BITPOS = 6;
MES_ASSERT( CNULL != __g_pRegister );
return (U32)((( __g_pRegister->ADCCON & APSV_MASK ) >> APSV_BITPOS ) + 1 ) ;
}
/**
* @brief Get Setting Value of Ack Generation
* @return \b CTRUE Indicate that Ack Generation Enabled. \n
* \b CFALSE Indicate that Ack Generation Disabled.
* @see MES_I2C_SetAckGenerationEnable,
* MES_I2C_ClearOperationHold, MES_I2C_ControlMode,
* MES_I2C_WriteByte, MES_I2C_ReadByte,
* MES_I2C_IsBusy,
* MES_I2C_BusDisable
*/
CBOOL MES_I2C_GetAckGenerationEnable( U32 ModuleIndex )
{
const U32 ACK_GEN_POS = 7;
const U32 ACK_GEN_MASK = 1UL << ACK_GEN_POS;
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
return (CBOOL)( (__g_ModuleVariables[ModuleIndex].pRegister->ICCR & ACK_GEN_MASK) >> ACK_GEN_POS );
}
/**
* @brief Set Input Channel
* @param[in] channel Value of Input Channel ( 0 ~ 7 )
* @return None.
* @see MES_ADC_SetPrescalerValue, MES_ADC_GetPrescalerValue,
* MES_ADC_SetPrescalerEnable, MES_ADC_GetPrescalerEnable,
* MES_ADC_GetInputChannel,
* MES_ADC_SetStandbyMode, MES_ADC_GetStandbyMode,
* MES_ADC_Start, MES_ADC_IsBusy,
* MES_ADC_GetConvertedData
*/
void MES_ADC_SetInputChannel( U32 channel )
{
const U32 ASEL_MASK = ( 0x07 << 3 );
const U32 ASEL_BITPOS = 3;
register struct MES_ADC_RegisterSet* pRegister;
register U32 regvalue;
MES_ASSERT( CNULL != __g_pRegister );
MES_ASSERT( 8 > channel );
pRegister = __g_pRegister;
regvalue = pRegister->ADCCON;
regvalue = ( regvalue & ~ASEL_MASK ) | ( channel << ASEL_BITPOS );
pRegister->ADCCON = (U16)regvalue;
}
/**
* @brief Clear Operation Hold.
* @return None.
* @remarks I2C module's operation will be hold after transmiting or
* receiving a byte. Therefore you have to clear hold status to continue
* next progress.\n
* Also, user must clear hold status after module's start/stop setting.
* @see MES_I2C_SetAckGenerationEnable, MES_I2C_GetAckGenerationEnable,
* MES_I2C_ControlMode,
* MES_I2C_WriteByte, MES_I2C_ReadByte,
* MES_I2C_IsBusy,
* MES_I2C_BusDisable
*/
void MES_I2C_ClearOperationHold ( U32 ModuleIndex )
{
const U32 OP_HOLD_MASK = ( 0x01 << 1 ) ;
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
__g_ModuleVariables[ModuleIndex].pRegister->PEND = (U16)OP_HOLD_MASK;
}
/**
* @brief Check I2C's status
* @return \b CTRUE Indicate that I2C is Busy.\n
* \b CFALSE Indicate that I2C is Not Busy.
* @see MES_I2C_SetAckGenerationEnable, MES_I2C_GetAckGenerationEnable,
* MES_I2C_ClearOperationHold, MES_I2C_ControlMode,
* MES_I2C_WriteByte, MES_I2C_ReadByte,
* MES_I2C_BusDisable
*/
CBOOL MES_I2C_IsBusy( U32 ModuleIndex )
{
const U32 ST_BUSY_POS = 5;
const U32 ST_BUSY_MASK = 1UL << ST_BUSY_POS;
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
return (CBOOL)( (__g_ModuleVariables[ModuleIndex].pRegister->ICSR & ST_BUSY_MASK) >> ST_BUSY_POS );
}
/**
* @brief Check state of General call is occurred or NOT.
* @return \b CTRUE Indicate that General call is occurred. \n
* \b CFALSE Indicate that General call is NOT occurred.
* @remarks Interrupt is occurred when general call is occurred.\n
* General call means that master device send a command to all slave device( broadcasting ).
* @see MES_I2C_IsSlaveAddressMatch, MES_I2C_ClearSlaveAddressMatch,
* MES_I2C_ClearGeneralCall,
* MES_I2C_IsSlaveRxStop, MES_I2C_ClearSlaveRxStop,
* MES_I2C_IsBusArbitFail, MES_I2C_IsACKReceived
*/
CBOOL MES_I2C_IsGeneralCall( U32 ModuleIndex )
{
const U32 GENERAL_CALL_OCCUR_POS = 9;
const U32 GENERAL_CALL_OCCUR_MASK = 1UL << GENERAL_CALL_OCCUR_POS;
MES_ASSERT( CNULL != __g_ModuleVariables[ModuleIndex].pRegister );
return (CBOOL)( (__g_ModuleVariables[ModuleIndex].pRegister->ICSR & GENERAL_CALL_OCCUR_MASK) >> GENERAL_CALL_OCCUR_POS );
}
