void mfp_config(unsigned long *mfp_cfgs, int num)
{
unsigned long flags;
int i, drv_b11 = 0, no_lpm = 0;
#ifdef CONFIG_ARCH_MMP
if (cpu_is_pxa910() || cpu_is_pxa988() || cpu_is_pxa986() ||
cpu_is_mmp2() || cpu_is_mmp3() || cpu_is_pxa1088())
drv_b11 = 1;
if (cpu_is_pxa168() || cpu_is_pxa910())
no_lpm = 1;
#elif defined(CONFIG_ARCH_PXA)
if (cpu_is_pxa95x())
drv_b11 = 1;
#endif
spin_lock_irqsave(&mfp_spin_lock, flags);
for (i = 0; i < num; i++, mfp_cfgs++) {
unsigned long tmp, c = *mfp_cfgs;
struct mfp_pin *p;
int pin, af, drv, lpm, edge, pull;
pin = MFP_PIN(c);
BUG_ON(pin >= MFP_PIN_MAX);
p = &mfp_table[pin];
af = MFP_AF(c);
drv = MFP_DS(c);
lpm = MFP_LPM_STATE(c);
edge = MFP_LPM_EDGE(c);
pull = MFP_PULL(c);
if (drv_b11)
drv = drv << 1;
if (no_lpm)
lpm = 0;
tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
tmp |= mfpr_pull[pull] | mfpr_lpm[lpm] | mfpr_edge[edge];
p->mfpr_run = tmp;
p->mfpr_lpm = p->mfpr_run;
p->config = c; __mfp_config_run(p);
}
mfpr_sync();
spin_unlock_irqrestore(&mfp_spin_lock, flags);
}
void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num)
{
unsigned long flags;
int i;
spin_lock_irqsave(&mfp_spin_lock, flags);
for (i = 0; i < num; i++, mfp_cfgs++) {
unsigned long tmp, c = *mfp_cfgs;
struct pxa3xx_mfp_pin *p;
int pin, af, drv, lpm, edge, pull;
pin = MFP_PIN(c);
BUG_ON(pin >= MFP_PIN_MAX);
p = &mfp_table[pin];
af = MFP_AF(c);
drv = MFP_DS(c);
lpm = MFP_LPM_STATE(c);
edge = MFP_LPM_EDGE(c);
pull = MFP_PULL(c);
/* run-mode pull settings will conflict with MFPR bits of
* low power mode state, calculate mfpr_run and mfpr_lpm
* individually if pull != MFP_PULL_NONE
*/
tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
if (likely(pull == MFP_PULL_NONE)) {
p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
p->mfpr_lpm = p->mfpr_run;
} else {
p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
p->mfpr_run = tmp | mfpr_pull[pull];
}
p->config = c;
__mfp_config_run(p);
}
mfpr_sync();
spin_unlock_irqrestore(&mfp_spin_lock, flags);
}
