static void updn_converter_lo_freq_changed_cb(GtkSpinButton *button, int data)
{
struct iio_channel *ad9361_ch, *updn_ch;
double target_freq, ad9361_lo, updn_pll, center_freq;
int ret;
if (data == UPDN_RX) {
ad9361_ch = iio_device_find_channel(dev, "altvoltage0", true);
updn_ch = iio_device_find_channel(udc_rx, "altvoltage0", true);
center_freq = RX_CENTER_FREQ;
} else if (data == UPDN_TX) {
ad9361_ch = iio_device_find_channel(dev, "altvoltage1", true);
updn_ch = iio_device_find_channel(udc_tx, "altvoltage0", true);
center_freq = TX_CENTER_FREQ;
} else {
return;
}
target_freq = gtk_spin_button_get_value(button);
split_target_lo_freq(target_freq, &updn_pll, &ad9361_lo, updn_freq_span, center_freq);
ret = iio_channel_attr_write_longlong(ad9361_ch, freq_name, (long long)MHZ_TO_HZ(ad9361_lo));
if (ret < 0)
fprintf(stderr,"Write to %s attribute of %s device: %s\n",
freq_name, PHY_DEVICE, strerror(-ret));
ret = iio_channel_attr_write_longlong(updn_ch, "frequency", (long long)MHZ_TO_HZ(updn_pll));
if (ret < 0)
fprintf(stderr,"Write to %s attribute of %s device: %s\n",
"frequency", (UPDN_TX) ? UDC_TX_DEVICE : UDC_RX_DEVICE, strerror(-ret));
rx_freq_info_update();
}
/*
* The retrieval of the clock time and the TSC are not atomic, there
* may be time unaccounted for.
*
* Could profile the RDTSC call at startup and use that measurement to
* determine lost time...I'm not kidding, this comes from an Intel
* guide about benchmarking and TSC.
*
* Now, if the clock time is stored somewhere whenever the TSC is
* reset then I could use that value as the base and it would be
* accurate, but for now use this hack.
*/
static void
_init_fasttime()
{
(void) check_tsc();
if ((_sys_clock_gettime = dlsym(RTLD_NEXT, "clock_gettime")) == NULL) {
perror("failed to load system clock_gettime()");
exit(1);
}
if ((_sys_gettimeofday = dlsym(RTLD_NEXT, "gettimeofday")) == NULL) {
perror("failed to load system gettimeofday()");
exit(1);
}
/*
* The approximate value of the kernel's cpu_freq_hz.
* Approximate because the kernel uses emperical readings of
* the TSC against PIT timeouts to determine the clock
* frequency. The pi_clock value should be based on this value
* but some of the precision is lost, not sure if that
* matters much in practice.
*/
approx_cpu_hz = MHZ_TO_HZ(get_cpu_mhz());
nsec_scale =
(uint64_t)(((uint64_t)NANOSEC << (32 - NSEC_SHIFT)) / approx_cpu_hz);
sync_local_clock();
}
static int nvhost_scale3d_target(struct device *d, unsigned long *freq,
u32 flags)
{
long hz;
long after;
/* Inform that the clock is disabled */
if (!tegra_is_clk_enabled(power_profile.clk_3d)) {
*freq = 0;
return 0;
}
/* Limit the frequency */
if (*freq < power_profile.min_rate_3d)
*freq = power_profile.min_rate_3d;
else if (*freq > power_profile.max_rate_3d)
*freq = power_profile.max_rate_3d;
/* Check if we're already running at the desired speed */
if (*freq == clk_get_rate(power_profile.clk_3d))
return 0;
/* Set GPU clockrate */
if (tegra_get_chipid() == TEGRA_CHIPID_TEGRA3)
nvhost_module_set_devfreq_rate(power_profile.dev,
clk_to_idx(power_profile.clk_3d2), 0);
nvhost_module_set_devfreq_rate(power_profile.dev,
clk_to_idx(power_profile.clk_3d), *freq);
/* Set EMC clockrate */
after = (long) clk_get_rate(power_profile.clk_3d);
after = INT_TO_FX(HZ_TO_MHZ(after));
hz = FXMUL(after, power_profile.emc_slope) +
power_profile.emc_offset;
hz -= FXMUL(power_profile.emc_dip_slope,
FXMUL(after - power_profile.emc_xmid,
after - power_profile.emc_xmid)) +
power_profile.emc_dip_offset;
hz = MHZ_TO_HZ(FX_TO_INT(hz + FX_HALF)); /* round to nearest */
hz = (hz < 0) ? 0 : hz;
nvhost_module_set_devfreq_rate(power_profile.dev,
clk_to_idx(power_profile.clk_3d_emc), hz);
/* Get the new clockrate */
*freq = clk_get_rate(power_profile.clk_3d);
return 0;
}
long nvhost_scale_emc_get_emc_rate(struct nvhost_emc_params *emc_params,
long freq)
{
long hz;
freq = INT_TO_FX(HZ_TO_MHZ(freq));
hz = FXMUL(freq, emc_params->emc_slope) + emc_params->emc_offset;
if (!emc_params->linear)
hz -= FXMUL(emc_params->emc_dip_slope,
FXMUL(freq - emc_params->emc_xmid,
freq - emc_params->emc_xmid)) +
emc_params->emc_dip_offset;
hz = MHZ_TO_HZ(FX_TO_INT(hz + FX_HALF)); /* round to nearest */
hz = (hz < 0) ? 0 : hz;
return hz;
}
