/*
** Function to setup MMU. This function Maps three regions (1. DDR
** 2. OCMC and 3. Device memory) and enables MMU.
*/
void MMUConfigAndEnable(void)
{
/*
** Define DDR memory region of AM335x. DDR can be configured as Normal
** memory with R/W access in user/privileged modes. The cache attributes
** specified here are,
** Inner - Write through, No Write Allocate
** Outer - Write Back, Write Allocate
*/
REGION regionDdr = {
MMU_PGTYPE_SECTION, START_ADDR_DDR, NUM_SECTIONS_DDR,
MMU_MEMTYPE_NORMAL_NON_SHAREABLE(MMU_CACHE_WT_NOWA,
MMU_CACHE_WB_WA),
MMU_REGION_NON_SECURE, MMU_AP_PRV_RW_USR_RW,
(unsigned int*)pageTable
};
/*
** Define OCMC RAM region of AM335x. Same Attributes of DDR region given.
*/
REGION regionOcmc = {
MMU_PGTYPE_SECTION, START_ADDR_OCMC, NUM_SECTIONS_OCMC,
MMU_MEMTYPE_NORMAL_NON_SHAREABLE(MMU_CACHE_WT_NOWA,
MMU_CACHE_WB_WA),
MMU_REGION_NON_SECURE, MMU_AP_PRV_RW_USR_RW,
(unsigned int*)pageTable
};
/*
** Define Device Memory Region. The region between OCMC and DDR is
** configured as device memory, with R/W access in user/privileged modes.
** Also, the region is marked 'Execute Never'.
*/
REGION regionDev = {
MMU_PGTYPE_SECTION, START_ADDR_DEV, NUM_SECTIONS_DEV,
MMU_MEMTYPE_DEVICE_SHAREABLE,
MMU_REGION_NON_SECURE,
MMU_AP_PRV_RW_USR_RW | MMU_SECTION_EXEC_NEVER,
(unsigned int*)pageTable
};
/* Initialize the page table and MMU */
MMUInit((unsigned int*)pageTable);
/* Map the defined regions */
MMUMemRegionMap(®ionDdr);
MMUMemRegionMap(®ionOcmc);
MMUMemRegionMap(®ionDev);
/* Now Safe to enable MMU */
MMUEnable((unsigned int*)pageTable);
}
/*
*==============================================================================================
* 函数名称：TargetInit
* 功能描述：初始化目标板，完成以下功能：
* 1. 时钟初始化
* 2. mmu初始化
* 3. 串口初始化
* 4. 串口初始化
* 传 参：void
* 返 回 值：void
*==============================================================================================
*/
void
TargetInit( void )
{
U32 i;
U8 key;
U32 mpllVal = 0;
i = 2; /* 使用400MHz主频 */
switch ( i )
{
case 0: /* 200MHz */
key = 12;
mpllVal = (92 << 12) | (4 << 4) | (1);
break;
case 1: /* 300MHz */
key = 14;
mpllVal = (67 << 12) | (1 << 4) | (1);
break;
case 2: /* 400MHz */
key = 14;
mpllVal = (92 << 12) | (1 << 4) | (1);
break;
case 3: /* 440MHz */
key = 14;
mpllVal = (102 << 12) | (1 << 4) | (1);
break;
default: /* 默认使用400MHz */
key = 14;
mpllVal = (92 << 12) | (1 << 4) | (1);
break;
}
ChangeMPLLValue( (mpllVal >> 12) & 0xff, (mpllVal >> 4) & 0x3f, mpllVal & 3 ); /* 时钟初始化 */
ChangeClockDivider( key, 12 );
MMUDisableICache( );
MMUDisableDCache( );
MMUInit( ); /* MMU初始化 */
PortInit( ); /* 端口初始化 */
UartSelect( 0 ); /* 串口选择 */
UartInit( 0, 115200 ); /* 串口初始化 */
}