C++ (Cpp) MVN Beispiele

Programmiersprache: C++ (Cpp)

Methode / Funktion: MVN

Beispiele auf hotexamples.com: 6

C++ (Cpp) MVN - 6 Beispiele gefunden. Dies sind die am besten bewerteten C++ (Cpp) Beispiele für die MVN, die aus Open Source-Projekten extrahiert wurden. Sie können Beispiele bewerten, um die Qualität der Beispiele zu verbessern.

Beispiel #1

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void GGLAssembler::component_sat(const component_t& v)
{
    const int one = ((1<<v.size())-1)<<v.l;
    CMP(AL, v.reg, imm( 1<<v.h ));
    if (isValidImmediate(one)) {
        MOV(HS, 0, v.reg, imm( one ));
    } else if (isValidImmediate(~one)) {
        MVN(HS, 0, v.reg, imm( ~one ));
    } else {
        MOV(HS, 0, v.reg, imm( 1<<v.h ));
        SUB(HS, 0, v.reg, v.reg, imm( 1<<v.l ));
    }
}

Beispiel #2

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/** 
 * Convert wave data to MFCC.  Also does spectral subtraction
 * if @a ssbuf specified.
 * 
 * @param wave [in] waveform data
 * @param mfcc [out] buffer to store the resulting MFCC parameter vector [t][0..veclen-1], should be already allocated
 * @param para [in] configuration parameters
 * @param nSamples [in] length of waveform data
 * @param w [i/o] MFCC calculation work area
 * 
 * @return the number of processed frames.
 */
int
Wav2MFCC(SP16 *wave, float **mfcc, Value *para, int nSamples, MFCCWork *w, CMNWork *c)
{
  int i, k, t;
  int end = 0, start = 1;
  int frame_num;                    /* Number of samples in output file */

  /* set noise spectrum if any */
  if (w->ssbuf != NULL) {
    /* check ssbuf length */
    if (w->ssbuflen != w->bflen) {
      jlog("Error: mfcc-core: noise spectrum length not match\n");
      return FALSE;
    }
  }

  frame_num = (int)((nSamples - para->framesize) / para->frameshift) + 1;
  
  for(t = 0; t < frame_num; t++){
    if(end != 0) start = end - (para->framesize - para->frameshift) - 1;

    k = 1;
    for(i = start; i <= start + para->framesize; i++){
      w->bf[k] = (float)wave[i - 1];  k++;
    }
    end = i;
    
    /* Calculate base MFCC coefficients */
    WMP_calc(w, mfcc[t], para);
  }
  
  /* Normalise Log Energy */
  if (para->energy && para->enormal) NormaliseLogE(mfcc, frame_num, para);
  
  /* Delta (consider energy suppress) */
  if (para->delta) Delta(mfcc, frame_num, para);

  /* Acceleration */
  if (para->acc) Accel(mfcc, frame_num, para);

  /* Cepstrum Mean and/or Variance Normalization */
  if (para->cmn && ! para->cvn) CMN(mfcc, frame_num, para->mfcc_dim + (para->c0 ? 1 : 0), c);
  else if (para->cmn || para->cvn) MVN(mfcc, frame_num, para, c);

  return(frame_num);
}

Beispiel #3

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Datei: test.c Projekt: andresbmth/Trabajo_1_Micros

int main()
{
	int op;
	uint32_t registro[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
	char banderas[4];
	do{
		system("cls");
		printf("seleccione la opcion 1 para mostrar los valores de los registros\n");
		printf("seleccione la opcion 2 para sumar registros \n");
		printf("seleccione la opcion 3 para multiplicacion logica (AND) de registros \n");
		printf("seleccione la opcion 4 para Eor a nivel de bits \n");
		printf("seleccione la opcion 5 para desplazar de un registro a otro \n");
		printf("seleccione la opcion 6 para suma logica (OR) de registro\n");
		printf("seleccione la opcion 7 para ADN sin almacenar, solo modifica banderas \n");
		printf("seleccione la opcion 8 para comparar (SUB sin almacenar), solo modifica banderas\n");
		printf("seleccione la opcion 9 Multiplicacion de registros, solo se alacenan 32 bits menos significativos\n");
		printf("seleccione la opcion 10 AND sin almacenacmiento, solo modifica banderas\n");
		printf("seleccione la opcion 11 para  LSL desplazamiento logico a la izquierda \n");
		printf("seleccione la opcion 12 para  LSR desplazamiento logico a la derecha \n");
		printf("seleccione la opcion 13 para  ROR rotacion a la derecha \n");
		printf("seleccione la opcion 14 para  ASR desplazamiento aritmetico a la derecha \n");
		printf("seleccione la opcion 15 para  BIC Realiza una AND de un registro con otro negado \n");
		printf("seleccione la opcion 16 para  MUN guarda en un registro la negacion de otro\n");
		printf("seleccione la opcion 17 para  RSB niega un valor de registro\n");
		printf("seleccione la opcion 18 para  NOP da un retardo de un ciclo de reloj (no hace nada) \n");
		printf("seleccione la opcion 19 para  REV toma grupos de 8 bits y los desplaza \n");
		printf("seleccione la opcion 20 para  REVIG toma grupos de 16 bits y los agrupa en grupos de dos bytes\n");
		printf("seleccione la opcion 21 para  REVSH extencion con signo\n\n");
		
		scanf("%d",&op);
		
		system("cls");
		switch(op){		

			case 1:			
				//mostrar_valores(registro);			
			break;
			
			case 2:			
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese el valor del segundo registro:\n");
				scanf("%d",&registro[2]);
				
				ADD(registro,&registro[0],registro[1],registro[2],&banderas[0]);
				
				printf("%d valor del resultado \n",registro[0]);
				printf("%d valor del resultado bandera n \n",banderas[N]);
				printf("%d valor del resultado bandera z \n",banderas[Z]);
				printf("%d valor del resultado bandera c \n",banderas[C]);
				printf("%d valor del resultado bandera v \n",banderas[V]);
			break;
			
			case 3:				
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese el valor del segundo registro:\n");
				scanf("%d",&registro[2]);
					
				AND(registro,&registro[0],registro[1],registro[2],&banderas[0]);
				
				printf("%d valor del resultado \n",registro[0]);
				printf("%d valor del resultado bandera n \n",banderas[N]);
				printf("%d valor del resultado bandera z \n",banderas[Z]);
				printf("%d valor del resultado bandera c \n",banderas[C]);
				printf("%d valor del resultado bandera v \n",banderas[V]);
			break;
			
			case 4:
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese el valor del segundo registro:\n");
				scanf("%d",&registro[2]);
				
				EOR(registro,&registro[0],registro[1],registro[2],&banderas[0]);
				
				printf("%d valor del resultado \n",registro[0]);
				printf("%d valor del resultado bandera n \n",banderas[N]);
				printf("%d valor del resultado bandera z \n",banderas[Z]);
				printf("%d valor del resultado bandera c \n",banderas[C]);
				printf("%d valor del resultado bandera v \n",banderas[V]);
			break;
			
			case 5:
				printf("ingrese el valor del registro origen:\n");
				scanf("%d",&registro[1]);
				
				MOV(registro,&registro[0],registro[1],banderas);
				
				printf("%d valor del resultado \n",registro[0]);
			break;
			
			case 7:
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese el valor del segundo registro:\n");
				scanf("%d",&registro[2]);
				
				CMN(registro,registro[1],registro[2],&banderas[0]);
				
				printf("%d valor del resultado \n",registro[0]);
				printf("%d valor del resultado bandera n \n",banderas[N]);
				printf("%d valor del resultado bandera z \n",banderas[Z]);
				printf("%d valor del resultado bandera c \n",banderas[C]);
				printf("%d valor del resultado bandera v \n",banderas[V]);
			break;
			
			case 8:
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese el valor del segundo registro:\n");
				scanf("%d",&registro[2]);
				
				CMP(registro,registro[1],registro[2],&banderas[0]);
				
				printf("%d valor del resultado \n",registro[0]);
				printf("%d valor del resultado bandera n \n",banderas[N]);
				printf("%d valor del resultado bandera z \n",banderas[Z]);
				printf("%d valor del resultado bandera c \n",banderas[C]);
				printf("%d valor del resultado bandera v \n",banderas[V]);
			break;
			
			case 9:			
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese el valor del segundo registro:\n");
				scanf("%d",&registro[2]);
				
				MUL(registro,&registro[0],registro[1],registro[2],&banderas[0]);
				
				printf("%d valor del resultado \n",registro[0]);
				printf("%d valor del resultado bandera n \n",banderas[N]);
				printf("%d valor del resultado bandera z \n",banderas[Z]);
				printf("%d valor del resultado bandera c \n",banderas[C]);
				printf("%d valor del resultado bandera v \n",banderas[V]);
			break;
			
			case 10:			
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese el valor del segundo registro:\n");
				scanf("%d",&registro[2]);
				
				TST(registro,registro[1],registro[2],&banderas[0]);
				
				printf("%d valor del resultado \n",registro[0]);
				printf("%d valor del resultado bandera n \n",banderas[N]);
				printf("%d valor del resultado bandera z \n",banderas[Z]);
				printf("%d valor del resultado bandera c \n",banderas[C]);
				printf("%d valor del resultado bandera v \n",banderas[V]);
			break;
			
			case 11:			
				printf("ingrese el valor del registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese el numero de desplazamientos:\n");
				scanf("%d",&registro[2]);
				
				LSL(registro,&registro[0],registro[1],registro[2],banderas);
				
				printf("%d valor del resultado \n",registro[0]);
			break;
			
			case 12:
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese elnumero de desplazamientos:\n");
				scanf("%d",&registro[2]);
				
				LSR(registro,&registro[0],registro[1],registro[2],banderas);
				
				printf("%d valor del resultado \n",registro[0]);
			break;			
			
			case 13:			
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese elnumero de desplazamientos:\n");
				scanf("%d",&registro[2]);
				
				ROR(registro,&registro[0],registro[1],registro[2],banderas);
				
				printf("%d valor del resultado \n",registro[0]);
			break;
			
			case 14:			
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[1]);
				printf("ingrese elnumero de desplazamientos:\n");
				scanf("%d",&registro[2]);
				
				ASR(registro,&registro[0],registro[1],registro[2],banderas);
				
				printf("%d valor del resultado \n",registro[0]);
			break;

			case 15:			
				printf("ingrese el valor del primer registro:\n");
				scanf("%d",&registro[0]);
				printf("ingrese el valor del segundo registro:\n");
				scanf("%d",&registro[1]);
				
				BIC(registro,&registro[0],registro[1],banderas);
				
				printf("%d valor del resultado \n",registro[0]);
			break;
			
			case 16:			
				printf("ingrese un valor del registro origen\n");
				scanf("%d",&registro[1]);
				
				MVN(registro,&registro[0],registro[1],banderas);
				
				printf("%d valor del resultado \n",registro[0]);
			break;
			
			case 17:			
				printf("ingrese un valor de registro\n");
				scanf("%d",&registro[1]);	
				
				RSB(registro,&registro[0],registro[1],0,banderas);
				
				printf("%d valor del resultado \n",registro[0]);
			break;
			
			case 18:			
				NOP(registro);
			break;
			
			case 19:			
				printf("ingrese un valor de registro \n");
				scanf("%d",&registro[0]);
				
				REV(registro,&registro[0]);
				
				printf("%d valor del resultado \n",registro[0]);
			break;
			
			case 20:			
				printf("ingrese un valor de registro \n");
				scanf("%d",&registro[0]);
				
				REVIG(registro,&registro[0]);
				
				printf("%d valor del resultado \n",registro[0]);
			break;
			
			case 21:			
				printf("ingrese un valor de registro \n");
				scanf("%d",&registro[0]);
				
				REVSH(registro,&registro[0]);
				
				printf("%d valor del resultado \n",registro[0]);
			break;	
			
			default:
				printf("Opcion invalida\n\n");
			break;
		}
		printf("\nDesea realizar otra operacion?\n<1>-si\n<0>-no\n");
		scanf("%d",&op);
		system("cls");
		}while(op);
		return 0;
}

Beispiel #4

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Datei: decoder.c Projekt: Luisa95/Proyecto1

/*
typedef struct
{
	char mnemonic[10];
	char op1_type; // reconoce una r o un numeral
	char op2_type;
	char op3_type;
	uint32_t op1_value; guarda el numero del registro o el valor del inmediato
	uint32_t op2_value;
	uint32_t op3_value;
}instruction_t;
*/
void decodeInstruction(instruction_t instruction,uint32_t* Rd, uint32_t* Rm, uint32_t* Rr, bool flg[], int*pc, uint8_t pila)// recibe el retorno de getInstruccion
{    uint32_t cero=0;

	if( strcmp(instruction.mnemonic,"PUSH") == 0 )
        {

	    } else

	if( strcmp(instruction.mnemonic,"ADD") == 0)
        {
           if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
           ADD(Rd[instruction.op1_value],Rm[instruction.op2_value],Rr[instruction.op3_value],flg,&pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
           ADD(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&instruction.op3_value,flg, &pc);
        }else

	    if( strcmp(instruction.mnemonic,"AND") == 0)
        {
        if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
           AND(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
           AND(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);
	    } else
	 if( strcmp(instruction.mnemonic,"ASRS") == 0 )
        {
		if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
		{
           ASRS(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='#'))
           ASRS(&Rd[instruction.op1_value],instruction.op2_value, &pc);
        } else
     if( strcmp(instruction.mnemonic,"BIC") == 0 )
        {
		if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
		{
           BIC(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='#'))
           BIC(&Rd[instruction.op1_value],instruction.op2_value, &pc);
        } else
	 if( strcmp(instruction.mnemonic,"CMN") == 0)
        {
		if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
        CMN(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value], &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
        CMN(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value, &pc);
        } else
	 if( strcmp(instruction.mnemonic,"CMP") == 0 )
        {
		if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
        CMP(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value], &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
        CMP(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value, &pc);
		} else
	 if( strcmp(instruction.mnemonic,"EOR") == 0)
        {if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
           EOR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
           EOR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);
		} else
	 if( strcmp(instruction.mnemonic,"LSL") == 0 )
        {if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
         LSL(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value, &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
         LSL(&Rd[instruction.op1_value],&Rm[instruction.op2_value],cero, &pc);

	    } else
     if( strcmp(instruction.mnemonic,"LSR") == 0)
        {
        {if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
         LSR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],cero, &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
         LSR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value, &pc);
        }
        } else
	 if( strcmp(instruction.mnemonic,"MOV") == 0)
        {
          if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
		{
         MOV(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&flg[0], &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='#'))
         MOV(&Rd[instruction.op1_value],instruction.op2_value,&flg[0], &pc);
	    } else
	 if( strcmp(instruction.mnemonic,"MUL") == 0)
        {

        if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
           MUL(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
           MUL(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);

	    } else
     if(strcmp(instruction.mnemonic,"MVN") == 0)
        {
        if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
		{
         MVN(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
        /* solo opera registros
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='#'))
         LSL(&Rd[instruction.op1_value],&instruction.op2_value);
	    }
	    */
	    }
	    } else
	 if(strcmp(instruction.mnemonic,"NOP") == 0 )
        {
		NOP( &pc);
	    }
	    else
     if(strcmp(instruction.mnemonic,"OR") == 0)
        {
        if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
        OR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
        }else
        if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
        OR(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);
	    } else

	 if( strcmp(instruction.mnemonic,"REV") == 0 )  //1
        {
		// instruction.op1_value --> Valor primer operando
		// instruction.op1_type  --> Tipo primer operando (R->Registro #->Numero N->Ninguno)
		// ... Igual para los otros operandos

	    } else
     if( strcmp(instruction.mnemonic,"REV16") == 0 ) //2
        {
		// instruction.op1_value --> Valor primer operando
		// instruction.op1_type  --> Tipo primer operando (R->Registro #->Numero N->Ninguno)
		// ... Igual para los otros operandos

	    } else
	 if( strcmp(instruction.mnemonic,"REVSH") == 0 )//3
        {
		// instruction.op1_value --> Valor primer operando
		// instruction.op1_type  --> Tipo primer operando (R->Registro #->Numero N->Ninguno)
		// ... Igual para los otros operandos

	    } else

	 if( strcmp(instruction.mnemonic,"ROR") == 0 )
        {
		if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
		{
        ROR(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
	    }
	    } else

	 if( strcmp(instruction.mnemonic,"RSBS") == 0 )
        {
         if((instruction.op1_type=='R')&&(instruction.op2_type=='R'))
		{
        RSBS(&Rd[instruction.op1_value],&Rm[instruction.op2_value], &pc);
        }else
        if((instruction.op1_type=='R')&&instruction.op2_type=='#')
        RSBS(&Rd[instruction.op1_value],instruction.op2_value, &pc);
	    } else
	 /*if( strcmp(instruction.mnemonic,"SBC") == 0 ) //4
        {
	    } else*/
	 if( strcmp(instruction.mnemonic,"SUB") == 0 )
        {
        if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
		{
         SUB(&Rd[instruction.op1_value],&Rm[instruction.op2_value],&Rr[instruction.op3_value],&flg[0], &pc);
        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
         SUB(&Rd[instruction.op1_value],&Rm[instruction.op2_value],instruction.op3_value,&flg[0], &pc);
	    } else
	 if( strcmp(instruction.mnemonic,"LDR") == 0) //5
        {   if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='#'))
            {
                LDR(&Rd[instruction.op1_value],Rm[instruction.op1_value],instruction.op3_value);
            }else if ((instruction.op1_type=='R')&&(instruction.op2_type=='S')&&(instruction.op3_type=='#'))
	        {
	            LDR(&Rd[instruction.op1_value],pila,instruction.op3_value);
	        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='P')&&(instruction.op3_type=='#'))
	        {
	          LDR(&Rd[instruction.op1_value],pc,instruction.op3_value);
	        }else if((instruction.op1_type=='R')&&(instruction.op2_type=='R')&&(instruction.op3_type=='R'))
	        {LDR(&Rd[instruction.op1_value],Rd[instruction.op2_value],instruction.op3_value);
	        }
	    }else
	    if( strcmp(instruction.mnemonic,"LDR") == 0)
        {




}

}

Beispiel #5

Datei anzeigen

Datei: decoder.c Projekt: alejo7053/Proyecto_1

void decodeInstruction(instruction_t instruction, uint32_t *dir_reg, char *dir_flags, uint8_t *SRAM, uint16_t *dec)
{
	uint8_t *R_activos=instruction.registers_list;
	/* Comparacion de mnemonic y Llamado de las funciones */
	if( strcmp(instruction.mnemonic,"ADC") == 0 || strcmp(instruction.mnemonic,"ADCS") == 0){
		dir_reg[PC]++;
		*dec=16704;
		*dec=*dec|instruction.op3_value<<3|instruction.op1_value;
		dir_reg[instruction.op1_value]=ADC(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
	}

	if( strcmp(instruction.mnemonic,"ADDS") == 0 || strcmp(instruction.mnemonic,"ADD") == 0){
		dir_reg[PC]++;
		if(instruction.op2_type=='S'){
			*dec=45056;
			dir_reg[SP]=ADD(dir_reg[SP],instruction.op3_value,dir_flags);
			*dec=*dec|instruction.op3_value;}
		else if(instruction.op3_type=='#'){
			*dec=7168;
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
			dir_reg[instruction.op1_value]=ADD(dir_reg[instruction.op2_value], instruction.op3_value,dir_flags);
			mvprintw(4,20,"%X",*dec);}
		else{
			*dec=6144;
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
			dir_reg[instruction.op1_value]=ADD(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);}
	}
	
	if( strcmp(instruction.mnemonic,"AND") == 0 || strcmp(instruction.mnemonic,"ANDS") == 0){
		dir_reg[PC]++;
		*dec=16384;
		if(instruction.op3_type=='#'){
			dir_reg[instruction.op1_value]=AND(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
		else
			dir_reg[instruction.op1_value]=AND(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"ASR") == 0 || strcmp(instruction.mnemonic,"ASRS") == 0){
		dir_reg[PC]++;
		if(instruction.op3_type=='#'){
			*dec=4096;
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
			dir_reg[instruction.op1_value]=ASR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
		else{
			*dec=16640;
			*dec=*dec|instruction.op3_value<<3|instruction.op1_value;
			dir_reg[instruction.op1_value]=ASR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);}
	}
	
	if( strcmp(instruction.mnemonic,"BICS") == 0 || strcmp(instruction.mnemonic,"BICS") == 0){
		dir_reg[PC]++;
		if(instruction.op3_type=='#')
			dir_reg[instruction.op1_value]=BIC(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
		else{
			*dec=17280;
			dir_reg[instruction.op1_value]=BIC(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
			*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
	}
	
	if( strcmp(instruction.mnemonic,"CMN" ) == 0 || strcmp(instruction.mnemonic,"CMNS") == 0){
		dir_reg[PC]++;
		CMN(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value],dir_flags);
		*dec=17088;
		*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
		mvprintw(4,20,"%X",*dec);
	}
	
	if( strcmp(instruction.mnemonic,"CMP") == 0 || strcmp(instruction.mnemonic,"CMPS") == 0){
		dir_reg[PC]++;
		CMP(dir_reg[instruction.op1_value],dir_reg[instruction.op2_value],dir_flags);
		*dec=17024;
		*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
		mvprintw(4,20,"%X",*dec);
	}
	
	if( strcmp(instruction.mnemonic,"EOR") == 0 || strcmp(instruction.mnemonic,"EORS") == 0){
		dir_reg[PC]++;
		*dec=16448;
		if(instruction.op3_type=='#')
			dir_reg[instruction.op1_value]=EOR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
		else
			dir_reg[instruction.op1_value]=EOR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"LSLS") == 0 || strcmp(instruction.mnemonic,"LSL") == 0){
		dir_reg[PC]++;
		if(instruction.op3_type=='#'){
			*dec=0;
			dir_reg[instruction.op1_value]=LSL(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
		else{
			*dec=16512;
			dir_reg[instruction.op1_value]=LSL(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
			*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
	}
	
	if( strcmp(instruction.mnemonic,"LSRS") == 0 || strcmp(instruction.mnemonic,"LSR") == 0){
		dir_reg[PC]++;
		if(instruction.op3_type=='#'){
			*dec=2048;
			dir_reg[instruction.op1_value]=LSR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
		else{
			*dec=16576;
			dir_reg[instruction.op1_value]=LSR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
			*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
	}
	
	if( strcmp(instruction.mnemonic,"MOV") == 0 || strcmp(instruction.mnemonic,"MOVS") == 0){
		dir_reg[PC]++;
		if(instruction.op2_type=='#'){
			*dec=8192;
			dir_reg[instruction.op1_value]=MOV(instruction.op2_value,dir_flags);
			*dec=*dec|instruction.op1_value<<8|instruction.op2_value;}
		else{
			*dec=0;
			dir_reg[instruction.op1_value]=MOV(dir_reg[instruction.op2_value],dir_flags);
			*dec=*dec|instruction.op2_value<<3|instruction.op1_value;}
	}
	
	if( strcmp(instruction.mnemonic,"MUL") == 0 || strcmp(instruction.mnemonic,"MULS") == 0){
		dir_reg[PC]++;
		*dec=17216;
		if(instruction.op3_type=='#'){
			dir_reg[instruction.op1_value]=MUL(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
		else{
			dir_reg[instruction.op1_value]=MUL(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
			*dec=*dec|instruction.op2_value<<3|instruction.op1_value;}
	}
	
	if( strcmp(instruction.mnemonic,"MVN") == 0 || strcmp(instruction.mnemonic,"MVNS") == 0){
		dir_reg[PC]++;
		*dec=17344;
		dir_reg[instruction.op1_value]=MVN(dir_reg[instruction.op2_value], dir_flags);
		*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
	}
	
	if( strcmp(instruction.mnemonic,"ORR") == 0 || strcmp(instruction.mnemonic,"ORRS") == 0){
		dir_reg[PC]++;
		*dec=17152;
		if(instruction.op3_type=='#'){
			dir_reg[instruction.op1_value]=ORR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
		else{
			dir_reg[instruction.op1_value]=ORR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
			*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
	}
	
	if( strcmp(instruction.mnemonic,"REV") == 0 || strcmp(instruction.mnemonic,"REVS") == 0){
		dir_reg[PC]++;
		*dec=47616;
		dir_reg[instruction.op1_value]=REV(dir_reg[instruction.op2_value]);
		*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
	}
	
	if( strcmp(instruction.mnemonic,"REVG") == 0 || strcmp(instruction.mnemonic,"REVGS") == 0){
		dir_reg[PC]++;
		*dec=47680;
		dir_reg[instruction.op1_value]=REVG(dir_reg[instruction.op2_value]);
		*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
	}
	
	if( strcmp(instruction.mnemonic,"REVSH") == 0 || strcmp(instruction.mnemonic,"REVSHS") == 0){
		dir_reg[PC]++;
		*dec=47808;
		dir_reg[instruction.op1_value]=REVSH(dir_reg[instruction.op2_value]);
		*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
	}
	
	if( strcmp(instruction.mnemonic,"ROR") == 0 || strcmp(instruction.mnemonic,"RORS") == 0){
		dir_reg[PC]++;
		*dec=16832;
		if(instruction.op3_type=='#'){
			dir_reg[instruction.op1_value]=ROR(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);}
		else{
			dir_reg[instruction.op1_value]=ROR(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
			*dec=*dec|instruction.op3_value<<3|instruction.op1_value;}
	}
	
	if( strcmp(instruction.mnemonic,"RSB") == 0 || strcmp(instruction.mnemonic,"RSBS") == 0){
		dir_reg[PC]++;
		*dec=16690;
		dir_reg[instruction.op1_value]=RSB(dir_reg[instruction.op2_value], dir_flags);
		*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
	}
	
	if( strcmp(instruction.mnemonic,"SBC") == 0 || strcmp(instruction.mnemonic,"SBCS") == 0){
		dir_reg[PC]++;
		*dec=16768;
		SBC(dir_reg[instruction.op1_value],dir_reg[instruction.op2_value], dir_flags);
		*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
	}
	
	if( strcmp(instruction.mnemonic,"SUBS") == 0 || strcmp(instruction.mnemonic,"SUB") == 0){
		dir_reg[PC]++;
		if(instruction.op2_type=='S'){
			*dec=45184;
			dir_reg[SP]=SUB(dir_reg[SP],instruction.op3_value,dir_flags);
			*dec=*dec|instruction.op3_value;}
		else if(instruction.op3_type=='#'){
			*dec=7680;
			dir_reg[instruction.op1_value]=SUB(dir_reg[instruction.op2_value],instruction.op3_value,dir_flags);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
		else{
			*dec=6656;
			dir_reg[instruction.op1_value]=SUB(dir_reg[instruction.op2_value],dir_reg[instruction.op3_value],dir_flags);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
	}
	
	if( strcmp(instruction.mnemonic,"TST") == 0 || strcmp(instruction.mnemonic,"TSTS") == 0){
		dir_reg[PC]++;
		*dec=16896;
		TST(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], dir_flags);
		*dec=*dec|instruction.op2_value<<3|instruction.op1_value;
	}
	
	if( strcmp(instruction.mnemonic,"NOP") == 0 ){
		NOP(dir_reg);
		*dec=48896;
	}
	
	if( strcmp(instruction.mnemonic,"B") == 0 ){
		*dec=57344;
		*dec=*dec|instruction.op1_value;
		B(instruction.op1_value, dir_reg);
	}
	
	if( strcmp(instruction.mnemonic,"BL") == 0 ){
		*dec=0;
		BL(instruction.op1_value, dir_reg);
	}
	
	if( strcmp(instruction.mnemonic,"BX") == 0 ){
		*dec=18176;
		BX(dir_reg);
	}
	
	if( strcmp(instruction.mnemonic,"BEQ") == 0 ){
		*dec=0;
		BEQ(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BNE") == 0 ){
		*dec=0;
		BNE(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BCS") == 0 ){
		*dec=0;
		BCS(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BCC") == 0 ){
		*dec=0;
		BCC(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BMI") == 0 ){
		*dec=0;
		BMI(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BPL") == 0 ){
		*dec=0;
		BPL(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BVS") == 0 ){
		*dec=0;
		BVS(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BVC") == 0 ){
		*dec=0;
		BVC(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BHI") == 0 ){
		*dec=0;
		BHI(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BLS") == 0 ){
		*dec=0;
		BLS(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BGE") == 0 ){
		*dec=0;
		BGE(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BLT") == 0 ){
		*dec=0;
		BLT(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BGT") == 0 ){
		*dec=0;
		BGT(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BLE") == 0 ){
		*dec=0;
		BLE(instruction.op1_value, dir_reg, dir_flags);
	}
	
	if( strcmp(instruction.mnemonic,"BAL") == 0 ){
		*dec=0;
		BAL(instruction.op1_value, dir_reg);
	}
	
	if(strcmp(instruction.mnemonic,"PUSH")==0){
		dir_reg[PC]++;
		*dec=46080;
		PUSH(SRAM, dir_reg,R_activos);
	}
	
	if(strcmp(instruction.mnemonic,"POP")==0){
		dir_reg[PC]++;
		*dec=48128;
		POP(SRAM,dir_reg,R_activos);
	}
	
	data=(uint8_t)dir_reg[instruction.op1_value];
	if(strcmp(instruction.mnemonic,"LDR")==0){
		dir_reg[PC]++;
		if(instruction.op2_type=='=' && instruction.op3_type=='N'){
			*dec=0;
			dir_reg[instruction.op1_value]=instruction.op2_value;}
		else if(instruction.op2_type=='S'){
			*dec=38912;
			dir_reg[instruction.op1_value]=LDR(dir_reg[SP], instruction.op3_value<<2, SRAM);
			*dec=*dec|instruction.op3_value|instruction.op1_value<<8;}
		else if(instruction.op3_type=='#' || instruction.op3_type=='N'){
			*dec=26624;
			if((dir_reg[instruction.op2_value]+(instruction.op3_value<<2))>=0x40000000)
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<2)), &data,Read);
			else
				dir_reg[instruction.op1_value]=LDR(dir_reg[instruction.op2_value], instruction.op3_value<<2, SRAM);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value|instruction.op1_value;}
		else{
			*dec=22528;
			if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
			else
				dir_reg[instruction.op1_value]=LDR(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
	}
	
	if(strcmp(instruction.mnemonic,"LDRB")==0){
		dir_reg[PC]++;
		if(instruction.op3_type=='#' || instruction.op3_type=='N'){
			*dec=30720;
			if((dir_reg[instruction.op2_value]+instruction.op3_value)>=0x40000000)
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+instruction.op3_value), &data,Read);	
			else
				dir_reg[instruction.op1_value]=LDRB(dir_reg[instruction.op2_value], instruction.op3_value, SRAM);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
		else{
			*dec=23552;
			if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
			else 
				dir_reg[instruction.op1_value]=LDRB(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
	}
	
	if(strcmp(instruction.mnemonic,"LDRH")==0){
		dir_reg[PC]++;
		if(instruction.op3_type=='#' || instruction.op3_type=='N'){
			*dec=34816;
			if((dir_reg[instruction.op2_value]+(instruction.op3_value<<1))>=0x40000000)
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<1)), &data,Read);
			else
				dir_reg[instruction.op1_value]=LDRH(dir_reg[instruction.op2_value], instruction.op3_value<<1, SRAM);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
		else{
			*dec=23040;
			if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
			else
				dir_reg[instruction.op1_value]=LDRH(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
	}
	
	if(strcmp(instruction.mnemonic,"LDRSB")==0){
		dir_reg[PC]++;
		*dec=22016;
		*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
		if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
			IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
		else
			dir_reg[instruction.op1_value]=LDRSB(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
	}
	
	if(strcmp(instruction.mnemonic,"LDRSH")==0){
		dir_reg[PC]++;
		*dec=24064;
		*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
		if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
			IOAccess((uint8_t)(dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value]), &data,Read);
		else
			dir_reg[instruction.op1_value]=LDRSH(dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
	}
	
	if(strcmp(instruction.mnemonic,"STR")==0){
		dir_reg[PC]++;
		if(instruction.op2_type=='S'){
			*dec=38912;
			STR(dir_reg[instruction.op1_value],dir_reg[SP], instruction.op3_value<<2, SRAM);
			*dec=*dec|instruction.op3_value|instruction.op1_value<<8;}
		else if(instruction.op3_type=='#' || instruction.op3_type=='N'){
			*dec=24576;
			if((dir_reg[instruction.op2_value]+(instruction.op3_value<<2))>=0x40000000){
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<2)), &data,Write);}
			else{
				STR(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], instruction.op3_value<<2, SRAM);}
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;
			mvprintw(1,3,"Hola");}
		else{
			*dec=20480;
			if((dir_reg[instruction.op2_value]+dir_reg[instruction.op2_value])>=0x40000000)
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(dir_reg[instruction.op3_value])), &data,Write);
			else{
				STR(dir_reg[instruction.op1_value], instruction.op2_value, instruction.op3_value, SRAM);}
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
	}
	
	if(strcmp(instruction.mnemonic,"STRB")==0){
		dir_reg[PC]++;
		if(instruction.op3_type=='#' || instruction.op3_type=='N'){
			*dec=28672;
			if(dir_reg[instruction.op2_value]+instruction.op3_value>=0x40000000){
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+instruction.op3_value), &data,Write);}
			else{			
				STRB(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], instruction.op3_value, SRAM);}
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
		else{
			*dec=21504;
			if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000){
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(dir_reg[instruction.op3_value])), &data,Write);}
			else{
				STRB(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);}
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
	}
	
	if(strcmp(instruction.mnemonic,"STRH")==0){
		dir_reg[PC]++;
		if(instruction.op3_type=='#' || instruction.op3_type=='N'){
			*dec=32768;
			if(((dir_reg[instruction.op2_value])+(instruction.op3_value<<1))>=0x40000000)
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(instruction.op3_value<<1)),&data,Write);
			else
				STRH(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], instruction.op3_value<<1, SRAM);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
		else{
			*dec=20992;
			if((dir_reg[instruction.op2_value]+dir_reg[instruction.op3_value])>=0x40000000)
				IOAccess((uint8_t)(dir_reg[instruction.op2_value]+(dir_reg[instruction.op3_value])), &data,Write);
			else
				STRH(dir_reg[instruction.op1_value], dir_reg[instruction.op2_value], dir_reg[instruction.op3_value], SRAM);
			*dec=*dec|instruction.op3_value<<6|instruction.op2_value<<3|instruction.op1_value;}
	}
}

Beispiel #6

Datei anzeigen

Datei: JitILAsm.cpp Projekt: Bigorneau/dolphin

void JitArmILAsmRoutineManager::Generate()
{
	enterCode = GetCodePtr();
	PUSH(9, R4, R5, R6, R7, R8, R9, R10, R11, _LR);
	// Take care to 8-byte align stack for function calls.
	// We are misaligned here because of an odd number of args for PUSH.
	// It's not like x86 where you need to account for an extra 4 bytes
	// consumed by CALL.
	SUB(_SP, _SP, 4);

	MOVI2R(R0, (u32)&CoreTiming::downcount);
	MOVI2R(R9, (u32)&PowerPC::ppcState.spr[0]);

	FixupBranch skipToRealDispatcher = B();
	dispatcher = GetCodePtr();
		printf("ILDispatcher is %p\n", dispatcher);

		// Downcount Check
		// The result of slice decrementation should be in flags if somebody jumped here
		// IMPORTANT - We jump on negative, not carry!!!
		FixupBranch bail = B_CC(CC_MI);

		SetJumpTarget(skipToRealDispatcher);
		dispatcherNoCheck = GetCodePtr();

		// This block of code gets the address of the compiled block of code
		// It runs though to the compiling portion if it isn't found
			LDR(R12, R9, PPCSTATE_OFF(pc));// Load the current PC into R12

			Operand2 iCacheMask = Operand2(0xE, 2); // JIT_ICACHE_MASK
			BIC(R12, R12, iCacheMask); // R12 contains PC & JIT_ICACHE_MASK here.

			MOVI2R(R14, (u32)jit->GetBlockCache()->iCache);

			LDR(R12, R14, R12); // R12 contains iCache[PC & JIT_ICACHE_MASK] here
			// R12 Confirmed this is the correct iCache Location loaded.
			TST(R12, 0x80); // Test  to see if it is a JIT block.

			SetCC(CC_EQ);
				// Success, it is our Jitblock.
				MOVI2R(R14, (u32)jit->GetBlockCache()->GetCodePointers());
				// LDR R14 right here to get CodePointers()[0] pointer.
				LSL(R12, R12, 2); // Multiply by four because address locations are u32 in size
				LDR(R14, R14, R12); // Load the block address in to R14

				B(R14);
				// No need to jump anywhere after here, the block will go back to dispatcher start
			SetCC();

		// If we get to this point, that means that we don't have the block cached to execute
		// So call ArmJit to compile the block and then execute it.
		MOVI2R(R14, (u32)&Jit);
		BL(R14);

		B(dispatcherNoCheck);

		// fpException()
		// Floating Point Exception Check, Jumped to if false
		fpException = GetCodePtr();
			LDR(R0, R9, PPCSTATE_OFF(Exceptions));
			ORR(R0, R0, EXCEPTION_FPU_UNAVAILABLE);
			STR(R0, R9, PPCSTATE_OFF(Exceptions));
				QuickCallFunction(R14, (void*)&PowerPC::CheckExceptions);
			LDR(R0, R9, PPCSTATE_OFF(npc));
			STR(R0, R9, PPCSTATE_OFF(pc));
		B(dispatcher);

		SetJumpTarget(bail);
		doTiming = GetCodePtr();
		// XXX: In JIT64, Advance() gets called /after/ the exception checking
		// once it jumps back to the start of outerLoop
		QuickCallFunction(R14, (void*)&CoreTiming::Advance);

		// Does exception checking
		testExceptions = GetCodePtr();
			LDR(R0, R9, PPCSTATE_OFF(pc));
			STR(R0, R9, PPCSTATE_OFF(npc));
				QuickCallFunction(R14, (void*)&PowerPC::CheckExceptions);
			LDR(R0, R9, PPCSTATE_OFF(npc));
			STR(R0, R9, PPCSTATE_OFF(pc));
		// Check the state pointer to see if we are exiting
		// Gets checked on every exception check
			MOVI2R(R0, (u32)PowerPC::GetStatePtr());
			MVN(R1, 0);
			LDR(R0, R0);
			TST(R0, R1);
			FixupBranch Exit = B_CC(CC_NEQ);

	B(dispatcher);

	SetJumpTarget(Exit);

	ADD(_SP, _SP, 4);

	POP(9, R4, R5, R6, R7, R8, R9, R10, R11, _PC);  // Returns

	GenerateCommon();

	FlushIcache();
}