void CodesFD(void)
{
register byte I;
register pair J;
#define XX IY
switch(M_RDMEM(R.PC.W++))
{
#include "CodesXX.h"
case PFX_FD:
case PFX_DD:
#ifdef INTERRUPTS
ICount++;
#endif
R.PC.W--;break;
case PFX_CB:
CodesFDCB();break;
case HALT:
#ifdef INTERRUPTS
if(R.IFF&0x01) { R.PC.W--;R.IFF|=0x80; }
#else
printf("CPU HALTed and stuck at PC=%hX\n",R.PC.W-=2);
CPURunning=0;
#endif
break;
default:
printf
(
"Unrecognized instruction: FD %X at PC=%hX\n",
M_RDMEM(R.PC.W-1),R.PC.W-2
);
}
#undef XX
}
INLINE void M_UNDEFINED(void)
{
logerror("ALPHA8201: PC = %03x, Unimplemented opcode = %02x\n", PC-1, M_RDMEM(PC-1));
#if SHOW_MESSAGE_CONSOLE
mame_printf_debug("ALPHA8201: PC = %03x, Unimplemented opcode = %02x\n", PC-1, M_RDMEM(PC-1));
#endif
}
INLINE void M_UNDEFINED(void)
{
logerror("ALPHA8201: PC = %03x, Unimplemented opcode = %02x\n", PC-1, M_RDMEM(PC-1));
#if SHOW_MESSAGE_CONSOLE
mame_printf_debug("ALPHA8201: PC = %03x, Unimplemented opcode = %02x\n", PC-1, M_RDMEM(PC-1));
#endif
#if BREAK_ON_UNKNOWN_OPCODE
DEBUGGER_BREAK;
#endif
}
void CodesCB(void)
{
register byte I;
switch(M_RDMEM(R.PC.W++))
{
#include "CodesCB.h"
default:
if(TrapBadOps)
printf
(
"Unrecognized instruction: CB %X at PC=%hX\n",
M_RDMEM(R.PC.W-1),R.PC.W-2
);
}
}
void alpha8201_cpu_device::M_UNDEFINED()
{
logerror("alpha8201: PC = %03x, Unimplemented opcode = %02x\n", m_pc.w.l-1, M_RDMEM(m_pc.w.l-1));
#if SHOW_MESSAGE_CONSOLE
osd_printf_debug("alpha8201: PC = %03x, Unimplemented opcode = %02x\n", m_pc.w.l-1, M_RDMEM(m_pc.w.l-1));
#endif
#if BREAK_ON_UNKNOWN_OPCODE
debugger_break(machine());
#endif
}
void CodesFDCB(void)
{
register pair J;
register byte I;
#define XX IY
J.W=R.XX.W+(offset)M_RDMEM(R.PC.W++);
switch(M_RDMEM(R.PC.W++))
{
#include "CodesXCB.h"
default:
if(TrapBadOps)
printf
(
"Unrecognized instruction: FD CB %X %X at PC=%hX\n",
M_RDMEM(R.PC.W-2),M_RDMEM(R.PC.W-1),R.PC.W-4
);
}
#undef XX
}
void CodesED(void)
{
register byte I;
register pair J;
switch(M_RDMEM(R.PC.W++))
{
#include "CodesED.h"
case PFX_ED:
#ifdef INTERRUPTS
ICount++;
#endif
R.PC.W--;break;
default:
if(TrapBadOps)
printf
(
"Unrecognized instruction: ED %X at PC=%hX\n",
M_RDMEM(R.PC.W-1),R.PC.W-2
);
}
}
void alpha8201_cpu_device::state_export(const device_state_entry &entry)
{
switch (entry.index())
{
case STATE_GENFLAGS:
m_flags = (m_cf << 1) | m_zf;
break;
case ALPHA8201_SP:
case STATE_GENSP:
m_sp = M_RDMEM(0x001);
break;
case ALPHA8201_R0:
m_R[0] = RD_REG(0);
break;
case ALPHA8201_R1:
m_R[1] = RD_REG(1);
break;
case ALPHA8201_R2:
m_R[2] = RD_REG(2);
break;
case ALPHA8201_R3:
m_R[3] = RD_REG(3);
break;
case ALPHA8201_R4:
m_R[4] = RD_REG(4);
break;
case ALPHA8201_R5:
m_R[5] = RD_REG(5);
break;
case ALPHA8201_R6:
m_R[6] = RD_REG(6);
break;
case ALPHA8201_R7:
m_R[7] = RD_REG(7);
break;
}
}
INLINE void M_ILLEGAL(void)
{
if (errorlog)
fprintf(errorlog, "I8039: PC = %04x, Illegal opcode = %02x\n", R.PC.w.l-1, M_RDMEM(R.PC.w.l-1));
}
static int rd_slow_wd( int addr )
{
return( (M_RDMEM(addr)<<8) | (M_RDMEM((addr+1)&0xffff)) );
}
static int rd_slow( int addr )
{
return M_RDMEM(addr);
}
INLINE void M_UNDEFINED(void)
{
logerror("I8039: PC = %04x, Unimplemented opcode = %02x\n", R.PC.w.l-1, M_RDMEM(R.PC.w.l-1));
}
static void movp3_a_xa(void) { R.A = M_RDMEM(0x300 | R.A); }
static void movp_a_xa(void) { R.A = M_RDMEM((R.PC.w.l & 0x0f00) | R.A); }
static void jmpp_xa(void) { UINT16 addr = (R.PC.w.l & 0xf00) | R.A; R.PC.w.l = (R.PC.w.l & 0xf00) | M_RDMEM(addr); /*change_pc(R.PC.w.l);*/ }
INLINE void M_UNDEFINED(void)
{
if (errorlog)
fprintf(errorlog, "I8039: PC = %04x, Unimplemented opcode = %02x\n", R.PC.w.l-1, M_RDMEM(R.PC.w.l-1));
}
INLINE void M_ILLEGAL(void)
{
logerror("I8039: PC = %04x, Illegal opcode = %02x\n", R.PC.w.l-1, M_RDMEM(R.PC.w.l-1));
}
void alpha8201_cpu_device::stop()
{
UINT8 pcptr = M_RDMEM(0x001) & 0x1f;
M_WRMEM(pcptr,(M_RDMEM(pcptr)&0xf)+0x08); /* mark entry point ODD to HALT */
m_mb |= 0x08; /* mark internal HALT state */
}
word Z80(reg Regs)
{
register byte I;
register pair J;
R=Regs;CPURunning=1;
#ifdef INTERRUPTS
ICount=IPeriod;
IFlag=0;
#endif
for(;;)
{
#ifdef DEBUG
if(R.PC.W==Trap) Trace=1; /*** Turn tracing on if trapped ***/
if(Trace) Debug(&R); /*** Call single-step debugger ***/
#endif
switch(M_RDMEM(R.PC.W++))
{
#include "Codes.h"
case PFX_CB: CodesCB();break;
case PFX_ED: CodesED();break;
case PFX_FD: CodesFD();break;
case PFX_DD: CodesDD();break;
case HALT:
#ifdef INTERRUPTS
if(R.IFF&0x01) { R.PC.W--;R.IFF|=0x80; }
#else
printf("CPU HALTed and stuck at PC=%hX\n",--R.PC.W);
CPURunning=0;
#endif
break;
default:
if(TrapBadOps)
printf
(
"Unrecognized instruction: %X at PC=%hX\n",
M_RDMEM(R.PC.W-1),R.PC.W-1
);
}
#ifndef INTERRUPTS
if(!CPURunning) break;
#else
if(!ICount--)
{
if(!CPURunning) break;
ICount=IPeriod;
if(IntSync||IFlag)
{
IFlag=0;J.W=Interrupt();
if(((J.W!=0xFFFF)&&(R.IFF&0x01))||(J.W==0x0066))
{
/* Experimental V Shouldn't disable all interrupts? */
R.IFF=(R.IFF&0xBE)|((R.IFF&0x01)<<6);
if(R.IFF&0x80) { R.PC.W++;R.IFF&=0x7F; }
M_PUSH(PC);
if(J.W==0x0066) R.PC.W=0x0066;
else
if(R.IFF&0x04)
{
J.W&=0xFE;J.B.h=R.I;
R.PC.B.l=M_RDMEM(J.W++);
R.PC.B.h=M_RDMEM(J.W);
}
else
if(R.IFF&0x02) R.PC.W=0x0038;
else R.PC.W=J.W;
}
}
}
#endif
}
return(R.PC.W);
}
void alpha8201_cpu_device::execute_run()
{
unsigned opcode;
UINT8 pcptr;
if(m_halt)
{
m_icount = 0;
return;
}
/* setup address bank & fall safe */
m_ix0.b.h =
m_ix1.b.h =
m_ix2.b.h = (m_pc.b.h &= 3);
/* reset start hack */
if(m_pc.w.l<0x20)
m_mb |= 0x08;
do
{
if(m_mb & 0x08)
{
pcptr = M_RDMEM(0x001) & 0x1f; /* pointer of entry point */
m_icount -= C1;
/* entry point scan phase */
if( (pcptr&1) == 0)
{
/* EVEN , get PC low */
m_pc.b.l = M_RDMEM(pcptr);
//osd_printf_debug("alpha8201 load PCL ENTRY=%02X PCL=%02X\n",pcptr, m_pc.b.l);
m_icount -= C1;
M_WRMEM(0x001,pcptr+1);
continue;
}
/* ODD , check HALT flag */
m_mb = M_RDMEM(pcptr) & (0x08|0x03);
m_icount -= C1;
/* not entryaddress 000,001 */
if(pcptr<2) m_mb |= 0x08;
if(m_mb & 0x08)
{
/* HALTED current entry point . next one */
pcptr = (pcptr+1)&0x1f;
M_WRMEM(0x001,pcptr);
m_icount -= C1;
continue;
}
/* goto run phase */
M_JMP(m_pc.b.l);
#if SHOW_ENTRY_POINT
logerror("alpha8201 START ENTRY=%02X PC=%03X\n",pcptr,m_pc.w.l);
osd_printf_debug("alpha8201 START ENTRY=%02X PC=%03X\n",pcptr,m_pc.w.l);
#endif
}
/* run */
m_PREVPC = m_pc.w.l;
debugger_instruction_hook(this, m_pc.w.l);
opcode =M_RDOP(m_pc.w.l);
#if TRACE_PC
osd_printf_debug("alpha8201: PC = %03x, opcode = %02x\n", m_pc.w.l, opcode);
#endif
m_pc.b.l++;
m_inst_cycles = m_opmap[opcode].cycles;
(this->*m_opmap[opcode].opcode_func)();
m_icount -= m_inst_cycles;
} while (m_icount>0);
}
static void jmpp_xa(void) { UINT16 addr = (R.PC.w.l & 0xf00) | R.A; R.PC.w.l = (R.PC.w.l & 0xf00) | M_RDMEM(addr); }
