void StartupHook( void ) { // LDEBUG_PRINTF("## StartupHook\n"); uint32_t sys_freq = McuE_GetSystemClock(); (void)sys_freq; LDEBUG_PRINTF("Sys clock %d Hz\n",sys_freq); }
/** * Get the peripheral clock in Hz for a specific device */ uint32_t McuE_GetPeripheralClock(McuE_PeriperalClock_t type) { uint32_t sysClock = McuE_GetSystemClock(); vuint32_t prescaler; // See table 3.1, section 3.4.5 Peripheral Clock dividers switch (type) { //case PERIPHERAL_CLOCK_ADC_0: //case PERIPHERAL_CLOCK_ADC_1: //case PERIPHERAL_CLOCK_ETIMER_0: //case PERIPHERAL_CLOCK_ETIMER_1: case PERIPHERAL_CLOCK_FLEXPWM_0: /* FMPLL1 */ uint32_t eprediv = CGM.FMPLL[1].CR.B.IDF; uint32_t emfd = CGM.FMPLL[1].CR.B.NDIV; uint32_t erfd = CGM.FMPLL[1].CR.B.ODF; uint32_t f_sys; uint32 extal = Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].McuClockReferencePointFrequency; f_sys = CALC_SYSTEM_CLOCK(extal,emfd,eprediv,erfd); prescaler = CGM.AC0DC.B.DIV0; return f_sys/(1<<prescaler); break; case PERIPHERAL_CLOCK_FLEXCAN_A: case PERIPHERAL_CLOCK_FLEXCAN_B: case PERIPHERAL_CLOCK_FLEXCAN_C: case PERIPHERAL_CLOCK_FLEXCAN_D: case PERIPHERAL_CLOCK_FLEXCAN_E: case PERIPHERAL_CLOCK_FLEXCAN_F: case PERIPHERAL_CLOCK_DSPI_A: case PERIPHERAL_CLOCK_DSPI_B: case PERIPHERAL_CLOCK_DSPI_C: case PERIPHERAL_CLOCK_DSPI_D: case PERIPHERAL_CLOCK_DSPI_E: case PERIPHERAL_CLOCK_DSPI_F: case PERIPHERAL_CLOCK_PIT: case PERIPHERAL_CLOCK_LIN_A: case PERIPHERAL_CLOCK_LIN_B: case PERIPHERAL_CLOCK_LIN_C: case PERIPHERAL_CLOCK_LIN_D: prescaler = 0; break; default: assert(0); break; } return sysClock/(1<<prescaler); }
/** * Get the peripheral clock in Hz for a specific device */ uint32_t McuE_GetPeripheralClock(McuE_PeriperalClock_t type) { uint32_t res = 0; switch(type) { case PERIPHERAL_CLOCK_AHB: res = McuE_GetSystemClock(); break; case PERIPHERAL_CLOCK_APB1: res = McuE_GetSystemClock() / 2; break; case PERIPHERAL_CLOCK_APB2: res = McuE_GetSystemClock(); break; default: break; } return res; }
void StartWatchdog(uint32 timeout_in_ms) { #if defined(CFG_MPC5567) (void)timeout_in_ms; ECSM.SWTCR.R = 0x00D8; #elif defined(CFG_MPC560X)|| defined(CFG_MPC563XM) (void)timeout_in_ms; SWT.CR.R = 0x8000011B; #elif defined(CFG_MPC5668) /* Clocked by 16 MHz IRC clock */ /* Clear softlock */ WRITE32(SWT_BASE + SWT_SR, 0x0000c520); WRITE32(SWT_BASE + SWT_SR, 0x0000d928); /* Write TMO */ WRITE32(SWT_BASE + SWT_TO, timeout_in_ms * 16000 ); /* Enable Watchdog */ WRITE32(SWT_BASE + SWT_CR,0x80000000UL + CR_RIA + CR_SLK + CR_CSL + CR_FRZ + CR_WEN); #elif defined(CFG_MPC5516) /* We running on system clock, ie SIU_SYSCLK.SWTCLKSEL, so get the value */ /* The timeout is 2^x, so get best possible value * Table for 80Mhz * ------------------ * 2^9 = 512 = 6.4 uS * 2^15 = 400 uS * 2^20 = 13 mS * 2^28 = 3.3 S * 2^31 = 26,84 S * * Formula: * 1/clock * 2^n = tmo_in_s * 2^n = tmo_in_s * clock -> n = log2(tmo_in_s * clock) = log2(tmo_in_ms * clock / 1000 ) * */ uint32 swtVal = ilog2( McuE_GetSystemClock()/1000 * timeout_in_ms ); #if defined(CFG_WDG_TEST) MCM.SWTCR.R = (SWTCR_SWE + SWTCR_SWRI(WDG_SWRI_VAL) + swtVal); #else MCM.SWTCR.R = (SWTCR_SWE + SWTCR_SWRI(2) + swtVal); #endif #else MCM.SWTCR.R = 0x00D8; #endif }
uint32_t McuE_GetPeripheralClock(McuE_PeriperalClock_t type) { uint32_t sysClock = McuE_GetSystemClock(); vuint32_t prescaler; switch (type) { case PERIPHERAL_CLOCK_FLEXCAN_A: case PERIPHERAL_CLOCK_FLEXCAN_B: case PERIPHERAL_CLOCK_FLEXCAN_C: case PERIPHERAL_CLOCK_FLEXCAN_D: case PERIPHERAL_CLOCK_FLEXCAN_E: case PERIPHERAL_CLOCK_FLEXCAN_F: case PERIPHERAL_CLOCK_DSPI_A: case PERIPHERAL_CLOCK_DSPI_B: case PERIPHERAL_CLOCK_DSPI_C: case PERIPHERAL_CLOCK_DSPI_D: prescaler = SIU.SYSCLK.B.LPCLKDIV1; break; case PERIPHERAL_CLOCK_ESCI_A: case PERIPHERAL_CLOCK_ESCI_B: case PERIPHERAL_CLOCK_ESCI_C: case PERIPHERAL_CLOCK_ESCI_D: case PERIPHERAL_CLOCK_ESCI_E: case PERIPHERAL_CLOCK_ESCI_F: case PERIPHERAL_CLOCK_IIC_A: case PERIPHERAL_CLOCK_IIC_B: prescaler = SIU.SYSCLK.B.LPCLKDIV0; break; case PERIPHERAL_CLOCK_ADC_A: prescaler = SIU.SYSCLK.B.LPCLKDIV2; break; case PERIPHERAL_CLOCK_EMIOS: prescaler = SIU.SYSCLK.B.LPCLKDIV3; break; default: assert(0); break; } return sysClock/(1<<prescaler); }
/** * Restart drivers. Have no restart list, instead the * drivers restarted are drivers that have had it's hardware * registers reset. If memory is also lost (=all memory is not * powered during sleep), this strategy does not work. * * This calls: * - EcuM_AL_DriverInitOne() * - EcuM_AL_DriverInitTwo() * */ void EcuM_AL_DriverRestart(const struct EcuM_ConfigS* ConfigPtr) { EcuM_ConfigType* config; VALIDATE_STATE( ECUM_STATE_WAKEUP_ONE); config = EcuM_DeterminePbConfiguration(); /* Start all drivers for now */ EcuM_AL_DriverInitOne(config); /* Setup the systick interrupt */ #if defined(USE_MCU) { uint32_t sys_freq = McuE_GetSystemClock(); Os_SysTickInit(); Os_SysTickStart(sys_freq / OsTickFreq); } #endif EcuM_AL_DriverInitTwo(config); }
/** * Get the peripheral clock in Hz for a specific device */ uint32_t McuE_GetPeripheralClock(McuE_PeriperalClock_t type) { #if defined(CFG_MPC5567) || defined(CFG_MPC563XM) // No peripheral dividers on 5567. return McuE_GetSystemClock(); #else uint32_t sysClock = McuE_GetSystemClock(); vuint32_t prescaler; // See table 3.1, section 3.4.5 Peripheral Clock dividers switch (type) { case PERIPHERAL_CLOCK_FLEXCAN_A: case PERIPHERAL_CLOCK_DSPI_A: #if defined(CFG_MPC5516) prescaler = SIU.SYSCLK.B.LPCLKDIV0; break; #elif defined(CFG_MPC560X) prescaler = CGM.SC_DC[1].B.DIV; break; #endif case PERIPHERAL_CLOCK_PIT: case PERIPHERAL_CLOCK_ESCI_A: case PERIPHERAL_CLOCK_IIC_A: #if defined(CFG_MPC5516) prescaler = SIU.SYSCLK.B.LPCLKDIV1; break; #endif case PERIPHERAL_CLOCK_FLEXCAN_B: case PERIPHERAL_CLOCK_FLEXCAN_C: case PERIPHERAL_CLOCK_FLEXCAN_D: case PERIPHERAL_CLOCK_FLEXCAN_E: case PERIPHERAL_CLOCK_FLEXCAN_F: #if defined(CFG_MPC5516) prescaler = SIU.SYSCLK.B.LPCLKDIV2; break; #elif defined(CFG_MPC560X) prescaler = CGM.SC_DC[1].B.DIV; break; #endif case PERIPHERAL_CLOCK_DSPI_B: case PERIPHERAL_CLOCK_DSPI_C: case PERIPHERAL_CLOCK_DSPI_D: case PERIPHERAL_CLOCK_DSPI_E: case PERIPHERAL_CLOCK_DSPI_F: #if defined(CFG_MPC5516) prescaler = SIU.SYSCLK.B.LPCLKDIV3; break; #endif case PERIPHERAL_CLOCK_ESCI_B: case PERIPHERAL_CLOCK_ESCI_C: case PERIPHERAL_CLOCK_ESCI_D: case PERIPHERAL_CLOCK_ESCI_E: case PERIPHERAL_CLOCK_ESCI_F: case PERIPHERAL_CLOCK_ESCI_G: case PERIPHERAL_CLOCK_ESCI_H: #if defined(CFG_MPC5516) prescaler = SIU.SYSCLK.B.LPCLKDIV4; break; #endif #if defined(CFG_MPC560X) case PERIPHERAL_CLOCK_LIN_A: case PERIPHERAL_CLOCK_LIN_B: #if defined(CFG_MPC560XB) || defined(CFG_MPC5604P) case PERIPHERAL_CLOCK_LIN_C: case PERIPHERAL_CLOCK_LIN_D: #endif prescaler = CGM.SC_DC[0].B.DIV; break; case PERIPHERAL_CLOCK_EMIOS_0: prescaler = CGM.SC_DC[2].B.DIV; break; case PERIPHERAL_CLOCK_EMIOS_1: prescaler = CGM.SC_DC[2].B.DIV; break; #else case PERIPHERAL_CLOCK_EMIOS: #if defined(CFG_MPC5516) prescaler = SIU.SYSCLK.B.LPCLKDIV5; break; #endif #endif case PERIPHERAL_CLOCK_MLB: #if defined(CFG_MPC5516) prescaler = SIU.SYSCLK.B.LPCLKDIV6; break; #endif default: assert(0); break; } return sysClock/(1<<prescaler); #endif }
EXPORT Std_ReturnType Can_Hw_InitController(uint8 controller,const Can_ControllerConfigType* config) { CAN_HW_t *canHw; uint8_t tq; uint8_t tqSync; uint8_t tq1; uint8_t tq2; uint32_t clock; Can_UnitType *canUnit; uint8 cId = controller; const Can_ControllerConfigType *canHwConfig; const Can_HardwareObjectType *hohObj; canUnit = CAN_GET_PRIVATE_DATA(controller); canHw = GetController(cId); canHwConfig = CAN_GET_CONTROLLER_CONFIG(Can_Global.channelMap[cId]); // Start this baby up CAN_DeInit(canHw); /* CAN filter init. We set up two filters - one for the master (CAN1) and * one for the slave (CAN2) * * CAN_SlaveStartBank(n) denotes which filter is the first of the slave. * * The filter registers reside in CAN1 and is shared to CAN2, so we only need * to set up this once. */ // We let all frames in and do the filtering in software. CAN_FilterInitTypeDef CAN_FilterInitStructure; CAN_FilterInitStructure.CAN_FilterMode=CAN_FilterMode_IdMask; CAN_FilterInitStructure.CAN_FilterScale=CAN_FilterScale_32bit; CAN_FilterInitStructure.CAN_FilterIdHigh=0x0000; CAN_FilterInitStructure.CAN_FilterIdLow=0x0000; CAN_FilterInitStructure.CAN_FilterMaskIdHigh=0x0000; CAN_FilterInitStructure.CAN_FilterMaskIdLow=0x0000; CAN_FilterInitStructure.CAN_FilterFIFOAssignment=CAN_FIFO0; CAN_FilterInitStructure.CAN_FilterActivation=ENABLE; // Init filter 0 (CAN1/master) CAN_FilterInitStructure.CAN_FilterNumber=0; CAN_FilterInit(&CAN_FilterInitStructure); // Init filter 1 (CAN2/slave) CAN_FilterInitStructure.CAN_FilterNumber=1; CAN_FilterInit(&CAN_FilterInitStructure); // Set which filter to use for CAN2. CAN_SlaveStartBank(1); // acceptance filters hohObj = canHwConfig->Can_Hoh; --hohObj; do { ++hohObj; if (hohObj->CanObjectType == CAN_OBJECT_TYPE_RECEIVE) { // TODO Hw filtering } }while( !hohObj->Can_EOL ); // Clock calucation // ------------------------------------------------------------------- // // * 1 TQ = Sclk period( also called SCK ) // * Ftq = Fcanclk / ( PRESDIV + 1 ) = Sclk // ( Fcanclk can come from crystal or from the peripheral dividers ) // // --> // TQ = 1/Ftq = (PRESDIV+1)/Fcanclk --> PRESDIV = (TQ * Fcanclk - 1 ) // TQ is between 8 and 25 clock = McuE_GetSystemClock()/2; tqSync = config->CanControllerPropSeg + 1; tq1 = config->CanControllerSeg1 + 1; tq2 = config->CanControllerSeg2 + 1; tq = tqSync + tq1 + tq2; CAN_InitTypeDef CAN_InitStructure; CAN_StructInit(&CAN_InitStructure); /* CAN cell init */ CAN_InitStructure.CAN_TTCM=DISABLE; CAN_InitStructure.CAN_ABOM=ENABLE; CAN_InitStructure.CAN_AWUM=ENABLE; CAN_InitStructure.CAN_NART=DISABLE; CAN_InitStructure.CAN_RFLM=DISABLE; CAN_InitStructure.CAN_TXFP=DISABLE; if(config->Can_Loopback){ CAN_InitStructure.CAN_Mode=CAN_Mode_LoopBack; }else{ CAN_InitStructure.CAN_Mode=CAN_Mode_Normal; } CAN_InitStructure.CAN_SJW=config->CanControllerPropSeg; CAN_InitStructure.CAN_BS1=config->CanControllerSeg1; CAN_InitStructure.CAN_BS2=config->CanControllerSeg2; CAN_InitStructure.CAN_Prescaler= clock/(config->CanControllerBaudRate*1000*tq); if(CANINITOK != CAN_Init(canHw,&CAN_InitStructure)) { return E_NOT_OK; } canUnit->state = CANIF_CS_STOPPED; Can_EnableControllerInterrupts(cId); return E_OK; }