static int usb_rtusb_init_device(struct net_device *net_dev)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER) RTMP_OS_NETDEV_GET_PRIV(net_dev);
NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
UCHAR TmpPhy;
DBGPRINT(RT_DEBUG_TRACE, "%s-->\n", __FUNCTION__);
// init mediastate to disconnected
OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
//bottom half data is assign at each task_scheduler
tasklet_init(&pAd->rx_bh, RTUSBBulkRxHandle, (unsigned long)pAd);
// Initialize pAd->PortCfg to manufacture default
PortCfgInit(pAd);
// Init RTMP_ADAPTER CmdQElements
Status = RTMPInitAdapterBlock(pAd); //always success
if (Status != NDIS_STATUS_SUCCESS)
{
return Status;
}
//
// Init send data structures and related parameters
//
Status = NICInitTransmit(pAd); //if fail clean itself
if (Status != NDIS_STATUS_SUCCESS)
{
return Status;
}
//
// Init receive data structures and related parameters
//
Status = NICInitRecv(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
goto out;
}
// Wait for hardware stable
{
ULONG MacCsr0 = 0, Index = 0;
do
{
Status = RTUSBReadMACRegister(pAd, MAC_CSR0, &MacCsr0);
if (MacCsr0 != 0)
break;
RTMPusecDelay(1000);
} while (Index++ < 1000);
DBGPRINT(RT_DEBUG_TRACE, "Init: MAC_CSR0=0x%08x, Status=0x%08x\n", MacCsr0, Status);
}
// Load 8051 firmware
Status = NICLoadFirmware(pAd);
if(Status != NDIS_STATUS_SUCCESS)
{
goto out;
}
// Initialize Asics
NICInitializeAsic(pAd);
#ifdef BLOCK_NET_IF
initblockQueueTab(pAd);
#endif // BLOCK_NET_IF //
// Read RaConfig profile parameters
#ifdef READ_PROFILE_FROM_FILE
RTMPReadParametersFromFile(pAd);
#endif
//
// Read additional info from NIC such as MAC address
// This function must called after register CSR base address
//
#ifdef INIT_FROM_EEPROM
NICReadEEPROMParameters(pAd);
NICInitAsicFromEEPROM(pAd);
#endif
RTUSBWriteHWMACAddress(pAd);
// external LNA has different R17 base
if (pAd->NicConfig2.field.ExternalLNA)
{
pAd->BbpTuning.R17LowerBoundA += 0x10;
pAd->BbpTuning.R17UpperBoundA += 0x10;
pAd->BbpTuning.R17LowerBoundG += 0x10;
pAd->BbpTuning.R17UpperBoundG += 0x10;
}
// hardware initialization after all parameters are acquired from
// Registry or E2PROM
TmpPhy = pAd->PortCfg.PhyMode;
pAd->PortCfg.PhyMode = 0xff;
RTMPSetPhyMode(pAd, TmpPhy);
// max desired rate might be reset as call phymode setup, so set TxRate again
if (pAd->PortCfg.DefaultMaxDesiredRate == 0)
RTMPSetDesiredRates(pAd, -1);
else
RTMPSetDesiredRates(pAd, (LONG) (RateIdToMbps[pAd->PortCfg.DefaultMaxDesiredRate - 1] * 1000000));
//
// initialize MLME
//
Status = MlmeInit(pAd);
if(Status != NDIS_STATUS_SUCCESS)
{
goto out;
}
// mlmethread & RTUSBCmd flag restart
mlme_kill = 0;
RTUSBCmd_kill =0;
CreateThreads(net_dev);
// at every open handler, copy mac address.
COPY_MAC_ADDR(pAd->net_dev->dev_addr, pAd->CurrentAddress);
// USB_ID info for UI
pAd->VendorDesc = 0x148F2573;
DBGPRINT(RT_DEBUG_TRACE, "%s<--\n", __FUNCTION__);
return 0;
out:
ReleaseAdapter(pAd, TRUE, FALSE);
return Status;
}
/*
========================================================================
Routine Description:
Allocate DMA memory blocks for send, receive.
Arguments:
pAd Pointer to our adapter
Return Value:
NDIS_STATUS_SUCCESS
NDIS_STATUS_FAILURE
NDIS_STATUS_RESOURCES
Note:
========================================================================
*/
NDIS_STATUS RTMPAllocTxRxRingMemory(
IN PRTMP_ADAPTER pAd)
{
// COUNTER_802_11 pCounter = &pAd->WlanCounters;
NDIS_STATUS Status;
INT num;
DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocTxRxRingMemory\n"));
do
{
// Init the CmdQ and CmdQLock
NdisAllocateSpinLock(&pAd->CmdQLock);
NdisAcquireSpinLock(&pAd->CmdQLock);
RTUSBInitializeCmdQ(&pAd->CmdQ);
NdisReleaseSpinLock(&pAd->CmdQLock);
NdisAllocateSpinLock(&pAd->MLMEBulkOutLock);
//NdisAllocateSpinLock(&pAd->MLMEWaitQueueLock);
NdisAllocateSpinLock(&pAd->BulkOutLock[0]);
NdisAllocateSpinLock(&pAd->BulkOutLock[1]);
NdisAllocateSpinLock(&pAd->BulkOutLock[2]);
NdisAllocateSpinLock(&pAd->BulkOutLock[3]);
NdisAllocateSpinLock(&pAd->BulkOutLock[4]);
NdisAllocateSpinLock(&pAd->BulkOutLock[5]);
NdisAllocateSpinLock(&pAd->BulkInLock);
for (num = 0; num < NUM_OF_TX_RING; num++)
{
NdisAllocateSpinLock(&pAd->TxContextQueueLock[num]);
}
#ifdef RALINK_ATE
NdisAllocateSpinLock(&pAd->GenericLock);
#endif // RALINK_ATE //
// NdisAllocateSpinLock(&pAd->MemLock); // Not used in RT28XX
// NdisAllocateSpinLock(&pAd->MacTabLock); // init it in UserCfgInit()
// NdisAllocateSpinLock(&pAd->BATabLock); // init it in BATableInit()
// for(num=0; num<MAX_LEN_OF_BA_REC_TABLE; num++)
// {
// NdisAllocateSpinLock(&pAd->BATable.BARecEntry[num].RxReRingLock);
// }
//
// Init Mac Table
//
// MacTableInitialize(pAd);
//
// Init send data structures and related parameters
//
Status = NICInitTransmit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
break;
//
// Init receive data structures and related parameters
//
Status = NICInitRecv(pAd);
if (Status != NDIS_STATUS_SUCCESS)
break;
pAd->PendingIoCount = 1;
} while (FALSE);
NdisZeroMemory(&pAd->FragFrame, sizeof(FRAGMENT_FRAME));
pAd->FragFrame.pFragPacket = RTMP_AllocateFragPacketBuffer(pAd, RX_BUFFER_NORMSIZE);
if (pAd->FragFrame.pFragPacket == NULL)
{
Status = NDIS_STATUS_RESOURCES;
}
DBGPRINT_S(Status, ("<-- RTMPAllocTxRxRingMemory, Status=%x\n", Status));
return Status;
}
