static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
{
int gpio;
struct nmk_gpio_chip *nmk_chip;
unsigned long flags;
u32 bitmask;
gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
nmk_chip = irq_data_get_irq_chip_data(d);
bitmask = nmk_gpio_get_bitmask(gpio);
if (!nmk_chip)
return -EINVAL;
if (enable)
nmk_chip->enabled |= bitmask;
else
nmk_chip->enabled &= ~bitmask;
spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
spin_lock(&nmk_chip->lock);
__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, enable);
if (!(nmk_chip->real_wake & bitmask))
__nmk_gpio_set_wake(nmk_chip, gpio, enable);
spin_unlock(&nmk_chip->lock);
spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
return 0;
}
static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
{
struct nmk_gpio_chip *nmk_chip;
unsigned long flags;
u32 bitmask;
int gpio;
gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
nmk_chip = irq_data_get_irq_chip_data(d);
if (!nmk_chip)
return -EINVAL;
bitmask = nmk_gpio_get_bitmask(gpio);
spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
spin_lock(&nmk_chip->lock);
if (!(nmk_chip->enabled & bitmask))
__nmk_gpio_set_wake(nmk_chip, gpio, on);
if (on)
nmk_chip->real_wake |= bitmask;
else
nmk_chip->real_wake &= ~bitmask;
spin_unlock(&nmk_chip->lock);
spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
return 0;
}
static void nmk_gpio_irq_unmask(unsigned int irq)
{
int gpio;
struct nmk_gpio_chip *nmk_chip;
unsigned long flags;
u32 bitmask, reg;
gpio = NOMADIK_IRQ_TO_GPIO(irq);
nmk_chip = get_irq_chip_data(irq);
bitmask = nmk_gpio_get_bitmask(gpio);
if (!nmk_chip)
return;
/* we must individually set the two edges */
spin_lock_irqsave(&nmk_chip->lock, flags);
if (nmk_chip->edge_rising & bitmask) {
reg = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
reg |= bitmask;
writel(reg, nmk_chip->addr + NMK_GPIO_RWIMSC);
}
if (nmk_chip->edge_falling & bitmask) {
reg = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
reg |= bitmask;
writel(reg, nmk_chip->addr + NMK_GPIO_FWIMSC);
}
spin_unlock_irqrestore(&nmk_chip->lock, flags);
}
static void nmk_gpio_irq_ack(struct irq_data *d)
{
int gpio;
struct nmk_gpio_chip *nmk_chip;
gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
nmk_chip = irq_data_get_irq_chip_data(d);
if (!nmk_chip)
return;
writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
}
static void nmk_gpio_irq_ack(unsigned int irq)
{
int gpio;
struct nmk_gpio_chip *nmk_chip;
gpio = NOMADIK_IRQ_TO_GPIO(irq);
nmk_chip = get_irq_chip_data(irq);
if (!nmk_chip)
return;
writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
}
static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
{
bool enabled = !irqd_irq_disabled(d);
bool wake = irqd_is_wakeup_set(d);
int gpio;
struct nmk_gpio_chip *nmk_chip;
unsigned long flags;
u32 bitmask;
gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
nmk_chip = irq_data_get_irq_chip_data(d);
bitmask = nmk_gpio_get_bitmask(gpio);
if (!nmk_chip)
return -EINVAL;
if (type & IRQ_TYPE_LEVEL_HIGH)
return -EINVAL;
if (type & IRQ_TYPE_LEVEL_LOW)
return -EINVAL;
clk_enable(nmk_chip->clk);
spin_lock_irqsave(&nmk_chip->lock, flags);
if (enabled)
__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
if (enabled || wake)
__nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
nmk_chip->edge_rising &= ~bitmask;
if (type & IRQ_TYPE_EDGE_RISING)
nmk_chip->edge_rising |= bitmask;
nmk_chip->edge_falling &= ~bitmask;
if (type & IRQ_TYPE_EDGE_FALLING)
nmk_chip->edge_falling |= bitmask;
if (enabled)
__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
if (enabled || wake)
__nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
spin_unlock_irqrestore(&nmk_chip->lock, flags);
clk_disable(nmk_chip->clk);
return 0;
}
static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
{
int gpio;
struct nmk_gpio_chip *nmk_chip;
unsigned long flags;
u32 bitmask;
gpio = NOMADIK_IRQ_TO_GPIO(irq);
nmk_chip = get_irq_chip_data(irq);
bitmask = nmk_gpio_get_bitmask(gpio);
if (!nmk_chip)
return -EINVAL;
if (type & IRQ_TYPE_LEVEL_HIGH)
return -EINVAL;
if (type & IRQ_TYPE_LEVEL_LOW)
return -EINVAL;
spin_lock_irqsave(&nmk_chip->lock, flags);
nmk_chip->edge_rising &= ~bitmask;
if (type & IRQ_TYPE_EDGE_RISING)
nmk_chip->edge_rising |= bitmask;
writel(nmk_chip->edge_rising, nmk_chip->addr + NMK_GPIO_RIMSC);
nmk_chip->edge_falling &= ~bitmask;
if (type & IRQ_TYPE_EDGE_FALLING)
nmk_chip->edge_falling |= bitmask;
writel(nmk_chip->edge_falling, nmk_chip->addr + NMK_GPIO_FIMSC);
spin_unlock_irqrestore(&nmk_chip->lock, flags);
nmk_gpio_irq_unmask(irq);
return 0;
}