/**
* @brief Writes a half-word to the NOR memory.
* This function returns the NOR memory status after block erase operation.
* @param uwWriteAddress : NOR memory internal address to write to.
* uhData : Data to write.
* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
* or NOR_TIMEOUT.
*/
NOR_Status NOR_WriteHalfWord(uint32_t uwWriteAddress, uint16_t uhData)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00A0);
NOR_WRITE((NOR_BANK_ADDR + uwWriteAddress), uhData);
return (NOR_GetStatus(PROGRAM_TIMEOUT));
}
/******************************************************************************
* Function Name : FSMC_NOR_WriteHalfWord
* Description : Writes a half-word to the NOR memory.
* Input : - WriteAddr : NOR memory internal address to write to.
* - Data : Data to write.
* Output : None
* Return : NOR_Status:The returned value can be: NOR_SUCCESS, NOR_ERROR
* or NOR_TIMEOUT
*******************************************************************************/
NOR_Status FSMC_NOR_WriteHalfWord(uint32_t WriteAddr, uint16_t Data)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00A0);
NOR_WRITE((Bank1_NOR2_ADDR + WriteAddr), Data);
return (FSMC_NOR_GetStatus(Program_Timeout));
}
/**
* @brief Reads a half-word buffer from the NOR memory.
* @param hnor: pointer to the NOR handle
* @param uwAddress: NOR memory internal address to read from.
* @param pData: pointer to the buffer that receives the data read from the
* NOR memory.
* @param uwBufferSize : number of Half word to read.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
{
uint32_t deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceaddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceaddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceaddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceaddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Send read data command */
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
NOR_WRITE(uwAddress, 0x00F0);
/* Read buffer */
while( uwBufferSize > 0)
{
*pData++ = *(__IO uint16_t *)uwAddress;
uwAddress += 2;
uwBufferSize--;
}
/* Check the NOR controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/******************************************************************************
* Function Name : FSMC_NOR_ReadID
* Description : Reads NOR memory's Manufacturer and Device Code.
* Input : - NOR_ID: pointer to a NOR_IDTypeDef structure which will hold
* the Manufacturer and Device Code.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NOR_ReadID(NOR_IDTypeDef* NOR_ID)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0090);
NOR_ID->Manufacturer_Code = *(__IO uint16_t *) ADDR_SHIFT(0x0000);
NOR_ID->Device_Code1 = *(__IO uint16_t *) ADDR_SHIFT(0x0001);
NOR_ID->Device_Code2 = *(__IO uint16_t *) ADDR_SHIFT(0x000E);
NOR_ID->Device_Code3 = *(__IO uint16_t *) ADDR_SHIFT(0x000F);
}
/**
* @brief Returns the NOR memory to Read mode and resets the errors in the NOR
* memory Status Register.
* @param None
* @retval NOR_SUCCESS
*/
NOR_Status NOR_Reset(void)
{
NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x002AA), 0x0055);
/* Send read mode command */
NOR_WRITE(NOR_BANK_ADDR, 0x00F0);
/* Return status success operation */
return (NOR_SUCCESS);
}
/**
* @brief Reads a half-word from the NOR memory.
* @param uwReadAddress : NOR memory internal address to read from.
* @retval Half-word read from the NOR memory.
*/
uint16_t NOR_ReadHalfWord(uint32_t uwReadAddress)
{
NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x002AA), 0x0055);
/* Send read data command */
NOR_WRITE((NOR_BANK_ADDR + uwReadAddress), 0x00F0 );
/* Return the data read */
return (*(__IO uint16_t *)((NOR_BANK_ADDR + uwReadAddress)));
}
/**
* @brief Read NOR flash IDs
* @param hnor: pointer to the NOR handle
* @param pNOR_ID : pointer to NOR ID structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
{
uint32_t deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceaddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceaddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceaddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceaddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Send read ID command */
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT);
/* Read the NOR IDs */
pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, MC_ADDRESS);
pNOR_ID->Device_Code1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, DEVICE_CODE1_ADDR);
pNOR_ID->Device_Code2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, DEVICE_CODE2_ADDR);
pNOR_ID->Device_Code3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, DEVICE_CODE3_ADDR);
/* Check the NOR controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/**
* @brief Reads a block of data from the FMC NOR memory.
* @param pBuffer: pointer to the buffer that receives the data read from the
* NOR memory.
* @param uwReadAddress: NOR memory internal address to read from.
* @param uwBufferSize : number of Half word to read.
* @retval None
*/
void NOR_ReadBuffer(uint16_t* pBuffer, uint32_t uwReadAddress, uint32_t uwBufferSize)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE((NOR_BANK_ADDR + uwReadAddress), 0x00F0);
for(; uwBufferSize != 0x00; uwBufferSize--) /* while there is data to read */
{
/* Read a Halfword from the NOR */
*pBuffer++ = *(__IO uint16_t *)((NOR_BANK_ADDR + uwReadAddress));
uwReadAddress = uwReadAddress + 2;
}
}
/*******************************************************************************
* Function Name : FSMC_NOR_ReadBuffer
* Description : Reads a block of data from the FSMC NOR memory.
* Input : - pBuffer : pointer to the buffer that receives the data read
* from the NOR memory.
* - ReadAddr : NOR memory internal address to read from.
* - NumHalfwordToRead : number of Half word to read.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NOR_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE((Bank1_NOR2_ADDR + ReadAddr), 0x00F0);
for(; NumHalfwordToRead != 0x00; NumHalfwordToRead--) /* while there is data to read */
{
/* Read a Halfword from the NOR */
*pBuffer++ = *(__IO uint16_t *)((Bank1_NOR2_ADDR + ReadAddr));
ReadAddr = ReadAddr + 2;
}
}
/**
* @brief Read data from NOR memory
* @param hnor: pointer to the NOR handle
* @param pAddress: pointer to Device address
* @param pData : pointer to read data
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
{
uint32_t deviceAddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceAddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceAddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceAddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceAddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Send read data command */
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, 0x00555), 0x00AA);
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, 0x002AA), 0x0055);
NOR_WRITE(pAddress, 0x00F0);
/* Read the data */
*pData = *(__IO uint32_t *)pAddress;
/* Check the NOR controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/**
* @brief Program data to NOR memory
* @param hnor: pointer to the NOR handle
* @param pAddress: Device address
* @param pData : pointer to the data to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
{
uint32_t deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceaddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceaddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceaddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceaddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Send program data command */
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);
/* Write the data */
NOR_WRITE(pAddress, *pData);
/* Check the NOR controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/**
* @brief Read data from NOR memory.
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param pAddress: pointer to Device address
* @param pData : pointer to read data
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
{
uint32_t deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceaddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceaddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceaddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceaddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Send read data command */
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
NOR_WRITE((uint32_t)pAddress, NOR_CMD_DATA_READ_RESET);
/* Read the data */
*pData = *(__IO uint32_t *)(uint32_t)pAddress;
/* Check the NOR controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/*
*********************************************************************************************************
* 函 数 名: NOR_ReadID
* 功能说明: 读取NOR Flash的器件ID
* 形 参: 无
* 返 回 值: 器件ID,32Bit, 高8bit 是Manufacturer_Code, 低24bit是器件ID
*********************************************************************************************************
*/
uint32_t NOR_ReadID(void)
{
uint32_t uiID;
uint8_t id1, id2, id3, id4;
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0090);
id1 = *(__IO uint16_t *) ADDR_SHIFT(0x0000);
id2 = *(__IO uint16_t *) ADDR_SHIFT(0x0001);
id3 = *(__IO uint16_t *) ADDR_SHIFT(0x000E);
id4 = *(__IO uint16_t *) ADDR_SHIFT(0x000F);
uiID = ((uint32_t)id1 << 24) | ((uint32_t)id2 << 16) | ((uint32_t)id3 << 8) | id4;
NOR_WRITE(NOR_FLASH_ADDR, 0x00F0 ); /* 退出ID模式 */
return uiID;
}
/**
* @brief Writes a half-word buffer to the FMC NOR memory. This function
* must be used only with S29GL128P NOR memory.
* @param pBuffer : pointer to buffer.
* uwWriteAddress : NOR memory internal address from which the data
* will be written.
* uwBufferSize : number of Half words to write. The maximum allowed
* value is 32 Half words (64 bytes).
* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
* or NOR_TIMEOUT.
*/
NOR_Status NOR_ProgramBuffer(uint16_t* pBuffer, uint32_t uwWriteAddress, uint32_t uwBufferSize)
{
uint32_t lastloadedaddress = 0;
uint32_t currentaddress = 0;
uint32_t endaddress = 0;
/* Initialize variables */
currentaddress = uwWriteAddress;
endaddress = uwWriteAddress + uwBufferSize - 1;
lastloadedaddress = uwWriteAddress;
/* Issue unlock command sequence */
NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
/* Write Buffer Load Command */
NOR_WRITE(ADDR_SHIFT(uwWriteAddress), 0x0025);
NOR_WRITE(ADDR_SHIFT(uwWriteAddress), (uwBufferSize - 1));
/* Load Data into NOR Buffer */
while(currentaddress <= endaddress)
{
/* Store last loaded address & data value (for polling) */
lastloadedaddress = currentaddress;
NOR_WRITE(ADDR_SHIFT(currentaddress), *pBuffer++);
currentaddress += 1;
}
NOR_WRITE(ADDR_SHIFT(lastloadedaddress), 0x29);
return(NOR_GetStatus(PROGRAM_TIMEOUT));
}
/*******************************************************************************
* Function Name : FSMC_NOR_ProgramBuffer
* Description : Writes a half-word buffer to the FSMC NOR memory. This function
* must be used only with S29GL128P NOR memory.
* Input : - pBuffer : pointer to buffer.
* - WriteAddr: NOR memory internal address from which the data
* will be written.
* - NumHalfwordToWrite: number of Half words to write.
* The maximum allowed value is 32 Half words (64 bytes).
* Output : None
* Return : NOR_Status:The returned value can be: NOR_SUCCESS, NOR_ERROR
* or NOR_TIMEOUT
*******************************************************************************/
NOR_Status FSMC_NOR_ProgramBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite)
{
uint32_t lastloadedaddress = 0x00;
uint32_t currentaddress = 0x00;
uint32_t endaddress = 0x00;
/* Initialize variables */
currentaddress = WriteAddr;
endaddress = WriteAddr + NumHalfwordToWrite - 1;
lastloadedaddress = WriteAddr;
/* Issue unlock command sequence */
NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
/* Write Write Buffer Load Command */
NOR_WRITE(ADDR_SHIFT(WriteAddr), 0x0025);
NOR_WRITE(ADDR_SHIFT(WriteAddr), (NumHalfwordToWrite - 1));
/* Load Data into NOR Buffer */
while(currentaddress <= endaddress)
{
/* Store last loaded address & data value (for polling) */
lastloadedaddress = currentaddress;
NOR_WRITE(ADDR_SHIFT(currentaddress), *pBuffer++);
currentaddress += 1;
}
NOR_WRITE(ADDR_SHIFT(lastloadedaddress), 0x29);
return(FSMC_NOR_GetStatus(Program_Timeout));
}
/**
* @brief Read NOR flash CFI IDs
* @param hnor: pointer to the NOR handle
* @param pNOR_CFI : pointer to NOR CFI IDs structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
{
uint32_t deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceaddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceaddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceaddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceaddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Send read CFI query command */
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
/* read the NOR CFI information */
pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI1_ADDRESS);
pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI2_ADDRESS);
pNOR_CFI->CFI_3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI3_ADDRESS);
pNOR_CFI->CFI_4 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI4_ADDRESS);
/* Check the NOR controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/**
* @brief Erases the entire chip.
* @param None
* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
* or NOR_TIMEOUT
*/
NOR_Status NOR_EraseChip(void)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0010);
return (NOR_GetStatus(CHIPERASE_TIMEOUT));
}
/*******************************************************************************
* Function Name : FSMC_NOR_EraseBlock
* Description : Erases the specified Nor memory block.
* Input : - BlockAddr: address of the block to erase.
* Output : None
* Return : NOR_Status:The returned value can be: NOR_SUCCESS, NOR_ERROR
* or NOR_TIMEOUT
*******************************************************************************/
NOR_Status FSMC_NOR_EraseBlock(uint32_t BlockAddr)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE((Bank1_NOR2_ADDR + BlockAddr), 0x30);
return (FSMC_NOR_GetStatus(BlockErase_Timeout));
}
/**
* @brief Performs a block erase operation giving its address.
* This function returns the NOR memory status after block erase operation.
* @param uwBlockAddress: Address of the block to erase.
* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
* or NOR_TIMEOUT.
*/
NOR_Status NOR_EraseBlock(uint32_t uwBlockAddress)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE((NOR_BANK_ADDR + uwBlockAddress), 0x30);
return (NOR_GetStatus(BLOCKERASE_TIMEOUT));
}
/*
*********************************************************************************************************
* 函 数 名: NOR_EraseSector
* 功能说明: 擦除NOR Flash指定的扇区
* 形 参: 扇区地址
* 返 回 值: NOR_SUCCESS, NOR_ERROR, NOR_TIMEOUT
*********************************************************************************************************
*/
uint8_t NOR_EraseSector(uint32_t _uiBlockAddr)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE((NOR_FLASH_ADDR + _uiBlockAddr), 0x30);
return (NOR_GetStatus(BlockErase_Timeout));
}
/*
*********************************************************************************************************
* 函 数 名: NOR_StartEraseChip
* 功能说明: 开始擦除NOR Flash整个芯片， 不等待结束
* 形 参: 无
* 返 回 值: 0表示成功
*********************************************************************************************************
*/
void NOR_StartEraseChip(void)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0010);
NOR_GetStatus(1000);
}
/*
*********************************************************************************************************
* 函 数 名: NOR_EraseChip
* 功能说明: 擦除NOR Flash整个芯片
* 形 参: 无
* 返 回 值: 0表示成功
*********************************************************************************************************
*/
uint8_t NOR_EraseChip(void)
{
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
NOR_WRITE(ADDR_SHIFT(0x0555), 0x0010);
return (NOR_GetStatus(ChipErase_Timeout));
}
/**
* @brief Erase the entire NOR chip.
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param Address : Device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
{
uint32_t deviceaddress = 0;
/* Prevent unused argument(s) compilation warning */
UNUSED(Address);
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceaddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceaddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceaddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceaddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Send NOR chip erase command sequence */
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE);
/* Check the NOR memory status and update the controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/**
* @brief Erase the specified block of the NOR memory
* @param hnor: pointer to the NOR handle
* @param BlockAddress : Block to erase address
* @param Address: Device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
{
uint32_t deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceaddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceaddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceaddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceaddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Send block erase command sequence */
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE);
/* Check the NOR memory status and update the controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/**
* @brief Erase the specified block of the NOR memory
* @param hnor: pointer to the NOR handle
* @param BlockAddress : Block to erase address
* @param Address: Device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
{
uint32_t deviceAddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceAddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceAddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceAddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceAddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Send block erase command sequence */
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, 0x0555), 0x00AA);
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, 0x02AA), 0x0055);
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, 0x0555), 0x0080);
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, 0x0555), 0x00AA);
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, 0x02AA), 0x0055);
NOR_WRITE((uint32_t)(BlockAddress + Address), 0x30);
/* Check the NOR memory status and update the controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/**
* @brief Returns the NOR memory to Read mode.
* @param hnor: pointer to the NOR handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
{
uint32_t deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceaddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceaddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceaddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceaddress = NOR_MEMORY_ADRESS4;
}
NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET);
/* Check the NOR controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/******************************************************************************
* Function Name : FSMC_NOR_ReturnToReadMode
* Description : Returns the NOR memory to Read mode.
* Input : None
* Output : None
* Return : NOR_SUCCESS
*******************************************************************************/
NOR_Status FSMC_NOR_ReturnToReadMode(void)
{
NOR_WRITE(Bank1_NOR2_ADDR, 0x00F0);
return (NOR_SUCCESS);
}
/**
* @brief Writes a half-word buffer to the NOR memory. This function must be used
only with S29GL128P NOR memory.
* @param hnor: pointer to the NOR handle
* @param uwAddress: NOR memory internal start write address
* @param pData: pointer to source data buffer.
* @param uwBufferSize: Size of the buffer to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
{
uint16_t * p_currentaddress = (uint16_t *)NULL;
uint16_t * p_endaddress = (uint16_t *)NULL;
uint32_t lastloadedaddress = 0, deviceaddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceaddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceaddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceaddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceaddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Initialize variables */
p_currentaddress = (uint16_t*)((uint32_t)(uwAddress));
p_endaddress = p_currentaddress + (uwBufferSize-1);
lastloadedaddress = (uint32_t)(uwAddress);
/* Issue unlock command sequence */
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
/* Write Buffer Load Command */
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG);
NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, uwAddress), (uwBufferSize - 1));
/* Load Data into NOR Buffer */
while(p_currentaddress <= p_endaddress)
{
/* Store last loaded address & data value (for polling) */
lastloadedaddress = (uint32_t)p_currentaddress;
NOR_WRITE(p_currentaddress, *pData++);
p_currentaddress ++;
}
NOR_WRITE((uint32_t)(lastloadedaddress), NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM);
/* Check the NOR controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/**
* @brief Writes a half-word buffer to the NOR memory. This function must be used
only with S29GL128P NOR memory.
* @param hnor: pointer to the NOR handle
* @param uwAddress: NOR memory internal start write address
* @param pData: pointer to source data buffer.
* @param uwBufferSize: Size of the buffer to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
{
uint32_t lastloadedaddress = 0;
uint32_t currentaddress = 0;
uint32_t endaddress = 0;
uint32_t deviceAddress = 0;
/* Process Locked */
__HAL_LOCK(hnor);
/* Check the NOR controller state */
if(hnor->State == HAL_NOR_STATE_BUSY)
{
return HAL_BUSY;
}
/* Select the NOR device address */
if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
{
deviceAddress = NOR_MEMORY_ADRESS1;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
{
deviceAddress = NOR_MEMORY_ADRESS2;
}
else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
{
deviceAddress = NOR_MEMORY_ADRESS3;
}
else /* FMC_NORSRAM_BANK4 */
{
deviceAddress = NOR_MEMORY_ADRESS4;
}
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_BUSY;
/* Initialize variables */
currentaddress = uwAddress;
endaddress = uwAddress + uwBufferSize - 1;
lastloadedaddress = uwAddress;
/* Issue unlock command sequence */
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, 0x0555), 0x00AA);
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, 0x02AA), 0x0055);
/* Write Buffer Load Command */
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, uwAddress), 0x25);
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, uwAddress), (uwBufferSize - 1));
/* Load Data into NOR Buffer */
while(currentaddress <= endaddress)
{
/* Store last loaded address & data value (for polling) */
lastloadedaddress = currentaddress;
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, currentaddress), *pData++);
currentaddress += 1;
}
NOR_WRITE(NOR_ADDR_SHIFT(deviceAddress, NOR_MEMORY_8B, lastloadedaddress), 0x29);
/* Check the NOR controller state */
hnor->State = HAL_NOR_STATE_READY;
/* Process unlocked */
__HAL_UNLOCK(hnor);
return HAL_OK;
}
/*
*********************************************************************************************************
* 函 数 名: NOR_QuitToReadStatus
* 功能说明: 复位NOR，退到读状态
* 形 参: 无
* 返 回 值: 无
*********************************************************************************************************
*/
static void NOR_QuitToReadStatus(void)
{
NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA);
NOR_WRITE(ADDR_SHIFT(0x002AA), 0x0055);
NOR_WRITE(NOR_FLASH_ADDR, 0x00F0 );
}