static void esky_init2()
{
NRF24L01_FlushTx();
packet_sent = 0;
rf_ch_num = 0;
u32 channel_ord = rand32_r(0, 0) % 74;
channel_code = 10 + (u8) channel_ord;
u8 channel1, channel2;
channel1 = 10 + (u8) ((37 + channel_ord*5) % 74);
channel2 = 10 + (u8) ((channel_ord*5) % 74) ;
printf("channel code %d, channel1 %d, channel2 %d\n", (int) channel_code, (int) channel1, (int) channel2);
rf_channels[0] = channel1;
rf_channels[1] = channel1;
rf_channels[2] = channel1;
rf_channels[3] = channel2;
rf_channels[4] = channel2;
rf_channels[5] = channel2;
end_bytes[0] = 6;
end_bytes[1] = channel1*2;
end_bytes[2] = channel2*2;
end_bytes[3] = 6;
end_bytes[4] = channel1*2;
end_bytes[5] = channel2*2;
// Turn radio power on
NRF24L01_SetTxRxMode(TX_EN);
u8 config = BV(NRF24L01_00_EN_CRC) | BV(NRF24L01_00_CRCO) | BV(NRF24L01_00_PWR_UP);
NRF24L01_WriteReg(NRF24L01_00_CONFIG, config);
// Implicit delay in callback
// delayMicroseconds(150);
}
//Send a packet and receive the ACK
//Return true in case of success.
//Polling implementation
unsigned char NRF24L01_SendPacket(char *payload, char len, char *ackPayload, char *ackLen)
{
char status = 0;
//Send the packet
NRF24L01_TxPacket(payload, len);
//Wait for something to happen
while(((status=NRF24L01_Nop())&0x70) == 0);
// Clear the flags
NRF24L01_WriteReg(REG_STATUS, 0x70);
//Return FALSE if the packet has not been transmited
if (status&BIT_MAX_RT) {
NRF24L01_FlushTx();
return 0;
}
//Receive the ackPayload if any has been received
if (status&BIT_RX_DR)
*ackLen = NRF24L01_RxPacket(ackPayload);
else
*ackLen = 0;
NRF24L01_FlushRx();
return status&BIT_TX_DS;
}
void send_packet()
{
u32 temp;
for(u8 ch=0;ch<8;ch++)
{
temp=((s32)Channels[ch] * 0x1f1 / CHAN_MAX_VALUE + 0x5d9)<<3;
packet[2*ch]=temp>>8;
packet[2*ch+1]=temp;
}
for(u8 i=0; i<ADDRESS_LENGTH; i++)
packet[16+i]=packet[23-i];
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
NRF24L01_FlushTx();
NRF24L01_WritePayload(packet, PACKET_SIZE);
// Check and adjust transmission power. We do this after
// transmission to not bother with timeout after power
// settings change - we have plenty of time until next
// packet.
if (tx_power != Model.tx_power) {
//Keep transmit power updated
tx_power = Model.tx_power;
NRF24L01_SetPower(tx_power);
}
}
static void v202Nrf24Setup(rx_spi_protocol_e protocol)
{
NRF24L01_Initialize(BV(NRF24L01_00_CONFIG_EN_CRC) | BV(NRF24L01_00_CONFIG_CRCO)); // 2-bytes CRC
NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknowledgment
NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, BV(NRF24L01_02_EN_RXADDR_ERX_P0)); // Enable data pipe 0
NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, NRF24L01_03_SETUP_AW_5BYTES); // 5-byte RX/TX address
NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0xFF); // 4ms retransmit t/o, 15 tries
if (protocol == RX_SPI_NRF24_V202_250K) {
NRF24L01_WriteReg(NRF24L01_06_RF_SETUP, NRF24L01_06_RF_SETUP_RF_DR_250Kbps | NRF24L01_06_RF_SETUP_RF_PWR_n12dbm);
} else {
NRF24L01_WriteReg(NRF24L01_06_RF_SETUP, NRF24L01_06_RF_SETUP_RF_DR_1Mbps | NRF24L01_06_RF_SETUP_RF_PWR_n12dbm);
}
NRF24L01_WriteReg(NRF24L01_07_STATUS, BV(NRF24L01_07_STATUS_RX_DR) | BV(NRF24L01_07_STATUS_TX_DS) | BV(NRF24L01_07_STATUS_MAX_RT)); // Clear data ready, data sent, and retransmit
NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, V2X2_PAYLOAD_SIZE); // bytes of data payload for pipe 0
NRF24L01_WriteReg(NRF24L01_17_FIFO_STATUS, 0x00); // Just in case, no real bits to write here
#define RX_TX_ADDR_LEN 5
const uint8_t rx_tx_addr[RX_TX_ADDR_LEN] = {0x66, 0x88, 0x68, 0x68, 0x68};
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, rx_tx_addr, RX_TX_ADDR_LEN);
NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, rx_tx_addr, RX_TX_ADDR_LEN);
NRF24L01_FlushTx();
NRF24L01_FlushRx();
rf_ch_num = 0;
bind_phase = PHASE_NOT_BOUND;
prepare_to_bind();
switch_channel();
NRF24L01_SetRxMode(); // enter receive mode to start listening for packets
}
static void send_search_packet()
{
uint8_t buf[1];
buf[0] = 0xff;
// clear packet status bits and TX FIFO
NRF24L01_WriteReg(NRF24L01_07_STATUS, (BV(NRF24L01_07_TX_DS) | BV(NRF24L01_07_MAX_RT)));
NRF24L01_FlushTx();
if (rf_channel++ > 125) {
rf_channel = 0;
switch(data_rate) {
case NRF24L01_BR_250K:
data_rate = NRF24L01_BR_1M;
break;
case NRF24L01_BR_1M:
data_rate = NRF24L01_BR_2M;
break;
case NRF24L01_BR_2M:
data_rate = NRF24L01_BR_250K;
break;
}
}
set_rate_channel(data_rate, rf_channel);
NRF24L01_WritePayload(buf, sizeof(buf));
++packet_counter;
}
int NRF24L01_Reset()
{
NRF24L01_FlushTx();
NRF24L01_FlushRx();
u8 status1 = Strobe(NOP);
u8 status2 = NRF24L01_ReadReg(0x07);
NRF24L01_SetTxRxMode(TXRX_OFF);
return (status1 == status2 && (status1 & 0x0f) == 0x0e);
}
void initrx(void)
{
NRF24L01_Initialize();
reset_beken();
// 2-bytes CRC, radio off
uint8_t config = BV(NRF24L01_00_EN_CRC) | BV(NRF24L01_00_CRCO) | BV(NRF24L01_00_PRIM_RX);
NRF24L01_WriteReg(NRF24L01_00_CONFIG, config);
NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknoledgement
NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0
NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, 0x03); // 5-byte RX/TX address
NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0xFF); // 4ms retransmit t/o, 15 tries
// NRF24L01_WriteReg(NRF24L01_05_RF_CH, 0x08); // Channel 8 - bind
//NRF24L01_SetBitrate(NRF24L01_BR_1M); // 1Mbps
NRF24L01_SetBitrate(NRF24L01_BR_250K); //250k for longer range.
NRF24L01_SetPower(TXPOWER_100mW);
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, V2X2_PAYLOAD_SIZE); // bytes of data payload for pipe 0
NRF24L01_WriteReg(NRF24L01_17_FIFO_STATUS, 0x00); // Just in case, no real bits to write here
uint8_t rx_tx_addr[] = {0x66, 0x88, 0x68, 0x68, 0x68};
// uint8_t rx_p1_addr[] = {0x88, 0x66, 0x86, 0x86, 0x86};
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, rx_tx_addr, 5);
// NRF24L01_WriteRegisterMulti(NRF24L01_0B_RX_ADDR_P1, rx_p1_addr, 5);
NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, rx_tx_addr, 5);
initialize_beken();
lib_timers_delaymilliseconds(50);
NRF24L01_FlushTx();
NRF24L01_FlushRx();
rf_ch_num = 0;
// Turn radio power on
config |= BV(NRF24L01_00_PWR_UP);
NRF24L01_WriteReg(NRF24L01_00_CONFIG, config);
// delayMicroseconds(150);
lib_timers_delaymilliseconds(1); // 6 times more than needed
valid_packets = missed_packets = bad_packets = 0;
if (usersettings.boundprotocol == PROTO_NONE) {
bind_phase = PHASE_NOT_BOUND;
prepare_to_bind();
} else {
// Prepare to listen to bound protocol, if fails
// try to bind
bind_phase = PHASE_JUST_BOUND;
set_bound();
}
switch_channel();
}
static uint16_t esky150_init2()
{
NRF24L01_FlushTx();
NRF24L01_FlushRx();
packet_sent = 0;
packet_count = 0;
rf_ch_num = 0;
// Turn radio power on
NRF24L01_WriteReg(NRF24L01_00_CONFIG, CRC_CONFIG | BV(NRF24L01_00_PWR_UP));
// delayMicroseconds(150);
return 150u;
}
void init()
{
NRF24L01_Initialize();
NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, 0x02); // 4 bytes rx/tx address
NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, (u8 *)"\x80\x80\x80\xB8", ADDRESS_LENGTH); // Bind address
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, (u8 *)"\x80\x80\x80\xB8", ADDRESS_LENGTH); // Bind address
NRF24L01_FlushTx();
NRF24L01_FlushRx();
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknowldgement on all data pipes
NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 only
NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, PACKET_SIZE);
NRF24L01_SetPower(Model.tx_power);
}
static void DM002_init()
{
NRF24L01_Initialize();
NRF24L01_SetTxRxMode(TX_EN);
XN297_SetTXAddr((uint8_t *)"\x26\xA8\x67\x35\xCC", DM002_ADDRESS_SIZE);
NRF24L01_FlushTx();
NRF24L01_FlushRx();
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknowldgement on all data pipes
NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 only
NRF24L01_SetBitrate(NRF24L01_BR_1M); // 1Mbps
NRF24L01_SetPower(Model.tx_power);
// Check for Beken BK2421/BK2423 chip
// It is done by using Beken specific activate code, 0x53
// and checking that status register changed appropriately
// There is no harm to run it on nRF24L01 because following
// closing activate command changes state back even if it
// does something on nRF24L01
NRF24L01_Activate(0x53); // magic for BK2421 bank switch
dbgprintf("Trying to switch banks\n");
if (NRF24L01_ReadReg(NRF24L01_07_STATUS) & 0x80) {
dbgprintf("BK2421 detected\n");
// Beken registers don't have such nice names, so we just mention
// them by their numbers
// It's all magic, eavesdropped from real transfer and not even from the
// data sheet - it has slightly different values
NRF24L01_WriteRegisterMulti(0x00, (u8 *) "\x40\x4B\x01\xE2", 4);
NRF24L01_WriteRegisterMulti(0x01, (u8 *) "\xC0\x4B\x00\x00", 4);
NRF24L01_WriteRegisterMulti(0x02, (u8 *) "\xD0\xFC\x8C\x02", 4);
NRF24L01_WriteRegisterMulti(0x03, (u8 *) "\x99\x00\x39\x21", 4);
NRF24L01_WriteRegisterMulti(0x04, (u8 *) "\xD9\x96\x82\x1B", 4);
NRF24L01_WriteRegisterMulti(0x05, (u8 *) "\x24\x06\x7F\xA6", 4);
NRF24L01_WriteRegisterMulti(0x0C, (u8 *) "\x00\x12\x73\x00", 4);
NRF24L01_WriteRegisterMulti(0x0D, (u8 *) "\x46\xB4\x80\x00", 4);
NRF24L01_WriteRegisterMulti(0x04, (u8 *) "\xDF\x96\x82\x1B", 4);
NRF24L01_WriteRegisterMulti(0x04, (u8 *) "\xD9\x96\x82\x1B", 4);
} else {
dbgprintf("nRF24L01 detected\n");
}
NRF24L01_Activate(0x53); // switch bank back
}
// Helper for sending a packet
// Assumes packet data has been put in tx_packet
// and tx_payload_len has been set correctly
static void send_packet()
{
// clear packet status bits and Tx/Rx FIFOs
NRF24L01_WriteReg(NRF24L01_07_STATUS, (BV(NRF24L01_07_TX_DS) | BV(NRF24L01_07_MAX_RT)));
NRF24L01_FlushTx();
NRF24L01_FlushRx();
// Transmit the payload
NRF24L01_WritePayload(tx_packet, tx_payload_len);
++packet_counter;
// Check and adjust transmission power. We do this after
// transmission to not bother with timeout after power
// settings change - we have plenty of time until next
// packet.
if (tx_power != Model.tx_power) {
//Keep transmit power updated
tx_power = Model.tx_power;
NRF24L01_SetPower(tx_power);
}
}
static void send_packet(u8 bind)
{
union {
u16 value;
struct {
u8 lsb;
u8 msb;
} bytes;
} chanval;
if (bind) {
if (telemetry)
packet[0] = 0xa3;
else
packet[0] = 0xa4;
memcpy(&packet[1], rx_tx_addr, 5);
memcpy(&packet[6], rf_channels, 4);
switch (Model.proto_opts[PROTOOPTS_FORMAT]) {
case FORMAT_REGULAR:
packet[10] = txid[0];
packet[11] = txid[1];
break;
case FORMAT_X16_AH:
packet[10] = 0x00;
packet[11] = 0x00;
break;
case FORMAT_IRDRONE:
packet[10] = 0x30;
packet[11] = 0x01;
break;
}
} else {
switch (Model.proto_opts[PROTOOPTS_FORMAT]) {
case FORMAT_REGULAR:
packet[0] = 0xa5;
break;
case FORMAT_X16_AH:
case FORMAT_IRDRONE:
packet[0] = 0xa6;
break;
}
packet[1] = 0xfa; // normal mode is 0xf7, expert 0xfa
packet[2] = GET_FLAG(CHANNEL_FLIP, 0x08)
| GET_FLAG(CHANNEL_HEADLESS, 0x02)
| GET_FLAG(CHANNEL_RTH, 0x01)
| GET_FLAG(CHANNEL_VIDEO, 0x10)
| GET_FLAG(CHANNEL_PICTURE, 0x20);
packet[3] = GET_FLAG(CHANNEL_INVERTED, 0x80)
| GET_FLAG(CHANNEL_TO, 0x20)
| GET_FLAG(CHANNEL_EMGSTOP, 0x04);
chanval.value = scale_channel(CHANNEL1, 0x3ff, 0); // aileron
packet[4] = chanval.bytes.msb + DYNTRIM(chanval.value);
packet[5] = chanval.bytes.lsb;
chanval.value = scale_channel(CHANNEL2, 0, 0x3ff); // elevator
packet[6] = chanval.bytes.msb + DYNTRIM(chanval.value);
packet[7] = chanval.bytes.lsb;
chanval.value = scale_channel(CHANNEL3, 0, 0x3ff); // throttle
packet[8] = chanval.bytes.msb + 0x7c;
packet[9] = chanval.bytes.lsb;
chanval.value = scale_channel(CHANNEL4, 0x3ff, 0); // rudder
packet[10] = chanval.bytes.msb + DYNTRIM(chanval.value);
packet[11] = chanval.bytes.lsb;
}
switch (Model.proto_opts[PROTOOPTS_FORMAT]) {
case FORMAT_REGULAR:
packet[12] = txid[2];
packet[13] = 0x0a;
break;
case FORMAT_X16_AH:
packet[12] = 0x00;
packet[13] = 0x00;
break;
case FORMAT_IRDRONE:
packet[12] = 0xe0;
packet[13] = 0x2e;
break;
}
packet[14] = checksum();
NRF24L01_WriteReg(NRF24L01_05_RF_CH,
bind ? bind_chan : rf_channels[rf_chan++]);
rf_chan %= sizeof(rf_channels);
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70);
NRF24L01_FlushTx();
XN297_WritePayload(packet, PACKET_SIZE);
NRF24L01_SetTxRxMode(TXRX_OFF);
NRF24L01_SetTxRxMode(TX_EN);
// Power on, TX mode, 2byte CRC
// Why CRC0? xn297 does not interpret it - either 16-bit CRC or nothing
XN297_Configure(BV(NRF24L01_00_EN_CRC) | BV(NRF24L01_00_CRCO) |
BV(NRF24L01_00_PWR_UP));
if (telemetry) {
// switch radio to rx, no crc
NRF24L01_WriteReg(NRF24L01_00_CONFIG, 0x03);
}
// Check and adjust transmission power. We do this after
// transmission to not bother with timeout after power
// settings change - we have plenty of time until next
// packet.
if (tx_power != Model.tx_power) {
//Keep transmit power updated
tx_power = Model.tx_power;
NRF24L01_SetPower(tx_power);
}
#ifdef EMULATOR
dbgprintf("next chan 0x%02x, bind %d, data %02x",
bind ? bind_chan : rf_channels[rf_chan], bind,
packet[0]);
for (int i = 1; i < PACKET_SIZE; i++)
dbgprintf(" %02x", packet[i]);
dbgprintf("\n");
#endif
}
static void DM002_send_packet(u8 bind)
{
memcpy(&packet[5],(uint8_t *)"\x00\x7F\x7F\x7F\x00\x00\x00",7);
if(bind)
{
packet[0] = 0xAA;
packet[1] = rx_tx_addr[0];
packet[2] = rx_tx_addr[1];
packet[3] = rx_tx_addr[2];
packet[4] = rx_tx_addr[3];
}
else
{
packet[0]=0x55;
// Throttle : 0 .. 200
packet[1]=scale_channel(CHANNEL3,0,200);
// Other channels min 0x57, mid 0x7F, max 0xA7
packet[2] = scale_channel(CHANNEL4,0xA7,0x57); // rudder
packet[3] = scale_channel(CHANNEL1, 0xA7,0x57); // aileron
packet[4] = scale_channel(CHANNEL2, 0xA7, 0x57); // elevator
// Features
packet[9] = DM002_FLAG_HIGH // high rate
| GET_FLAG(CHANNEL_FLIP, DM002_FLAG_FLIP)
| GET_FLAG_INV(CHANNEL_LED, DM002_FLAG_LED)
| GET_FLAG(CHANNEL_CAMERA1, DM002_FLAG_CAMERA1)
| GET_FLAG(CHANNEL_CAMERA2, DM002_FLAG_CAMERA2)
| GET_FLAG(CHANNEL_HEADLESS,DM002_FLAG_HEADLESS)
| GET_FLAG(CHANNEL_RTH, DM002_FLAG_RTH);
// Packet counter
if(packet_count&0x03)
{
packet_count++;
hopping_frequency_no++;
hopping_frequency_no&=4;
}
packet_count&=0x0F;
packet[10] = packet_count;
packet_count++;
}
//CRC
for(uint8_t i=0;i<DM002_PACKET_SIZE-1;i++)
packet[11]+=packet[i];
// Power on, TX mode, 2byte CRC
// Why CRC0? xn297 does not interpret it - either 16-bit CRC or nothing
XN297_Configure(BV(NRF24L01_00_EN_CRC) | BV(NRF24L01_00_CRCO) | BV(NRF24L01_00_PWR_UP));
if (bind)
NRF24L01_WriteReg(NRF24L01_05_RF_CH, DM002_RF_BIND_CHANNEL);
else
NRF24L01_WriteReg(NRF24L01_05_RF_CH, hopping_frequency[hopping_frequency_no]);
// clear packet status bits and TX FIFO
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70);
NRF24L01_FlushTx();
XN297_WritePayload(packet, DM002_PACKET_SIZE);
if (tx_power != Model.tx_power) {
//Keep transmit power updated
tx_power = Model.tx_power;
NRF24L01_SetPower(tx_power);
}
}
