Beispiel #1
0
VOID
NbInitDceSclkClockGating (
  IN      NB_CLK_GATING_CTRL  *NbClkGatingCtrl,
  IN      GNB_PLATFORM_CONFIG *Gnb
  )
{
  BOOLEAN               Dce_Sclk_Gating;
  FCRxFF30_0134_STRUCT  FCRxFF30_0134;
  FCRxFF30_01F4_STRUCT  FCRxFF30_01F4;

  Dce_Sclk_Gating = NbClkGatingCtrl->Dce_Sclk_Gating;

//GMMx4D0[SymclkbGateDisable, SymclkaGateDisable, SclkGateDisable]
  NbSmuSrbmRegisterRead (FCRxFF30_0134_ADDRESS, &FCRxFF30_0134.Value, Gnb->StdHeader);
  FCRxFF30_0134.Field.SclkGateDisable = Dce_Sclk_Gating ? 0 : 1;
  FCRxFF30_0134.Field.SymclkaGateDisable = Dce_Sclk_Gating ? 0 : 1;
  FCRxFF30_0134.Field.SymclkbGateDisable = Dce_Sclk_Gating ? 0 : 1;
  NbSmuSrbmRegisterWrite (FCRxFF30_0134_ADDRESS, &FCRxFF30_0134.Value, TRUE, Gnb->StdHeader);

//FCRxFF30_01F4[CgDcCgttSclkOverride]
  NbSmuSrbmRegisterRead (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, Gnb->StdHeader);
  FCRxFF30_01F4.Field.CgDcCgttSclkOverride = 0;
  NbSmuSrbmRegisterWrite (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, TRUE, Gnb->StdHeader);

}
Beispiel #2
0
VOID
NbInitClockGating (
  IN      GNB_PLATFORM_CONFIG *Gnb
  )
{
  NB_CLK_GATING_CTRL NbClkGatingCtrl;

  //Init the default value of control structure.
  NbClkGatingCtrl.Smu_Sclk_Gating = GnbBuildOptions.SmuSclkClockGatingEnable;
  NbClkGatingCtrl.Smu_Lclk_Gating = TRUE;
  NbClkGatingCtrl.Orb_Sclk_Gating = TRUE;
  NbClkGatingCtrl.Orb_Lclk_Gating = TRUE;
  NbClkGatingCtrl.Ioc_Sclk_Gating = TRUE;
  NbClkGatingCtrl.Ioc_Lclk_Gating = TRUE;
  NbClkGatingCtrl.Bif_Sclk_Gating = TRUE;
  NbClkGatingCtrl.Gmc_Sclk_Gating = TRUE;
  NbClkGatingCtrl.Dce_Sclk_Gating = TRUE;
  NbClkGatingCtrl.Dce_Dispclk_Gating = TRUE;

  NbFmNbClockGating (&NbClkGatingCtrl, Gnb->StdHeader);

  IDS_OPTION_HOOK (IDS_GNB_CLOCK_GATING, &NbClkGatingCtrl, Gnb->StdHeader);


  IDS_HDT_CONSOLE (GNB_TRACE, "NbInitClockGating Enter\n");

//SMU SCLK/LCLK clock gating
  NbInitSmuClockGating (&NbClkGatingCtrl, Gnb);

// ORB clock gating
  NbInitOrbClockGating (&NbClkGatingCtrl, Gnb);

//IOC clock gating
  NbInitIocClockGating (&NbClkGatingCtrl, Gnb);

//BIF Clock Gating
  NbInitBifClockGating (&NbClkGatingCtrl, Gnb);

//GMC Clock Gating
  NbInitGmcClockGating (&NbClkGatingCtrl, Gnb);

//DCE Sclk clock gating
  NbInitDceSclkClockGating (&NbClkGatingCtrl, Gnb);

//DCE Display clock gating
  NbInitDceDisplayClockGating (&NbClkGatingCtrl, Gnb);

  GNB_DEBUG_CODE (
    {
      FCRxFF30_01F4_STRUCT  FCRxFF30_01F4;
      FCRxFF30_01F5_STRUCT  FCRxFF30_01F5;
      FCRxFF30_1512_STRUCT  FCRxFF30_1512;
      NbSmuSrbmRegisterRead (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, Gnb->StdHeader);
      NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader);
      NbSmuSrbmRegisterRead (FCRxFF30_1512_ADDRESS, &FCRxFF30_1512.Value, Gnb->StdHeader);
      IDS_HDT_CONSOLE (NB_MISC, "   Clock Gating FCRxFF30_01F4 - 0x%x\n", FCRxFF30_01F4.Value);
      IDS_HDT_CONSOLE (NB_MISC, "   Clock Gating FCRxFF30_01F5 - 0x%x\n", FCRxFF30_01F5.Value);
      IDS_HDT_CONSOLE (NB_MISC, "   Clock Gating FCRxFF30_1512 - 0x%x\n", FCRxFF30_1512.Value);
    }
    );
Beispiel #3
0
VOID
NbInitDceDisplayClockGating (
  IN      NB_CLK_GATING_CTRL  *NbClkGatingCtrl,
  IN      GNB_PLATFORM_CONFIG *Gnb
  )
{
  BOOLEAN               Dce_Dispclk_Gating;
  FCRxFF30_0134_STRUCT  FCRxFF30_0134;
  FCRxFF30_1B7C_STRUCT  FCRxFF30_1B7C;
  FCRxFF30_1E7C_STRUCT  FCRxFF30_1E7C;
  FCRxFF30_01F5_STRUCT  FCRxFF30_01F5;

  Dce_Dispclk_Gating = NbClkGatingCtrl->Dce_Dispclk_Gating;

//GMMx4D0[DispclkRDccgGateDisable,DispclkDccgGateDisable]
  NbSmuSrbmRegisterRead (FCRxFF30_0134_ADDRESS, &FCRxFF30_0134.Value, Gnb->StdHeader);
  FCRxFF30_0134.Field.DispclkDccgGateDisable = Dce_Dispclk_Gating ? 0 : 1;
  FCRxFF30_0134.Field.DispclkRDccgGateDisable = Dce_Dispclk_Gating ? 0 : 1;
  NbSmuSrbmRegisterWrite (FCRxFF30_0134_ADDRESS, &FCRxFF30_0134.Value, TRUE, Gnb->StdHeader);

//GMMx[79,6D]F0[CrtcDispclkGSclGateDisable, CrtcDispclkGDcpGateDisable, CrtcDispclkRDcfeGateDisable]
  NbSmuSrbmRegisterRead (FCRxFF30_1B7C_ADDRESS, &FCRxFF30_1B7C.Value, Gnb->StdHeader);
  FCRxFF30_1B7C.Field.CrtcDispclkRDcfeGateDisable = Dce_Dispclk_Gating ? 0 : 1;
  FCRxFF30_1B7C.Field.CrtcDispclkGDcpGateDisable = Dce_Dispclk_Gating ? 0 : 1;
  FCRxFF30_1B7C.Field.CrtcDispclkGSclGateDisable = Dce_Dispclk_Gating ? 0 : 1;
  NbSmuSrbmRegisterWrite (FCRxFF30_1B7C_ADDRESS, &FCRxFF30_1B7C.Value, TRUE, Gnb->StdHeader);

  NbSmuSrbmRegisterRead (FCRxFF30_1E7C_ADDRESS, &FCRxFF30_1E7C.Value, Gnb->StdHeader);
  FCRxFF30_1E7C.Field.CrtcDispclkRDcfeGateDisable = Dce_Dispclk_Gating ? 0 : 1;
  FCRxFF30_1E7C.Field.CrtcDispclkGDcpGateDisable = Dce_Dispclk_Gating ? 0 : 1;
  FCRxFF30_1E7C.Field.CrtcDispclkGSclGateDisable = Dce_Dispclk_Gating ? 0 : 1;
  NbSmuSrbmRegisterWrite (FCRxFF30_1E7C_ADDRESS, &FCRxFF30_1E7C.Value, TRUE, Gnb->StdHeader);

//FCRxFF30_01F5[CgDcCgttDispclkOverride]
  NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader);
  FCRxFF30_01F5.Field.CgDcCgttDispclkOverride = 0;
  NbSmuSrbmRegisterWrite (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, TRUE, Gnb->StdHeader);

}
Beispiel #4
0
VOID
NbInitBifClockGating (
  IN      NB_CLK_GATING_CTRL  *NbClkGatingCtrl,
  IN      GNB_PLATFORM_CONFIG *Gnb
  )
{
  BOOLEAN               Bif_Sclk_Gating;
  FCRxFF30_01F4_STRUCT  FCRxFF30_01F4;
  FCRxFF30_1512_STRUCT  FCRxFF30_1512;


  Bif_Sclk_Gating = NbClkGatingCtrl->Bif_Sclk_Gating;

//FCRxFF30_01F4[CgBifCgttSclkOverride].
  NbSmuSrbmRegisterRead (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, Gnb->StdHeader);
  FCRxFF30_01F4.Field.CgBifCgttSclkOverride = 0;
  NbSmuSrbmRegisterWrite (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, TRUE, Gnb->StdHeader);
//FCRxFF30_1512
  NbSmuSrbmRegisterRead (FCRxFF30_1512_ADDRESS, &FCRxFF30_1512.Value, Gnb->StdHeader);
  FCRxFF30_1512.Field.SoftOverride0 = Bif_Sclk_Gating ? 0 : 1;
  NbSmuSrbmRegisterWrite (FCRxFF30_1512_ADDRESS, &FCRxFF30_1512.Value, TRUE, Gnb->StdHeader);

}
Beispiel #5
0
VOID
NbInitGmcClockGating (
  IN      NB_CLK_GATING_CTRL  *NbClkGatingCtrl,
  IN      GNB_PLATFORM_CONFIG *Gnb
  )
{
  BOOLEAN               Gmc_Sclk_Gating;
  FCRxFF30_01F4_STRUCT  FCRxFF30_01F4;
  FCRxFF30_01F5_STRUCT  FCRxFF30_01F5;

  Gmc_Sclk_Gating = NbClkGatingCtrl->Gmc_Sclk_Gating;

//FCRxFF30_01F4[CgMcdwCgttSclkOverride, CgMcbCgttSclkOverride]
  NbSmuSrbmRegisterRead (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, Gnb->StdHeader);
  FCRxFF30_01F4.Field.CgMcbCgttSclkOverride = Gmc_Sclk_Gating ? 0 : 1;
  FCRxFF30_01F4.Field.CgMcdwCgttSclkOverride = Gmc_Sclk_Gating ? 0 : 1;
  NbSmuSrbmRegisterWrite (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, TRUE, Gnb->StdHeader);

//FCRxFF30_01F5[CgVmcCgttSclkOverride]
  NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader);
  FCRxFF30_01F5.Field.CgVmcCgttSclkOverride = Gmc_Sclk_Gating ? 0 : 1;
  NbSmuSrbmRegisterWrite (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, TRUE, Gnb->StdHeader);

}
Beispiel #6
0
AGESA_STATUS
NbFmInitLclkDpmRcActivity (
  IN      AMD_CONFIG_PARAMS   *StdHeader
  )
{
  AGESA_STATUS    Status;
  PP_FUSE_ARRAY   *PpFuseArray;
  INT8            Index;
  UINTN           LclkState;
  Status = AGESA_SUCCESS;
  IDS_HDT_CONSOLE (GNB_TRACE, "NbFmInitLclkDpmRcActivity F14 Enter\n");
  PpFuseArray = GnbLocateHeapBuffer (AMD_PP_FUSE_TABLE_HANDLE, StdHeader);
  if (PpFuseArray != NULL) {
    UINT32  ActivityThreshold [8];
    UINT16  SamplingPeriod [10];
    UINT8   LclkScalingDid [4];
    UINT8   LclkScalingVid [4];
    UINT32  LclkDpmValid;
    UINT32  MainPllVcoKHz;
    LibAmdMemFill (&ActivityThreshold[0], 0, sizeof (ActivityThreshold), StdHeader);
    LibAmdMemFill (&SamplingPeriod[0], 0, sizeof (SamplingPeriod), StdHeader);
    MainPllVcoKHz = GfxLibGetMainPllFreq (StdHeader) * 100;
    LclkDpmValid = 0;
    LclkState = 7;
    for (Index = 3; Index >= 0; Index--) {
      if (PpFuseArray->LclkDpmValid [Index] != 0) {
        // Set valid DPM state
        LclkDpmValid |= (1 << (LclkState));
        // Set LCLK scaling DID
        LclkScalingDid [7 - LclkState] = PpFuseArray->LclkDpmDid [Index];
        // Set LCLK scaling VID
        LclkScalingVid [7 - LclkState] = PpFuseArray->LclkDpmVid [Index];
        // Set sampling period
        SamplingPeriod [LclkState] = 0xC350;
        //  Changed from 0xC350 to 0x1388 for DPM 0
        if (Index == 0) {
          SamplingPeriod [LclkState] = 0x1388;
        }
        // Set activity threshold from BKDG:
        // Raising -- ActivityThreshold [LclkState]  = ((102 * (GfxLibCalculateClk (LclkScalingDid [7 - LclkState], MainPllVcoKHz) / 100)) - 10) / 10;
        // Lowering -- ActivityThreshold [LclkState] |= (((407 * (GfxLibCalculateClk (LclkScalingDid [7 - LclkState], MainPllVcoKHz) / 100)) + 99) / 10) << 16;
        // For ON specific enable LCLK DPM :
        ActivityThreshold [LclkState]  = LclkDpmActivityThresholdTable [Index];

        IDS_HDT_CONSOLE (GNB_TRACE, "Fused State Index:%d  LCLK DPM State [%d]: LclkScalingDid - 0x%x, ActivityThreshold - 0x%x,  SamplingPeriod - 0x%x\n",
          Index, LclkState, LclkScalingDid [7 - LclkState], ActivityThreshold [LclkState], SamplingPeriod [LclkState]
          );
        LclkState--;
      }
    }
    if (LclkState != 7) {
      SMUx33_STRUCT         SMUx33;
      SMUx0B_x8434_STRUCT   SMUx0B_x8434;
      FCRxFF30_01E4_STRUCT  FCRxFF30_01E4;
      UINT8                 CurrentUnit;
      UINT16                FinalUnit;
      UINT16                FinalPeriod;
      UINT32                Freq;
      UINT32                FreqDelta;
      UINT32                Value;
      ASSERT (LclkScalingDid [0] != 0);
      FreqDelta = 0xffffffff;
      FinalPeriod = 0;
      FinalUnit = 0;
      Freq = (65535 * 100 * 100) / GfxLibCalculateClk (LclkScalingDid [0], MainPllVcoKHz);
      for (CurrentUnit = 0; CurrentUnit < 16; CurrentUnit++) {
        UINT32  CurrentFreqDelta;
        UINT32  CurrentPeriod;
        UINT32  Temp;
        Temp = GnbLibPowerOf (4, CurrentUnit);
        CurrentPeriod = Freq / Temp;
        if (CurrentPeriod <= 0xFFFF) {
          CurrentFreqDelta = Freq - Temp * CurrentPeriod;
          if (FreqDelta > CurrentFreqDelta) {
            FinalUnit = CurrentUnit;
            FinalPeriod = (UINT16) CurrentPeriod;
            FreqDelta = CurrentFreqDelta;
          }
        }
      }
      //Process to enablement LCLK DPM States
      NbSmuIndirectRead (SMUx33_ADDRESS, AccessWidth32, &SMUx33.Value, StdHeader);
      SMUx33.Field.BusyCntSel = 0x3;
      SMUx33.Field.LclkActMonUnt = FinalUnit;
      SMUx33.Field.LclkActMonPrd = FinalPeriod;
      NbSmuIndirectWrite (SMUx33_ADDRESS, AccessS3SaveWidth32, &SMUx33.Value, StdHeader);
      SMUx0B_x8434.Value = 0;
      SMUx0B_x8434.Field.LclkDpmType = 0x1;
      SMUx0B_x8434.Field.LclkDpmEn = 0x1;
      SMUx0B_x8434.Field.LclkTimerPeriod = 0x0C350;
      SMUx0B_x8434.Field.LclkTimerPrescalar = 0x1;
      NbSmuRcuRegisterWrite (
        SMUx0B_x8434_ADDRESS,
        &SMUx0B_x8434.Value,
        1,
        TRUE,
        StdHeader
        );
      NbSmuRcuRegisterWrite (
        0x84AC,
        &LclkDpmCacTable[0],
        sizeof (LclkDpmCacTable) / sizeof (UINT32),
        TRUE,
        StdHeader
        );
      // Program activity threshold
     IDS_HDT_CONSOLE (GNB_TRACE, "ActivityThreshold[4] - 0x%x ActivityThreshold[5] - 0x%x ActivityThreshold[6] - 0x%x ActivityThreshold[7] - 0x%x\n",
       ActivityThreshold[4], ActivityThreshold[5], ActivityThreshold[6], ActivityThreshold [7]
       );
      NbSmuRcuRegisterWrite (
        SMUx0B_x8470_ADDRESS,
        &ActivityThreshold[4],
        4,
        TRUE,
        StdHeader
        );
      // Program sampling period
      for (Index = 0; Index < (sizeof (SamplingPeriod) / sizeof (SamplingPeriod[0])); Index = Index + 2) {
        UINT16 Temp;
        Temp = SamplingPeriod[Index];
        SamplingPeriod[Index] = SamplingPeriod[Index + 1];
        SamplingPeriod[Index + 1] = Temp;
      }
      IDS_HDT_CONSOLE (GNB_TRACE, "SamplingPeriod[4] - 0x%x SamplingPeriod[5] - 0x%x SamplingPeriod[6] - 0x%x SamplingPeriod[7] - 0x%x  \n",
        SamplingPeriod[4], SamplingPeriod[5], SamplingPeriod[6], SamplingPeriod[7]
        );
      NbSmuRcuRegisterWrite (
        SMUx0B_x8440_ADDRESS,
        (UINT32*) &SamplingPeriod[4],
        2,
        TRUE,
        StdHeader
        );
     // Program LCK scaling DID
      NbSmuRcuRegisterWrite (
        SMUx0B_x848C_ADDRESS,
        (UINT32*) &LclkScalingDid[0],
        1,
        TRUE,
        StdHeader
        );
      // Program LCK scaling VID
      NbSmuRcuRegisterWrite (
        SMUx0B_x8498_ADDRESS,
        (UINT32*) &LclkScalingVid[0],
        1,
        TRUE,
        StdHeader
        );
      // Program valid LCLK DPM states
      LclkDpmValid = NbFmDpmStateBootupInit (LclkDpmValid, StdHeader);
      NbSmuRcuRegisterWrite (
        SMUx0B_x8490_ADDRESS,
        &LclkDpmValid,
        1,
        TRUE,
        StdHeader
        );
      //Setup Activity Monitor  Coefficients
      Value = (0x24 << SMUx35_DownTrendCoef_OFFSET) | (0x24 << SMUx35_UpTrendCoef_OFFSET);
      NbSmuIndirectWrite (SMUx35_ADDRESS, AccessS3SaveWidth32, &Value, StdHeader);
      Value = (0x22 << SMUx35_DownTrendCoef_OFFSET) | (0x22 << SMUx35_UpTrendCoef_OFFSET);
      for (Index = SMUx37_ADDRESS; Index <= SMUx51_ADDRESS; Index = Index + 2) {
        NbSmuIndirectWrite (Index, AccessS3SaveWidth32, &Value, StdHeader);
      }
      // Enable LCLK DPM as voltage client
      NbSmuSrbmRegisterRead (FCRxFF30_01E4_ADDRESS, &FCRxFF30_01E4.Value, StdHeader);
      FCRxFF30_01E4.Field.VoltageChangeEn = 0x1;
      NbSmuSrbmRegisterWrite (FCRxFF30_01E4_ADDRESS, &FCRxFF30_01E4.Value, TRUE, StdHeader);
      // Start LCLK service
      NbSmuServiceRequest (0x8, TRUE, StdHeader);
    }
  } else {
    IDS_HDT_CONSOLE (GNB_TRACE, "  ERROR! Cannot locate fuse table\n");
    Status = AGESA_ERROR;
  }
  IDS_HDT_CONSOLE (GNB_TRACE, "NbFmInitLclkDpmRcActivity F14 Exit [0x%x]\n", Status);
  return Status;
}
Beispiel #7
0
VOID
NbInitIocClockGating (
  IN      NB_CLK_GATING_CTRL  *NbClkGatingCtrl,
  IN      GNB_PLATFORM_CONFIG *Gnb
  )
{
  BOOLEAN                Ioc_Lclk_Gating;
  BOOLEAN                Ioc_Sclk_Gating;
  D0F0x64_x22_STRUCT     D0F0x64_x22;
  D0F0x64_x23_STRUCT     D0F0x64_x23;
  D0F0x64_x24_STRUCT     D0F0x64_x24;
  FCRxFF30_01F5_STRUCT   FCRxFF30_01F5;

  Ioc_Lclk_Gating = NbClkGatingCtrl->Ioc_Lclk_Gating;
  Ioc_Sclk_Gating = NbClkGatingCtrl->Ioc_Sclk_Gating;

//D0F0x64_x22
  GnbLibPciIndirectRead (
    Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS,
    D0F0x64_x22_ADDRESS | IOC_WRITE_ENABLE,
    AccessWidth32,
    &D0F0x64_x22.Value,
    Gnb->StdHeader
  );

  D0F0x64_x22.Field.SoftOverrideClk4 = Ioc_Lclk_Gating ? 0 : 1;
  D0F0x64_x22.Field.SoftOverrideClk3 = Ioc_Lclk_Gating ? 0 : 1;
  D0F0x64_x22.Field.SoftOverrideClk2 = Ioc_Lclk_Gating ? 0 : 1;
  D0F0x64_x22.Field.SoftOverrideClk1 = Ioc_Lclk_Gating ? 0 : 1;
  D0F0x64_x22.Field.SoftOverrideClk0 = Ioc_Lclk_Gating ? 0 : 1;

  GnbLibPciIndirectWrite (
    Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS,
    D0F0x64_x22_ADDRESS | IOC_WRITE_ENABLE,
    AccessS3SaveWidth32,
    &D0F0x64_x22.Value,
    Gnb->StdHeader
  );
//D0F0x64_x23
  GnbLibPciIndirectRead (
    Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS,
    D0F0x64_x23_ADDRESS | IOC_WRITE_ENABLE,
    AccessWidth32,
    &D0F0x64_x23.Value,
    Gnb->StdHeader
  );

  D0F0x64_x23.Field.SoftOverrideClk4 = Ioc_Lclk_Gating ? 0 : 1;
  D0F0x64_x23.Field.SoftOverrideClk3 = Ioc_Lclk_Gating ? 0 : 1;
  D0F0x64_x23.Field.SoftOverrideClk2 = Ioc_Lclk_Gating ? 0 : 1;
  D0F0x64_x23.Field.SoftOverrideClk1 = Ioc_Lclk_Gating ? 0 : 1;
  D0F0x64_x23.Field.SoftOverrideClk0 = Ioc_Lclk_Gating ? 0 : 1;

  GnbLibPciIndirectWrite (
    Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS,
    D0F0x64_x23_ADDRESS | IOC_WRITE_ENABLE,
    AccessS3SaveWidth32,
    &D0F0x64_x23.Value,
    Gnb->StdHeader
  );
  //D0F0x64_x24
  GnbLibPciIndirectRead (
    Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS,
    D0F0x64_x24_ADDRESS | IOC_WRITE_ENABLE,
    AccessWidth32,
    &D0F0x64_x24.Value,
    Gnb->StdHeader
  );

  D0F0x64_x24.Field.SoftOverrideClk1 = Ioc_Sclk_Gating ? 0 : 1;
  D0F0x64_x24.Field.SoftOverrideClk0 = Ioc_Sclk_Gating ? 0 : 1;

  GnbLibPciIndirectWrite (
    Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS,
    D0F0x64_x24_ADDRESS | IOC_WRITE_ENABLE,
    AccessS3SaveWidth32,
    &D0F0x64_x24.Value,
    Gnb->StdHeader
  );
//FCRxFF30_01F5[CgIocCgttLclkOverride, CgIocCgttSclkOverride]
  NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader);
  FCRxFF30_01F5.Field.CgIocCgttLclkOverride = 0;
  FCRxFF30_01F5.Field.CgIocCgttSclkOverride = 0;
  NbSmuSrbmRegisterWrite (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, TRUE, Gnb->StdHeader);
}
Beispiel #8
0
VOID
NbInitOrbClockGating (
  IN      NB_CLK_GATING_CTRL  *NbClkGatingCtrl,
  IN      GNB_PLATFORM_CONFIG *Gnb
  )
{
  BOOLEAN                Orb_Sclk_Gating;
  BOOLEAN                Orb_Lclk_Gating;
  D0F0x98_x49_STRUCT     D0F0x98_x49;
  D0F0x98_x4A_STRUCT     D0F0x98_x4A;
  D0F0x98_x4B_STRUCT     D0F0x98_x4B;
  FCRxFF30_01F5_STRUCT   FCRxFF30_01F5;

  Orb_Sclk_Gating = NbClkGatingCtrl->Orb_Sclk_Gating;
  Orb_Lclk_Gating = NbClkGatingCtrl->Orb_Lclk_Gating;

  // ORB clock gating (Lclk)
//D0F0x98_x4[A:9]
  GnbLibPciIndirectRead (
    Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS,
    D0F0x98_x49_ADDRESS,
    AccessWidth32,
    &D0F0x98_x49.Value,
    Gnb->StdHeader
  );

  D0F0x98_x49.Field.SoftOverrideClk6 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x49.Field.SoftOverrideClk5 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x49.Field.SoftOverrideClk4 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x49.Field.SoftOverrideClk3 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x49.Field.SoftOverrideClk2 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x49.Field.SoftOverrideClk1 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x49.Field.SoftOverrideClk0 =  Orb_Lclk_Gating ? 0 : 1;

  GnbLibPciIndirectWrite (
    Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS,
    D0F0x98_x49_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET),
    AccessS3SaveWidth32,
    &D0F0x98_x49.Value,
    Gnb->StdHeader
  );

  GnbLibPciIndirectRead (
    Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS,
    D0F0x98_x4A_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET),
    AccessWidth32,
    &D0F0x98_x4A.Value,
    Gnb->StdHeader
  );

  D0F0x98_x4A.Field.SoftOverrideClk6 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x4A.Field.SoftOverrideClk5 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x4A.Field.SoftOverrideClk4 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x4A.Field.SoftOverrideClk3 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x4A.Field.SoftOverrideClk2 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x4A.Field.SoftOverrideClk1 =  Orb_Lclk_Gating ? 0 : 1;
  D0F0x98_x4A.Field.SoftOverrideClk0 =  Orb_Lclk_Gating ? 0 : 1;


  GnbLibPciIndirectWrite (
    Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS,
    D0F0x98_x4A_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET),
    AccessS3SaveWidth32,
    &D0F0x98_x4A.Value,
    Gnb->StdHeader
  );

//D0F0x98_x4B
  GnbLibPciIndirectRead (
    Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS,
    D0F0x98_x4B_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET),
    AccessWidth32,
    &D0F0x98_x4B.Value,
    Gnb->StdHeader
  );

  D0F0x98_x4B.Field.SoftOverrideClk = Orb_Sclk_Gating ? 0 : 1;

  GnbLibPciIndirectWrite (
    Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS,
    D0F0x98_x4B_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET),
    AccessS3SaveWidth32,
    &D0F0x98_x4B.Value,
    Gnb->StdHeader
  );

//FCRxFF30_01F5[CgOrbCgttLclkOverride, CgOrbCgttSclkOverride]
  NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader);
  FCRxFF30_01F5.Field.CgOrbCgttLclkOverride = 0;
  FCRxFF30_01F5.Field.CgOrbCgttSclkOverride = 0;
  NbSmuSrbmRegisterWrite (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, TRUE, Gnb->StdHeader);

}