void odm_ConfigRFReg_8821A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Data, IN ODM_RF_RADIO_PATH_E RF_PATH, IN u4Byte RegAddr ) { if(Addr == 0xfe || Addr == 0xffe) { #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); #else ODM_delay_ms(50); #endif } else if (Addr == 0xfd) { ODM_delay_ms(5); } else if (Addr == 0xfc) { ODM_delay_ms(1); } else if (Addr == 0xfb) { ODM_delay_us(50); } else if (Addr == 0xfa) { ODM_delay_us(5); } else if (Addr == 0xf9) { ODM_delay_us(1); } else { ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); // Add 1us delay between BB/RF register setting. ODM_delay_us(1); } }
void odm_ConfigBB_PHY_REG_PG_8723B( IN PDM_ODM_T pDM_Odm, IN u4Byte Band, IN u4Byte RfPath, IN u4Byte TxNum, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ) { if (Addr == 0xfe || Addr == 0xffe) #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); #else ODM_delay_ms(50); #endif else {
void odm_ConfigBB_PHY_8188E( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ) { if (Addr == 0xfe){ #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); #else ODM_delay_ms(50); #endif } else if (Addr == 0xfd){ ODM_delay_ms(5); } else if (Addr == 0xfc){ ODM_delay_ms(1); } else if (Addr == 0xfb){ ODM_delay_us(50); } else if (Addr == 0xfa){ ODM_delay_us(5); } else if (Addr == 0xf9){ ODM_delay_us(1); } else{ if (Addr == 0xa24) pDM_Odm->RFCalibrateInfo.RegA24 = Data; ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); // Add 1us delay between BB/RF register setting. ODM_delay_us(1); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); } }
void odm_ConfigRFReg_8188E( PDM_ODM_T pDM_Odm, u4Byte Addr, u4Byte Data, ODM_RF_RADIO_PATH_E RF_PATH, u4Byte RegAddr ) { if (Addr == 0xffe) { ODM_sleep_ms(50); } else if (Addr == 0xfd) { ODM_delay_ms(5); } else if (Addr == 0xfc) { ODM_delay_ms(1); } else if (Addr == 0xfb) { ODM_delay_us(50); } else if (Addr == 0xfa) { ODM_delay_us(5); } else if (Addr == 0xf9) { ODM_delay_us(1); } else { ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); /* Add 1us delay between BB/RF register setting. */ ODM_delay_us(1); } }
void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) { if (Addr == 0xfe) { ODM_sleep_ms(50); } else if (Addr == 0xfd) { ODM_delay_ms(5); } else if (Addr == 0xfc) { ODM_delay_ms(1); } else if (Addr == 0xfb) { ODM_delay_us(50); } else if (Addr == 0xfa) { ODM_delay_us(5); } else if (Addr == 0xf9) { ODM_delay_us(1); } else{ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data); } }
void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data, enum rf_radio_path RF_PATH, u32 RegAddr) { if (Addr == 0xffe) { ODM_sleep_ms(50); } else if (Addr == 0xfd) { ODM_delay_ms(5); } else if (Addr == 0xfc) { ODM_delay_ms(1); } else if (Addr == 0xfb) { ODM_delay_us(50); } else if (Addr == 0xfa) { ODM_delay_us(5); } else if (Addr == 0xf9) { ODM_delay_us(1); } else { ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); /* Add 1us delay between BB/RF register setting. */ ODM_delay_us(1); } }
void odm_ConfigBB_PHY_REG_PG_8188E( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ) { if (Addr == 0xfe){ #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); #else ODM_delay_ms(50); #endif } else if (Addr == 0xfd){ ODM_delay_ms(5); } else if (Addr == 0xfc){ ODM_delay_ms(1); } else if (Addr == 0xfb){ ODM_delay_us(50); } else if (Addr == 0xfa){ ODM_delay_us(5); } else if (Addr == 0xf9){ ODM_delay_us(1); } else{ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); #if !(DM_ODM_SUPPORT_TYPE&ODM_AP) storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data); #endif } }
void odm_ConfigBB_PHY_REG_PG_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Band, IN u4Byte RfPath, IN u4Byte TxNum, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ) { if (Addr == 0xfe || Addr == 0xffe) { #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); #else ODM_delay_ms(50); #endif } else { #if !(DM_ODM_SUPPORT_TYPE&ODM_AP) PHY_StoreTxPowerByRate(pDM_Odm->Adapter, Band, RfPath, TxNum, Addr, Bitmask, Data); #endif } ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); }
void odm_ConfigRFReg_8192E( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Data, IN ODM_RF_RADIO_PATH_E RF_PATH, IN u4Byte RegAddr ) { if(Addr == 0xfe || Addr == 0xffe) { #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); #else ODM_delay_ms(50); #endif } else { ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); // Add 1us delay between BB/RF register setting. ODM_delay_us(1); //For disable/enable test in high temperature, the B6 value will fail to fill. Suggestion by Ed 20130. if(Addr == 0xb6) { u4Byte getvalue=0; u1Byte count =0; getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord); ODM_delay_us(1); while((getvalue>>8)!=(Data>>8)) { count++; ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); ODM_delay_us(1); getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [B6] getvalue 0x%x, Data 0x%x, count %d\n", getvalue, Data,count)); if(count>5) break; } } if(Addr == 0xb2) { u4Byte getvalue=0; u1Byte count =0; getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord); ODM_delay_us(1); while(getvalue!=Data) { count++; ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); ODM_delay_us(1); //Do LCK againg ODM_SetRFReg(pDM_Odm, RF_PATH, 0x18, bRFRegOffsetMask, 0x0fc07); ODM_delay_us(1); getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [B2] getvalue 0x%x, Data 0x%x, count %d\n", getvalue, Data,count)); if(count>5) break; } } }