static int
ppb_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, int flags,
char *name, caddr_t valuep, int *lengthp)
{
int instance = PCI_MINOR_NUM_TO_INSTANCE(getminor(dev));
ppb_devstate_t *ppb_p = ddi_get_soft_state(ppb_state, instance);
if (ppb_p == NULL)
return (ENXIO);
if (ppb_p->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV)
return (pcie_prop_op(dev, dip, prop_op, flags, name,
valuep, lengthp));
return ((pcihp_get_cb_ops())->cb_prop_op(dev, dip, prop_op, flags,
name, valuep, lengthp));
}
/* ARGSUSED */
static int
ppb_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
int *rvalp)
{
int instance = PCI_MINOR_NUM_TO_INSTANCE(getminor(dev));
ppb_devstate_t *ppb_p = ddi_get_soft_state(ppb_state, instance);
if (ppb_p == NULL)
return (ENXIO);
/*
* Ioctls will be handled by PCI Express framework for all
* PCIe platforms
*/
if (ppb_p->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV)
return (pcie_ioctl(ppb_p->dip, dev, cmd, arg, mode, credp,
rvalp));
return ((pcihp_get_cb_ops())->cb_ioctl(dev, cmd, arg, mode, credp,
rvalp));
}
/* ARGSUSED */
static int
ppb_open(dev_t *devp, int flags, int otyp, cred_t *credp)
{
int instance = PCI_MINOR_NUM_TO_INSTANCE(getminor(*devp));
ppb_devstate_t *ppb_p = ddi_get_soft_state(ppb_state, instance);
int rv;
if (ppb_p == NULL)
return (ENXIO);
/*
* Ioctls will be handled by PCI Express framework for all
* PCIe platforms
*/
if (ppb_p->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV) {
mutex_enter(&ppb_p->ppb_mutex);
rv = pcie_open(ppb_p->dip, devp, flags, otyp, credp);
mutex_exit(&ppb_p->ppb_mutex);
return (rv);
}
return ((pcihp_get_cb_ops())->cb_open(devp, flags, otyp, credp));
}
/* ARGSUSED */
static int
ppb_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
int *rvalp)
{
int instance = PCI_MINOR_NUM_TO_INSTANCE(getminor(dev));
ppb_devstate_t *ppb_p = ddi_get_soft_state(ppb_state, instance);
struct devctl_iocdata *dcp;
uint_t bus_state;
dev_info_t *self;
int rv = 0;
if (ppb_p == NULL)
return (ENXIO);
/*
* Ioctls will be handled by SPARC PCI Express framework for all
* PCIe platforms
*/
if (ppb_p->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV)
return (pcie_ioctl(ppb_p->dip, dev, cmd, arg, mode, credp,
rvalp));
else if (ppb_p->hotplug_capable == B_TRUE)
return ((pcihp_get_cb_ops())->cb_ioctl(dev, cmd, arg, mode,
credp, rvalp));
self = ppb_p->dip;
/*
* We can use the generic implementation for these ioctls
*/
switch (cmd) {
case DEVCTL_DEVICE_GETSTATE:
case DEVCTL_DEVICE_ONLINE:
case DEVCTL_DEVICE_OFFLINE:
case DEVCTL_BUS_GETSTATE:
return (ndi_devctl_ioctl(self, cmd, arg, mode, 0));
}
/*
* read devctl ioctl data
*/
if (ndi_dc_allochdl((void *)arg, &dcp) != NDI_SUCCESS)
return (EFAULT);
switch (cmd) {
case DEVCTL_DEVICE_RESET:
rv = ENOTSUP;
break;
case DEVCTL_BUS_QUIESCE:
if (ndi_get_bus_state(self, &bus_state) == NDI_SUCCESS)
if (bus_state == BUS_QUIESCED)
break;
(void) ndi_set_bus_state(self, BUS_QUIESCED);
break;
case DEVCTL_BUS_UNQUIESCE:
if (ndi_get_bus_state(self, &bus_state) == NDI_SUCCESS)
if (bus_state == BUS_ACTIVE)
break;
(void) ndi_set_bus_state(self, BUS_ACTIVE);
break;
case DEVCTL_BUS_RESET:
rv = ENOTSUP;
break;
case DEVCTL_BUS_RESETALL:
rv = ENOTSUP;
break;
default:
rv = ENOTTY;
}
ndi_dc_freehdl(dcp);
return (rv);
}
