void ldo_mode_set(int ldo_bypass)
{
unsigned int value;
struct pmic *p = pfuze;
if (!p) {
printf("No PMIC found!\n");
return;
}
/* switch to ldo_bypass mode */
if (ldo_bypass) {
/* decrease VDDARM to 1.15V */
pmic_reg_read(p, PFUZE100_SW1ABVOL, &value);
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(11500);
pmic_reg_write(p, PFUZE100_SW1ABVOL, value);
/* decrease VDDSOC to 1.15V */
pmic_reg_read(p, PFUZE100_SW1CVOL, &value);
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(11500);
pmic_reg_write(p, PFUZE100_SW1CVOL, value);
set_anatop_bypass(1);
printf("switch to ldo_bypass mode!\n");
}
}
void ldo_mode_set(int ldo_bypass)
{
unsigned char value;
/* switch to ldo_bypass mode */
if (ldo_bypass) {
/* decrease VDDARM to 1.15V */
if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABVOL, 1, &value, 1)) {
printf("Read SW1AB error!\n");
return;
}
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(11500);
if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABVOL, 1, &value, 1)) {
printf("Set SW1AB error!\n");
return;
}
/* increase VDDSOC to 1.15V */
if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CVOL, 1, &value, 1)) {
printf("Read SW1C error!\n");
return;
}
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(11500);
if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CVOL, 1, &value, 1)) {
printf("Set SW1C error!\n");
return;
}
set_anatop_bypass(1);
printf("switch to ldo_bypass mode!\n");
}
}
int power_init_board(void)
{
unsigned int reg, ret;
pfuze = pfuze_common_init(I2C_PMIC);
if (!pfuze)
return -ENODEV;
ret = pfuze_mode_init(pfuze, APS_PFM);
if (ret < 0)
return ret;
/* set SW1AB standby volatage 0.975V */
pmic_reg_read(pfuze, PFUZE100_SW1ABSTBY, ®);
reg &= ~0x3f;
reg |= PFUZE100_SW1ABC_SETP(9750);
pmic_reg_write(pfuze, PFUZE100_SW1ABSTBY, reg);
/* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
pmic_reg_read(pfuze, PFUZE100_SW1ABCONF, ®);
reg &= ~0xc0;
reg |= 0x40;
pmic_reg_write(pfuze, PFUZE100_SW1ABCONF, reg);
/* set SW1C standby volatage 1.10V */
pmic_reg_read(pfuze, PFUZE100_SW1CSTBY, ®);
reg &= ~0x3f;
reg |= PFUZE100_SW1ABC_SETP(11000);
pmic_reg_write(pfuze, PFUZE100_SW1CSTBY, reg);
/* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
pmic_reg_read(pfuze, PFUZE100_SW1CCONF, ®);
reg &= ~0xc0;
reg |= 0x40;
pmic_reg_write(pfuze, PFUZE100_SW1CCONF, reg);
/* Enable power of VGEN5 3V3, needed for SD3 */
pmic_reg_read(pfuze, PFUZE100_VGEN5VOL, ®);
reg &= ~LDO_VOL_MASK;
reg |= (LDOB_3_30V | (1 << LDO_EN));
pmic_reg_write(pfuze, PFUZE100_VGEN5VOL, reg);
return 0;
}
void ldo_mode_set(int ldo_bypass)
{
unsigned int value;
int is_400M;
u32 vddarm;
struct pmic *p = pfuze;
if (!p) {
printf("No PMIC found!\n");
return;
}
/* switch to ldo_bypass mode */
if (ldo_bypass) {
prep_anatop_bypass();
/* decrease VDDARM to 1.275V */
pmic_reg_read(pfuze, PFUZE100_SW1ABVOL, &value);
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(12750);
pmic_reg_write(pfuze, PFUZE100_SW1ABVOL, value);
is_400M = set_anatop_bypass(1);
if (is_400M)
vddarm = PFUZE100_SW1ABC_SETP(10750);
else
vddarm = PFUZE100_SW1ABC_SETP(11750);
pmic_reg_read(pfuze, PFUZE100_SW1ABVOL, &value);
value &= ~0x3f;
value |= vddarm;
pmic_reg_write(pfuze, PFUZE100_SW1ABVOL, value);
finish_anatop_bypass();
printf("switch to ldo_bypass mode!\n");
}
}
static int setup_pmic_voltages(void)
{
unsigned char value, rev_id = 0;
i2c_set_bus_num(CONFIG_PMIC_I2C_BUS);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_PMIC_I2C_SLAVE);
if (!i2c_probe(CONFIG_PMIC_I2C_SLAVE)) {
if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_DEVICEID, 1, &value, 1)) {
printf("Read device ID error!\n");
return -1;
}
if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_REVID, 1, &rev_id, 1)) {
printf("Read Rev ID error!\n");
return -1;
}
printf("Found PFUZE100! deviceid 0x%x, revid 0x%x\n", value, rev_id);
if (setup_pmic_mode(value & 0xf)) {
printf("setup pmic mode error!\n");
return -1;
}
/* set SW1AB standby volatage 0.975V */
if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABSTBY, 1, &value, 1)) {
printf("Read SW1ABSTBY error!\n");
return -1;
}
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(9750);
if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABSTBY, 1, &value, 1)) {
printf("Set SW1ABSTBY error!\n");
return -1;
}
/* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABCONF, 1, &value, 1)) {
printf("Read SW1ABCONFIG error!\n");
return -1;
}
value &= ~0xc0;
value |= 0x40;
if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1ABCONF, 1, &value, 1)) {
printf("Set SW1ABCONFIG error!\n");
return -1;
}
/* set SW1C standby volatage 0.975V */
if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CSTBY, 1, &value, 1)) {
printf("Read SW1CSTBY error!\n");
return -1;
}
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(9750);
if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CSTBY, 1, &value, 1)) {
printf("Set SW1CSTBY error!\n");
return -1;
}
/* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CCONF, 1, &value, 1)) {
printf("Read SW1CCONFIG error!\n");
return -1;
}
value &= ~0xc0;
value |= 0x40;
if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_SW1CCONF, 1, &value, 1)) {
printf("Set SW1CCONFIG error!\n");
return -1;
}
/* Enable power of VGEN5 3V3, needed for SD3 */
if (i2c_read(CONFIG_PMIC_I2C_SLAVE, PFUZE100_VGEN5CTL, 1, &value, 1)) {
printf("Read VGEN5CTL error!\n");
return -1;
}
value &= ~0x1F;
value |= 0x1F;
if (i2c_write(CONFIG_PMIC_I2C_SLAVE, PFUZE100_VGEN5CTL, 1, &value, 1)) {
printf("Set VGEN5CTL error!\n");
return -1;
}
}
return 0;
}
static int imx6sx_sdb_setup_pmic_voltages(void)
{
unsigned char value, rev_id = 0;
struct i2c_adapter *adapter = NULL;
struct i2c_client client;
int addr = -1, bus = 0;
if (!of_machine_is_compatible("fsl,imx6sx-sdb"))
return 0;
/* I2C2 bus (2-1 = 1 in barebox numbering) */
bus = 0;
/* PFUZE100 device address is 0x08 */
addr = 0x08;
adapter = i2c_get_adapter(bus);
if (!adapter)
return -ENODEV;
client.adapter = adapter;
client.addr = addr;
if (i2c_read_reg(&client, PFUZE100_DEVICEID, &value, 1) < 0)
goto err_out;
if (i2c_read_reg(&client, PFUZE100_REVID, &rev_id, 1) < 0)
goto err_out;
pr_info("Found PFUZE100! deviceid 0x%x, revid 0x%x\n", value, rev_id);
if (imx6sx_sdb_setup_pmic_mode(&client, value & 0xf))
goto err_out;
/* set SW1AB standby volatage 0.975V */
if (i2c_read_reg(&client, PFUZE100_SW1ABSTBY, &value, 1) < 0)
goto err_out;
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(9750);
if (i2c_write_reg(&client, PFUZE100_SW1ABSTBY, &value, 1) < 0)
goto err_out;
/* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
if (i2c_read_reg(&client, PFUZE100_SW1ABCONF, &value, 1) < 0)
goto err_out;
value &= ~0xc0;
value |= 0x40;
if (i2c_write_reg(&client, PFUZE100_SW1ABCONF, &value, 1) < 0)
goto err_out;
/* set SW1C standby volatage 0.975V */
if (i2c_read_reg(&client, PFUZE100_SW1CSTBY, &value, 1) < 0)
goto err_out;
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(9750);
if (i2c_write_reg(&client, PFUZE100_SW1CSTBY, &value, 1) < 0)
goto err_out;
/* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
if (i2c_read_reg(&client, PFUZE100_SW1CCONF, &value, 1) < 0)
goto err_out;
value &= ~0xc0;
value |= 0x40;
if (i2c_write_reg(&client, PFUZE100_SW1CCONF, &value, 1) < 0)
goto err_out;
/* Enable power of VGEN5 3V3, needed for SD3 */
if (i2c_read_reg(&client, PFUZE100_VGEN5CTL, &value, 1) < 0)
goto err_out;
value &= ~0x1F;
value |= 0x1F;
if (i2c_write_reg(&client, PFUZE100_VGEN5CTL, &value, 1) < 0)
goto err_out;
return 0;
err_out:
pr_err("Setting up PMIC failed\n");
return -EIO;
}
int power_init_board(void)
{
int ret;
u32 rev_id, value;
ret = power_pfuze100_init(I2C_PMIC);
if (ret)
return ret;
pfuze = pmic_get("PFUZE100");
if (!pfuze)
return -ENODEV;
ret = pmic_probe(pfuze);
if (ret)
return ret;
ret = pfuze_mode_init(pfuze, APS_PFM);
if (ret < 0)
return ret;
pmic_reg_read(pfuze, PFUZE100_DEVICEID, &value);
pmic_reg_read(pfuze, PFUZE100_REVID, &rev_id);
printf("PMIC: PFUZE200! DEV_ID=0x%x REV_ID=0x%x\n", value, rev_id);
/*
* Our PFUZE0200 is PMPF0200X0AEP, the Pre-programmed OTP
* Configuration is F0.
* Default VOLT:
* VSNVS_VOLT | 3.0V
* SW1AB | 1.375V
* SW2 | 3.3V
* SW3A | 1.5V
* SW3B | 1.5V
* VGEN1 | 1.5V
* VGEN2 | 1.5V
* VGEN3 | 2.5V
* VGEN4 | 1.8V
* VGEN5 | 2.8V
* VGEN6 | 3.3V
*
* According to schematic, we need SW3A 1.35V, SW3B 3.3V,
* VGEN1 1.2V, VGEN2 1.5V, VGEN3 2.8V, VGEN4 1.8V,
* VGEN5 3.3V, VGEN6 3.0V.
*
* Here we just use the default VOLT, but not configure
* them, when needed, configure them to our requested voltage.
*/
/* set SW1AB standby volatage 1.3V */
pmic_reg_read(pfuze, PFUZE100_SW1ABSTBY, &value);
value &= ~0x3f;
value |= PFUZE100_SW1ABC_SETP(13000);
pmic_reg_write(pfuze, PFUZE100_SW1ABSTBY, value);
/* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
pmic_reg_read(pfuze, PFUZE100_SW1ABCONF, &value);
value &= ~0xc0;
value |= 0x40;
pmic_reg_write(pfuze, PFUZE100_SW1ABCONF, value);
/* Enable power of VGEN5 3V3 */
pmic_reg_read(pfuze, PFUZE100_VGEN5VOL, &value);
value &= ~0x1F;
value |= 0x1F;
pmic_reg_write(pfuze, PFUZE100_VGEN5VOL, value);
return 0;
}
