/** @ingroup user_util
* @brief Create a sized buffer given data in an ATTR structure
*
* @param buf_p RW: pointer to the buffer to be created
* @param attr_p RO: pointer to the ATTR data
*
* @par Externals
* None
*
* @return
* status
*
* @par Errors
* N8_STATUS_OK, N8_MALLOC_FAILED
*
* @par Assumptions
* None
*****************************************************************************/
N8_Status_t N8_CreateSizedBufferFromATTR(N8_SizedBuffer_t *buf_p,
const ATTR *attr_p)
{
N8_Status_t ret = N8_STATUS_OK;
unsigned int len;
unsigned int i;
do
{
len =
PKDIGITS_TO_BYTES(attr_p->length * SIMON_MULTIPLIER);
/* the data in an ATTR structure may be zero-padded to the left. these
* need to be stripped. find the first non-zero byte and start copying
* from there.
*/
i = 0;
while (i < len && attr_p->value[i] == 0x0)
{
i++;
}
buf_p->lengthBytes = len - i;
CREATE_UOBJECT_SIZE(buf_p->value_p,
buf_p->lengthBytes,
ret);
if (buf_p->lengthBytes == 0)
{
ret = N8_INVALID_VALUE;
break;
}
memcpy(buf_p->value_p, &attr_p->value[i], buf_p->lengthBytes);
} while (FALSE);
return ret;
} /* N8_CreateSizedBufferFromATTR */
int n8_chipInit( NspInstance_t *NSPinstance_p,
int HWidx,
int queueSize,
unsigned char Debug)
{
volatile NSP2000REGS_t *nsp = (NSP2000REGS_t *)NSPinstance_p->NSPregs_p;
int queueLength; /* Number of entries */
/* First store model identifiers */
DBG(("store model id\n"));
NSPinstance_p->hardwareType = N8_NSP2000_HW;
NSPinstance_p->HardwareVersion = NSPinstance_p->PCIinfo.device_id;
NSPinstance_p->RevisionID = NSPinstance_p->PCIinfo.revision_id;
/* Initialize bus error statistics */
DBG(("bus error stats\n"));
NSPinstance_p->RNHbuserrors = 0;
NSPinstance_p->PKHbuserrors = 0;
NSPinstance_p->CCHbuserrors = 0;
/* Set the amba PCI endian mode register */
nsp->amba_pci_endian_mode = 0;
queueLength = 1 << queueSize;
/* Initialize sizes for allocated resources */
NSPinstance_p->RNqueue_size = 0;
NSPinstance_p->PKqueue_size = 0;
NSPinstance_p->EAqueue_size = 0;
/* Initialize physical base address of each queue and struct */
NSPinstance_p->RNqueue_base = 0;
NSPinstance_p->PKqueue_base = 0;
NSPinstance_p->EAqueue_base = 0;
NSPinstance_p->chip = HWidx;
/* Allocate static resources */
if (bncAddr == 0)
{
bncAddr = n8_pmalloc(N8_MEMBANK_QUEUE, PKDIGITS_TO_BYTES(2), 0);
DBG(("n8_pmalloc(N8_MEMBANK_QUEUE) -> 0x%x\n",
(uint32_t)bncAddr));
if (bncAddr)
{
char *bnc_one_p;
bnc_one_p = N8_PhysToVirt(bncAddr);
DBG(("bncAddr 0x%x -> virt 0x%x\n",
(uint32_t)bncAddr,
(uint32_t)bnc_one_p));
memset(bnc_one_p, 0x0, PKDIGITS_TO_BYTES(2));
bnc_one_p[PK_Bytes_Per_BigNum_Digit - 1] = 1;
}
else
{
DBG(( "NSP2000: Failed BNC constant allocation.\n"));
return 0;
}
}
NSPinstance_p->RNqueue_base = n8_pmalloc(N8_MEMBANK_QUEUE,
N8_DEF_RNG_QUE_SIZE*sizeof(RNG_Sample_t),
0);
if (!NSPinstance_p->RNqueue_base)
{
N8_PRINT(KERN_CRIT "NSP2000: Failed RN queue allocation.\n");
return 0;
}
NSPinstance_p->PKqueue_base = n8_pmalloc(N8_MEMBANK_QUEUE,
queueLength*sizeof(PK_CMD_BLOCK_t),
0);
if (!NSPinstance_p->PKqueue_base)
{
N8_PRINT(KERN_CRIT "NSP2000: Failed PK queue allocation.\n");
return 0;
}
NSPinstance_p->EAqueue_base = n8_pmalloc(N8_MEMBANK_QUEUE,
queueLength*sizeof(EA_CMD_BLOCK_t),
0);
if (!NSPinstance_p->EAqueue_base)
{
N8_PRINT(KERN_CRIT "NSP2000: Failed EA queue allocation.\n");
return 0;
}
/* Update sizes of allocated resources */
NSPinstance_p->RNqueue_size = N8_DEF_RNG_QUE_SIZE;
NSPinstance_p->PKqueue_size = queueLength;
NSPinstance_p->EAqueue_size = queueLength;
/* Convert physical base address of each struct to a kernel virtual address*/
NSPinstance_p->RNqueue_p = N8_PhysToVirt(NSPinstance_p->RNqueue_base);
NSPinstance_p->PKqueue_p = N8_PhysToVirt(NSPinstance_p->PKqueue_base);
NSPinstance_p->EAqueue_p = N8_PhysToVirt(NSPinstance_p->EAqueue_base);
/* EAshared_p and PKshared_p are owned by QMgr and are thus set by QMgr */
/* Set the queue pointers */
nsp->pkh_q_bar1 = 0;
nsp->cch_q_bar1 = 0;
nsp->rnh_q_bar1 = 0;
nsp->pkh_q_bar0 = NSPinstance_p->PKqueue_base;
nsp->cch_q_bar0 = NSPinstance_p->EAqueue_base;
nsp->rnh_q_bar0 = NSPinstance_p->RNqueue_base;
nsp->pkh_q_length = queueSize;
nsp->cch_q_length = queueSize;
nsp->rnh_q_length = N8_DEF_RNG_QUE_EXP;
/* Initialize the SKS data structures. */
if (!SKS_Init(NSPinstance_p))
{
N8_PRINT(KERN_CRIT "NSP2000: Failed to Initialize SKS.\n");
}
/* Enable the EA & PK Queues since they need no parameters to start. */
nsp->pkh_control_status |= NSP_CORE_ENABLE;
nsp->cch_control_status |= NSP_CORE_ENABLE;
if (Debug)
{
/* Announce allocations */
N8_PRINT(KERN_CRIT "NSP2000: Allocated RN queue - %ld entries @ %08lx.\n",
NSPinstance_p->RNqueue_size, NSPinstance_p->RNqueue_base);
N8_PRINT(KERN_CRIT "NSP2000: Allocated PK queue - %ld entries @ %08lx.\n",
NSPinstance_p->PKqueue_size, NSPinstance_p->PKqueue_base);
N8_PRINT(KERN_CRIT "NSP2000: Allocated EA queue - %ld entries @ %08lx.\n",
NSPinstance_p->EAqueue_size, NSPinstance_p->EAqueue_base);
}
/* Allocate resources to manage the context memory */
N8_ContextMemInit(HWidx);
/* Initialize QMgr. */
QMgrInit(HWidx);
/* Initialize wait queue for each core */
N8_InitWaitQueue(&NSPinstance_p->RNHblock);
N8_InitWaitQueue(&NSPinstance_p->CCHblock);
N8_InitWaitQueue(&NSPinstance_p->PKHblock);
N8_InitWaitQueue(&NSPinstance_p->AMBAblock);
return 1;
}
