/* This function is called for configuring pinmux for i2c module
* This function only support switching default or gpio or fixed-ALTx mode on fixed pins
* (Although there are many ALTx-pinmux configuration choices on various pins for the same
* peripheral module) */
void i2c_pinmux_config(unsigned int instance, pinmux_type_t pinmux)
{
switch(instance)
{
case 0:
break;
#if BL_CONFIG_I2C
case 1:
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(PORTC, 10, 0);
PORT_BWR_PCR_MUX(PORTC, 11, 0);
PORT_BWR_PCR_ODE(PORTC, 10, 0);
PORT_BWR_PCR_ODE(PORTC, 11, 0);
break;
case kPinmuxType_Peripheral:
// Enable pins for I2C1.
PORT_BWR_PCR_MUX(PORTC, 10, 2); // I2C1_SCL is ALT2 for pin PTC10
PORT_BWR_PCR_ODE(PORTC, 10, 1); // I2C1_SCL set for open drain
PORT_BWR_PCR_MUX(PORTC, 11, 2); // I2C1_SDA is ALT2 for pin PTC11
PORT_BWR_PCR_ODE(PORTC, 11, 1); // I2C1_SDA set for open drain
break;
default:
break;
}
break;
#endif // BL_CONFIG_I2C
case 2:
break;
default:
break;
}
}
/* This function is called for configuring pinmux for i2c module
* This function only support switching default or gpio or fixed-ALTx mode on fixed pins
* (Although there are many ALTx-pinmux configuration choices on various pins for the same
* peripheral module) */
void i2c_pinmux_config(unsigned int instance, pinmux_type_t pinmux)
{
switch(instance)
{
#if BL_CONFIG_I2C
case 0:
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(PORTD, 8, 0);
PORT_BWR_PCR_ODE(PORTD, 8, 0); // I2C0_SCL set for open drain
PORT_BWR_PCR_MUX(PORTD, 9, 0);
PORT_BWR_PCR_ODE(PORTD, 9, 0); // I2C0_SDA set for open drain
break;
case kPinmuxType_Peripheral:
// Enable pins for I2C0.
PORT_BWR_PCR_MUX(PORTD, 8, 2); // I2C0_SCL is ALT5 for pin PTE24
PORT_BWR_PCR_ODE(PORTD, 8, 1); // I2C0_SCL set for open drain
PORT_BWR_PCR_MUX(PORTD, 9, 2); // I2C0_SDA is ALT5 for pin PTE25
PORT_BWR_PCR_ODE(PORTD, 9, 1); // I2C0_SDA set for open drain
break;
default:
break;
}
break;
#endif // BL_CONFIG_I2C
default:
break;
}
}
/* This function is called for configuring pinmux for uart module
* This function only support switching default or gpio or fixed-ALTx mode on fixed pins
* (Although there are many ALTx-pinmux configuration choices on various pins for the same
* peripheral module) */
void uart_pinmux_config(unsigned int instance, pinmux_type_t pinmux)
{
switch(instance)
{
case 0:
#if BL_CONFIG_SCUART
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(PORTC, LPUART0_RX_GPIO_PIN_NUM, 0);
PORT_BWR_PCR_MUX(PORTC, LPUART0_TX_GPIO_PIN_NUM, 0);
break;
case kPinmuxType_GPIO:
PORT_BWR_PCR_MUX(PORTC, LPUART0_RX_GPIO_PIN_NUM, LPUART0_RX_GPIO_ALT_MODE); // Set LPUART0_RX pin in GPIO mode
GPIO_CLR_PDDR(PTC, 1 << LPUART0_RX_GPIO_PIN_NUM); // Set LPUART0_RX pin as an input
break;
case kPinmuxType_Peripheral:
PORT_BWR_PCR_MUX(PORTC, LPUART0_RX_GPIO_PIN_NUM, LPUART0_RX_ALT_MODE); // Set LPUART0_RX pin to LPUART0_RX functionality
PORT_BWR_PCR_MUX(PORTC, LPUART0_TX_GPIO_PIN_NUM, LPUART0_TX_ALT_MODE); // Set LPUART0_TX pin to LPUART0_TX functionality
break;
default:
break;
}
break;
case 1:
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(PORTE, UART1_RX_GPIO_PIN_NUM, 0);
PORT_BWR_PCR_MUX(PORTE, UART1_TX_GPIO_PIN_NUM, 0);
break;
case kPinmuxType_GPIO:
PORT_BWR_PCR_MUX(PORTE, UART1_RX_GPIO_PIN_NUM, UART1_RX_GPIO_ALT_MODE); // Set UART1_RX pin in GPIO mode
GPIO_CLR_PDDR(PTE, 1 << UART1_RX_GPIO_PIN_NUM); // Set UART1_RX pin as an input
break;
case kPinmuxType_Peripheral:
PORT_BWR_PCR_MUX(PORTE, UART1_RX_GPIO_PIN_NUM, UART1_RX_ALT_MODE); // Set UART1_RX pin to UART1_RX functionality
PORT_BWR_PCR_MUX(PORTE, UART1_TX_GPIO_PIN_NUM, UART1_TX_ALT_MODE); // Set UART1_TX pin to UART1_TX functionality
break;
default:
break;
}
break;
#endif // BL_CONFIG_SCUART
case 2:
case 3:
case 4:
case 5:
default:
break;
}
}
/* This function is called for configuring pinmux for uart module
* This function only support switching default or gpio or fixed-ALTx mode on fixed pins
* (Although there are many ALTx-pinmux configuration choices on various pins for the same
* peripheral module) */
void uart_pinmux_config(unsigned int instance, pinmux_type_t pinmux)
{
switch(instance)
{
#if BL_CONFIG_SCUART
#ifdef TOWER
case 2:
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(PORTE, UART2_RX_GPIO_PIN_NUM, 0);
PORT_BWR_PCR_MUX(PORTE, UART2_TX_GPIO_PIN_NUM, 0);
break;
case kPinmuxType_GPIO:
PORT_BWR_PCR_MUX(PORTE, UART2_RX_GPIO_PIN_NUM, UART2_RX_GPIO_ALT_MODE);
GPIO_CLR_PDDR(PTE, 1 << UART2_RX_GPIO_PIN_NUM);
break;
case kPinmuxType_Peripheral:
PORT_BWR_PCR_MUX(PORTE, UART2_RX_GPIO_PIN_NUM, UART2_RX_ALT_MODE);
PORT_BWR_PCR_MUX(PORTE, UART2_TX_GPIO_PIN_NUM, UART2_TX_ALT_MODE);
break;
default:
break;
}
break;
#else // defined TOWER
case 4:
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(PORTE, UART4_RX_GPIO_PIN_NUM, 0);
PORT_BWR_PCR_MUX(PORTE, UART4_TX_GPIO_PIN_NUM, 0);
break;
case kPinmuxType_GPIO:
PORT_BWR_PCR_MUX(PORTE, UART4_RX_GPIO_PIN_NUM, UART4_RX_GPIO_ALT_MODE);
GPIO_CLR_PDDR(PTE, 1 << UART4_RX_GPIO_PIN_NUM);
break;
case kPinmuxType_Peripheral:
PORT_BWR_PCR_MUX(PORTE, UART4_RX_GPIO_PIN_NUM, UART4_RX_ALT_MODE);
PORT_BWR_PCR_MUX(PORTE, UART4_TX_GPIO_PIN_NUM, UART4_TX_ALT_MODE);
break;
default:
break;
}
break;
#endif // defined TOWER
#endif // BL_CONFIG_SCUART
default:
break;
}
}
/* This function is called for configuring pinmux for spi module
* This function only support switching default or gpio or fixed-ALTx mode on fixed pins
* (Although there are many ALTx-pinmux configuration choices on various pins for the same
* peripheral module) */
void spi_pinmux_config(unsigned int instance, pinmux_type_t pinmux)
{
switch(instance)
{
case 0:
break;
#if BL_CONFIG_DSPI
case 1:
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(PORTD, 4, 0);
PORT_BWR_PCR_MUX(PORTD, 5, 0);
PORT_BWR_PCR_MUX(PORTD, 6, 0);
PORT_BWR_PCR_MUX(PORTD, 7, 0);
break;
case kPinmuxType_Peripheral:
// Enable pins for SPI0 on PTD4~7
PORT_BWR_PCR_MUX(PORTD, 4, 7); // SPI1_PCS0 is ALT7 for pin PTD4
PORT_BWR_PCR_MUX(PORTD, 5, 7); // SPI1_SCK is ALT7 for pin PTD5
PORT_BWR_PCR_MUX(PORTD, 6, 7); // SPI1_SOUT is ALT7 for pin PTD6
PORT_BWR_PCR_MUX(PORTD, 7, 7); // SPI1_SIN is ALT7 for pin PTD7
break;
default:
break;
}
break;
#endif // BL_CONFIG_DSPI
case 2:
break;
default:
break;
}
}
/* This function is called for configuring pinmux for spi module
* This function only support switching default or gpio or fixed-ALTx mode on fixed pins
* (Although there are many ALTx-pinmux configuration choices on various pins for the same
* peripheral module) */
void spi_pinmux_config(unsigned int instance, pinmux_type_t pinmux)
{
switch(instance)
{
#if BL_CONFIG_DSPI
case 2:
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(PORTD, 11, 0);
PORT_BWR_PCR_MUX(PORTD, 12, 0);
PORT_BWR_PCR_MUX(PORTD, 13, 0);
PORT_BWR_PCR_MUX(PORTD, 14, 0);
break;
case kPinmuxType_Peripheral:
// Enable pins for SPI0 on PTD11~14
PORT_BWR_PCR_MUX(PORTD, 11, 2); // SPI0_PCS0 is ALT2 for pin PTD11
PORT_BWR_PCR_MUX(PORTD, 12, 2); // SPI0_SCK is ALT2 for pin PTD12
PORT_BWR_PCR_MUX(PORTD, 13, 2); // SPI0_SOUT is ALT2 for pin PTD13
PORT_BWR_PCR_MUX(PORTD, 14, 2); // SPI0_SIN is ALT2 for pin PTD14
break;
default:
break;
}
break;
#endif // BL_CONFIG_DSPI
default:
break;
}
}
bool is_boot_pin_asserted(void)
{
#ifdef BL_TARGET_FLASH
// Initialize boot pin for GPIO
PORT_BWR_PCR_MUX(BOOTPIN_PORT, BOOTPIN_PIN, 1);
// Set boot pin as an input
GPIO_CLR_PDDR(BOOTPIN_GPIO, 1 << BOOTPIN_PIN);
// Set boot pin pullup enabled, pullup select, filter enable
PORT_SET_PCR(BOOTPIN_PORT, BOOTPIN_PIN, PORT_PCR_PE_MASK | PORT_PCR_PS_MASK | PORT_PCR_PFE_MASK);
unsigned int readCount = 0;
// Sample the pin a number of times
for (unsigned int i = 0; i < BOOTPIN_DEBOUNCE_READ_COUNT; i++)
{
readCount += (GPIO_RD_PDIR(BOOTPIN_GPIO) >> BOOTPIN_PIN) & 1;
}
// boot pin is pulled high so we are measuring lows, make sure most of our measurements
// registered as low
return (readCount < (BOOTPIN_DEBOUNCE_READ_COUNT/2));
#else
// Boot pin for Flash only target
return false;
#endif
}
/* This function is called for configurating pinmux for uart module
* This function only support switching default or gpio or fixed-ALTx mode on fixed pins
* (Although there are many ALTx-pinmux configuration choices on various pins for the same
* peripheral module) */
void uart_pinmux_config(unsigned int instance, pinmux_type_t pinmux)
{
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(UART_TX_PORT, UART_TX_PIN, 0);
PORT_BWR_PCR_MUX(UART_RX_PORT, UART_RX_PIN, 0);
break;
case kPinmuxType_GPIO:
PORT_BWR_PCR_MUX(UART_RX_PORT, UART_RX_PIN, UART_RX_ALT); // Set UART_RX pin in GPIO mode
GPIO_CLR_PDDR(UART_RX_GPIO, 1 << UART_RX_PIN); // Set UART_RX pin as an input
break;
case kPinmuxType_Peripheral:
PORT_BWR_PCR_MUX(UART_TX_PORT, UART_TX_PIN, UART_TX_ALT); // Set UART_RX pin to UART_RX functionality
PORT_BWR_PCR_MUX(UART_RX_PORT, UART_RX_PIN, UART_RX_ALT); // Set UART_TX pin to UART_TX functionality
break;
default:
break;
}
}
/* This function is called for configurating pinmux for i2c module
* This function only support switching default or gpio or fixed-ALTx mode on fixed pins
* (Although there are many ALTx-pinmux configuration choices on various pins for the same
* peripheral module)
*/
void i2c_pinmux_config(unsigned int instance, pinmux_type_t pinmux)
{
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(I2C_SCL_PORT, I2C_SCL_PIN, 0);
PORT_BWR_PCR_MUX(I2C_SCL_PORT, I2C_SCL_PIN, 0);
PORT_BWR_PCR_ODE(I2C_SDA_PORT, I2C_SDA_PIN, 0);
PORT_BWR_PCR_ODE(I2C_SDA_PORT, I2C_SDA_PIN, 0);
break;
case kPinmuxType_Peripheral:
// Enable pins for I2C.
PORT_BWR_PCR_MUX(I2C_SCL_PORT, I2C_SCL_PIN, I2C_SCL_ALT);
PORT_BWR_PCR_MUX(I2C_SCL_PORT, I2C_SCL_PIN, I2C_SDA_ALT);
PORT_BWR_PCR_ODE(I2C_SDA_PORT, I2C_SDA_PIN, 0);
PORT_BWR_PCR_ODE(I2C_SDA_PORT, I2C_SDA_PIN, 0);
break;
}
}
/* This function is called for configurating pinmux for spi module
* This function only support switching default or gpio or fixed-ALTx mode on fixed pins
* (Although there are many ALTx-pinmux configuration choices on various pins for the same
* peripheral module) */
void spi_pinmux_config(unsigned int instance, pinmux_type_t pinmux)
{
switch(pinmux)
{
case kPinmuxType_Default:
PORT_BWR_PCR_MUX(SPI_PCS_PORT, SPI_PCS_PIN, 0);
PORT_BWR_PCR_MUX(SPI_SCK_PORT, SPI_SCK_PIN, 0);
PORT_BWR_PCR_MUX(SPI_SOUT_PORT, SPI_SOUT_PIN, 0);
PORT_BWR_PCR_MUX(SPI_SIN_PORT, SPI_SIN_PIN, 0);
break;
case kPinmuxType_Peripheral:
// Enable pins for SPI
PORT_BWR_PCR_MUX(SPI_PCS_PORT, SPI_PCS_PIN, SPI_PCS_ALT);
PORT_BWR_PCR_MUX(SPI_SCK_PORT, SPI_SCK_PIN, SPI_SCK_ALT);
PORT_BWR_PCR_MUX(SPI_SOUT_PORT, SPI_SOUT_PIN, SPI_SOUT_ALT);
PORT_BWR_PCR_MUX(SPI_SIN_PORT, SPI_SIN_PIN, SPI_SIN_ALT);
break;
default:
break;
}
}
