/**
* @brief Main program.
* @param None
* @retval None
*/
uint32_t main(void)
{
RST_CLK_DeInit();
/* Select HSI/2 as CPU_CLK source*/
RST_CLK_CPU_PLLconfig (RST_CLK_CPU_PLLsrcHSIdiv2,0);
/* Periph clocks enable */
RST_CLK_PCLKcmd((RST_CLK_PCLK_RST_CLK | RST_CLK_PCLK_CAN1),ENABLE);
RST_CLK_PCLKcmd(RST_CLK_PCLK_PORTD,ENABLE);
/* Reset PORTD settings */
PORT_DeInit(MDR_PORTD);
/* Configure PORTD pins 10,11 for output to switch LED on/off */
PORT_InitStructure.PORT_FUNC = PORT_FUNC_PORT;
PORT_InitStructure.PORT_Pin = PORT_Pin_10 | PORT_Pin_11;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
/* CAN transmit at 125Kb/s and receive by polling in loopback mode */
TestRx = CAN_Polling();
if (TestRx == FAILED)
{
/* Turn on led LED2 */
LEDOn(LED2);
}
else
{
/* Turn on led LED1 */
LEDOn(LED1);
}
while(1);
}
void COMPARATOR_IRQHandler(void) {
uint32_t dwt_time_mark;
// Save all settings to EEPROM here
// When we get here, main power supply is off and MCU operates from on-board capacitors
// Disable all power-consuming devices and reduce F_CPU
__disable_irq();
PORT_DeInit(MDR_PORTA);
PORT_DeInit(MDR_PORTB);
PORT_DeInit(MDR_PORTC);
PORT_DeInit(MDR_PORTD);
PORT_DeInit(MDR_PORTE);
PORT_DeInit(MDR_PORTF);
DAC2_Cmd(DISABLE);
hw_Switch_CPU_Clock_to_HSI();
if (device_mode == MODE_NORMAL) {
// Gather settings and states from all modules (using global variable settings)
DAC_SaveSettings();
// Add more modules if required
EE_SaveSettings();
} else {
// Gather system settings
DAC_SaveCalibration();
ADC_LC_SaveCalibration();
ADC_LV_SaveCalibration();
ExtADC_SaveCalibration();
LCD_SaveContrastSetting();
Sound_SaveSetting();
EE_SaveSystemSettings();
}
dwt_time_mark = DWT_StartDelayUs(500000 / 4); // F_CPU is 32MHz, but here MCU operates on HSI which is 8MHz
// Safely wait until power suply goes down
while (DWT_DelayInProgress(dwt_time_mark)) {
IWDG_ReloadCounter();
}
// If power supply is still preset and MCU gets here, there was false triggering
// Stop resetting watchdog - MCU will soon be rebooted
while(1);
}
void main(void)
#endif
{
uint32_t i;
RST_CLK_DeInit();
RST_CLK_CPU_PLLconfig (RST_CLK_CPU_PLLsrcHSIdiv2,0);
/* Enable peripheral clocks --------------------------------------------------*/
RST_CLK_PCLKcmd((RST_CLK_PCLK_RST_CLK | RST_CLK_PCLK_TIMER1 | RST_CLK_PCLK_DMA),ENABLE);
RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTA), ENABLE);
/* Init NVIC */
SCB->AIRCR = 0x05FA0000 | ((uint32_t)0x500);
SCB->VTOR = 0x08000000;
/* Disable all interrupt */
NVIC->ICPR[0] = 0xFFFFFFFF;
NVIC->ICER[0] = 0xFFFFFFFF;
/* Disable all DMA request */
MDR_DMA->CHNL_REQ_MASK_CLR = 0xFFFFFFFF;
MDR_DMA->CHNL_USEBURST_CLR = 0xFFFFFFFF;
/* Reset PORTB settings */
PORT_DeInit(MDR_PORTB);
/* Reset PORTF settings */
PORT_DeInit(MDR_PORTF);
/* Configure TIMER1 pins: CH1, CH2 */
/* Configure PORTA pins 1, 3 */
PORT_InitStructure.PORT_Pin = PORT_Pin_1;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_ALTER;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
PORT_InitStructure.PORT_Pin = PORT_Pin_3;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
/* Init RAM */
Init_RAM (DstBuf, BufferSize);
/* Reset all TIMER1 settings */
TIMER_DeInit(MDR_TIMER1);
TIMER_BRGInit(MDR_TIMER1,TIMER_HCLKdiv1);
/* TIM1 configuration ------------------------------------------------*/
/* Initializes the TIMERx Counter ------------------------------------*/
sTIM_CntInit.TIMER_Prescaler = 0x10;
sTIM_CntInit.TIMER_Period = 0x200;
sTIM_CntInit.TIMER_CounterMode = TIMER_CntMode_ClkFixedDir;
sTIM_CntInit.TIMER_CounterDirection = TIMER_CntDir_Up;
sTIM_CntInit.TIMER_EventSource = TIMER_EvSrc_None;
sTIM_CntInit.TIMER_FilterSampling = TIMER_FDTS_TIMER_CLK_div_1;
sTIM_CntInit.TIMER_ARR_UpdateMode = TIMER_ARR_Update_Immediately;
sTIM_CntInit.TIMER_ETR_FilterConf = TIMER_Filter_1FF_at_TIMER_CLK;
sTIM_CntInit.TIMER_ETR_Prescaler = TIMER_ETR_Prescaler_None;
sTIM_CntInit.TIMER_ETR_Polarity = TIMER_ETRPolarity_NonInverted;
sTIM_CntInit.TIMER_BRK_Polarity = TIMER_BRKPolarity_NonInverted;
TIMER_CntInit (MDR_TIMER1,&sTIM_CntInit);
/* Initializes the TIMER1 Channel1 -------------------------------------*/
TIMER_ChnStructInit(&sTIM_ChnInit);
sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL1;
sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_PWM;
sTIM_ChnInit.TIMER_CH_REF_Format = TIMER_CH_REF_Format3;
TIMER_ChnInit(MDR_TIMER1, &sTIM_ChnInit);
TIMER_SetChnCompare(MDR_TIMER1, TIMER_CHANNEL1, 0x100);
/* Initializes the TIMER1 Channel1 Output -------------------------------*/
TIMER_ChnOutStructInit(&sTIM_ChnOutInit);
sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL1;
sTIM_ChnOutInit.TIMER_CH_DirOut_Polarity = TIMER_CHOPolarity_NonInverted;
sTIM_ChnOutInit.TIMER_CH_DirOut_Source = TIMER_CH_OutSrc_REF;
sTIM_ChnOutInit.TIMER_CH_DirOut_Mode = TIMER_CH_OutMode_Output;
TIMER_ChnOutInit(MDR_TIMER1, &sTIM_ChnOutInit);
/* Initializes the TIMER1 Channel2 -------------------------------------*/
TIMER_ChnStructInit(&sTIM_ChnInit);
sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL2;
sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_CAPTURE;
TIMER_ChnInit(MDR_TIMER1, &sTIM_ChnInit);
/* Initializes the TIMER1 Channel2 Output -------------------------------*/
TIMER_ChnOutStructInit(&sTIM_ChnOutInit);
sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL2;
sTIM_ChnOutInit.TIMER_CH_DirOut_Polarity = TIMER_CHOPolarity_NonInverted;
sTIM_ChnOutInit.TIMER_CH_DirOut_Source = TIMER_CH_OutSrc_Only_0;
sTIM_ChnOutInit.TIMER_CH_DirOut_Mode = TIMER_CH_OutMode_Input;
TIMER_ChnOutInit(MDR_TIMER1, &sTIM_ChnOutInit);
/* Enable TIMER1 DMA request */
TIMER_DMACmd(MDR_TIMER1,(TIMER_STATUS_CCR_CAP_CH2), ENABLE);
/* Reset all DMA settings */
DMA_DeInit();
DMA_StructInit(&DMA_InitStr);
/* DMA_Channel_TIM1 configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t)(&(MDR_TIMER1->CCR2));
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t)DstBuf;
DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncNo;
DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncHalfword;
DMA_PriCtrlStr.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_PriCtrlStr.DMA_Mode = DMA_Mode_Basic;
DMA_PriCtrlStr.DMA_CycleSize = BufferSize;
DMA_PriCtrlStr.DMA_NumContinuous = DMA_Transfers_1;
DMA_PriCtrlStr.DMA_SourceProtCtrl = DMA_SourcePrivileged;
DMA_PriCtrlStr.DMA_DestProtCtrl = DMA_DestPrivileged;
/* Set Channel Structure */
DMA_InitStr.DMA_PriCtrlData = &DMA_PriCtrlStr;
DMA_InitStr.DMA_Priority = DMA_Priority_High;
DMA_InitStr.DMA_UseBurst = DMA_BurstClear;
DMA_InitStr.DMA_SelectDataStructure = DMA_CTRL_DATA_PRIMARY;
/* Init DMA channel */
DMA_Init(DMA_Channel_TIM1, &DMA_InitStr);
/* Enable TIMER1 */
TIMER_Cmd(MDR_TIMER1,ENABLE);
/* Transfer complete */
while((DMA_GetFlagStatus(DMA_Channel_TIM1, DMA_FLAG_CHNL_ENA)))
{
}
/* Check the corectness of written dada */
for(i = 0; i < BufferSize; i++)
{
if (DstBuf[i] != MDR_TIMER1->CCR1)
{
TransferStatus &= FAILED;
break;
}
else
{
TransferStatus = PASSED;
}
}
/* TransferStatus = PASSED, if the data transmitted are correct */
/* TransferStatus = FAILED, if the data transmitted are not correct */
while(1)
{
}
}
void main(void)
#endif
{
RST_CLK_DeInit();
RST_CLK_CPU_PLLconfig (RST_CLK_CPU_PLLsrcHSIdiv2,0);
/* Enable peripheral clocks --------------------------------------------------*/
RST_CLK_PCLKcmd((RST_CLK_PCLK_RST_CLK | RST_CLK_PCLK_SSP1 | RST_CLK_PCLK_SSP2 | RST_CLK_PCLK_DMA),ENABLE);
RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTF | RST_CLK_PCLK_PORTD), ENABLE);
/* Init NVIC */
SCB->AIRCR = 0x05FA0000 | ((uint32_t)0x500);
SCB->VTOR = 0x08000000;
/* Disable all interrupt */
NVIC->ICPR[0] = 0xFFFFFFFF;
NVIC->ICER[0] = 0xFFFFFFFF;
/* Disable all DMA request */
MDR_DMA->CHNL_REQ_MASK_CLR = 0xFFFFFFFF;
MDR_DMA->CHNL_USEBURST_CLR = 0xFFFFFFFF;
/* Reset PORTD settings */
PORT_DeInit(MDR_PORTD);
/* Reset PORTF settings */
PORT_DeInit(MDR_PORTF);
/* Configure SSP2 pins: FSS, CLK, RXD, TXD */
/* Configure PORTD pins 2, 3, 5, 6 */
PORT_InitStructure.PORT_Pin = (PORT_Pin_2 | PORT_Pin_3 | PORT_Pin_5);
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_ALTER;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_Pin = (PORT_Pin_6);
PORT_Init(MDR_PORTD, &PORT_InitStructure);
/* Configure SSP1 pins: FSS, CLK, RXD, TXD */
/* Configure PORTF pins 0, 1, 2, 3 */
PORT_InitStructure.PORT_Pin = (PORT_Pin_3);
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_Init(MDR_PORTF, &PORT_InitStructure);
PORT_InitStructure.PORT_Pin = (PORT_Pin_0 | PORT_Pin_1 | PORT_Pin_2);
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTF, &PORT_InitStructure);
/* Init RAM */
Init_RAM (DstBuf1, BufferSize);
Init_RAM (SrcBuf1, BufferSize);
Init_RAM (DstBuf2, BufferSize);
Init_RAM (SrcBuf2, BufferSize);
/* Reset all SSP settings */
SSP_DeInit(MDR_SSP1);
SSP_DeInit(MDR_SSP2);
SSP_BRGInit(MDR_SSP1,SSP_HCLKdiv16);
SSP_BRGInit(MDR_SSP2,SSP_HCLKdiv16);
/* SSP1 MASTER configuration ------------------------------------------------*/
SSP_StructInit (&sSSP);
sSSP.SSP_SCR = 0x10;
sSSP.SSP_CPSDVSR = 2;
sSSP.SSP_Mode = SSP_ModeMaster;
sSSP.SSP_WordLength = SSP_WordLength16b;
sSSP.SSP_SPH = SSP_SPH_1Edge;
sSSP.SSP_SPO = SSP_SPO_Low;
sSSP.SSP_FRF = SSP_FRF_SPI_Motorola;
sSSP.SSP_HardwareFlowControl = SSP_HardwareFlowControl_SSE;
SSP_Init (MDR_SSP1,&sSSP);
/* SSP2 SLAVE configuration ------------------------------------------------*/
sSSP.SSP_SPH = SSP_SPH_1Edge;
sSSP.SSP_SPO = SSP_SPO_Low;
sSSP.SSP_CPSDVSR = 12;
sSSP.SSP_Mode = SSP_ModeSlave;
SSP_Init (MDR_SSP2,&sSSP);
/* Enable SSP1 DMA Rx and Tx request */
SSP_DMACmd(MDR_SSP1,(SSP_DMA_RXE | SSP_DMA_TXE), ENABLE);
/* Enable SSP2 DMA Rx and Tx request */
SSP_DMACmd(MDR_SSP2,(SSP_DMA_RXE | SSP_DMA_TXE), ENABLE);
/* Reset all DMA settings */
DMA_DeInit();
DMA_StructInit(&DMA_InitStr);
/* DMA_Channel_SSP1_RX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t)(&(MDR_SSP1->DR));
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t)DstBuf1;
DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncNo;
DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncHalfword;
DMA_PriCtrlStr.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_PriCtrlStr.DMA_Mode = DMA_Mode_Basic;
DMA_PriCtrlStr.DMA_CycleSize = BufferSize;
DMA_PriCtrlStr.DMA_NumContinuous = DMA_Transfers_4;
DMA_PriCtrlStr.DMA_SourceProtCtrl = DMA_SourcePrivileged;
DMA_PriCtrlStr.DMA_DestProtCtrl = DMA_DestPrivileged;
/* Set Channel Structure */
DMA_InitStr.DMA_PriCtrlData = &DMA_PriCtrlStr;
DMA_InitStr.DMA_Priority = DMA_Priority_High;
DMA_InitStr.DMA_UseBurst = DMA_BurstClear;
DMA_InitStr.DMA_SelectDataStructure = DMA_CTRL_DATA_PRIMARY;
/* Init DMA channel */
DMA_Init(DMA_Channel_SSP1_RX, &DMA_InitStr);
/* DMA_Channel_SSP2_RX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t)(&(MDR_SSP2->DR));
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t)DstBuf2;
/* Init DMA channel */
DMA_Init(DMA_Channel_SSP2_RX, &DMA_InitStr);
/* DMA_Channel_SSP1_TX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t)SrcBuf1;
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t)(&(MDR_SSP1->DR));
DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncHalfword;
DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncNo;
DMA_InitStr.DMA_Priority = DMA_Priority_Default;
/* Init DMA channel */
DMA_Init(DMA_Channel_SSP1_TX, &DMA_InitStr);
/* DMA_Channel_SSP2_TX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t)SrcBuf2;
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t)(&(MDR_SSP2->DR));
/* Init DMA channel */
DMA_Init(DMA_Channel_SSP2_TX, &DMA_InitStr);
/* Enable SSP1 */
SSP_Cmd(MDR_SSP1, ENABLE);
/* Enable SSP2 */
SSP_Cmd(MDR_SSP2, ENABLE);
/* Transfer complete */
while((SSP_GetFlagStatus(MDR_SSP1, SSP_FLAG_BSY)))
{
}
while((SSP_GetFlagStatus(MDR_SSP2, SSP_FLAG_BSY)))
{
}
/* Check the corectness of written dada */
TransferStatus1 = Verif_mem ((BufferSize), SrcBuf1, DstBuf2);
TransferStatus2 = Verif_mem ((BufferSize), SrcBuf2, DstBuf1);
/* TransferStatus1, TransferStatus2 = PASSED, if the data transmitted and received
are correct */
/* TransferStatus1, TransferStatus2 = FAILED, if the data transmitted and received
are different */
while(1)
{
}
}
void main(void)
#endif
{
RST_CLK_DeInit();
RST_CLK_CPU_PLLconfig(RST_CLK_CPU_PLLsrcHSIdiv2, 0);
/* Enable peripheral clocks --------------------------------------------------*/
RST_CLK_PCLKcmd(
(RST_CLK_PCLK_RST_CLK |
RST_CLK_PCLK_UART1 |
RST_CLK_PCLK_UART2 |
RST_CLK_PCLK_DMA),
ENABLE);
RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTC | RST_CLK_PCLK_PORTD), ENABLE);
/* Disable all DMA request */
MDR_DMA ->CHNL_REQ_MASK_CLR = 0xFFFFFFFF;
MDR_DMA ->CHNL_USEBURST_CLR = 0xFFFFFFFF;
/* Reset PORTC settings */
PORT_DeInit(MDR_PORTC );
/* Reset PORTC settings */
PORT_DeInit(MDR_PORTD );
/* Configure UART1 pins: RXD, TXD */
/* Configure PORTB pins 3, 4 */
PORT_InitStructure.PORT_Pin = PORT_Pin_4;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_MAIN;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_Init(MDR_PORTC, &PORT_InitStructure);
PORT_InitStructure.PORT_Pin = PORT_Pin_3;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTC, &PORT_InitStructure);
/* Configure UART2 pins: RXD, TXD */
/* Configure PORTF pins 13, 14 */
PORT_InitStructure.PORT_Pin = PORT_Pin_14;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_MAIN;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
PORT_InitStructure.PORT_Pin = (PORT_Pin_13);
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
/* Init RAM */
Init_RAM(DstBuf1, BufferSize);
Init_RAM(SrcBuf1, BufferSize);
Init_RAM(DstBuf2, BufferSize);
Init_RAM(SrcBuf2, BufferSize);
/* Reset all UART settings */
UART_DeInit(MDR_UART1 );
UART_DeInit(MDR_UART2 );
UART_BRGInit(MDR_UART1, UART_HCLKdiv1 );
UART_BRGInit(MDR_UART2, UART_HCLKdiv1 );
/* UART1 configuration ------------------------------------------------*/
UART_StructInit(&sUART);
sUART.UART_BaudRate = 1200;
sUART.UART_WordLength = UART_WordLength8b;
sUART.UART_StopBits = UART_StopBits1;
sUART.UART_Parity = UART_Parity_No;
sUART.UART_FIFOMode = UART_FIFO_ON;
sUART.UART_HardwareFlowControl = (UART_HardwareFlowControl_RXE
| UART_HardwareFlowControl_TXE );
UART_Init(MDR_UART1, &sUART);
UART_DMAConfig( MDR_UART1,
UART_IT_FIFO_LVL_8words,
UART_IT_FIFO_LVL_8words );
/* UART2 configuration ------------------------------------------------*/
UART_Init(MDR_UART2, &sUART);
UART_DMAConfig(MDR_UART2,
UART_IT_FIFO_LVL_8words,
UART_IT_FIFO_LVL_8words );
/* Enable UART1 DMA Rx and Tx request */
UART_DMACmd(MDR_UART1, (UART_DMA_RXE | UART_DMA_TXE ), ENABLE);
/* Enable UART2 DMA Rx and Tx request */
UART_DMACmd(MDR_UART2, (UART_DMA_RXE | UART_DMA_TXE ), ENABLE);
/* Reset all DMA settings */
DMA_DeInit();
DMA_StructInit(&DMA_InitStr);
/* DMA_Channel_UART1_RX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t) (&(MDR_UART1 ->DR));
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t) DstBuf1;
DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncNo;
DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncByte;
DMA_PriCtrlStr.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_PriCtrlStr.DMA_Mode = DMA_Mode_Basic;
DMA_PriCtrlStr.DMA_CycleSize = BufferSize;
DMA_PriCtrlStr.DMA_NumContinuous = DMA_Transfers_8;
DMA_PriCtrlStr.DMA_SourceProtCtrl = DMA_SourcePrivileged;
DMA_PriCtrlStr.DMA_DestProtCtrl = DMA_DestPrivileged;
/* Set Channel Structure */
DMA_InitStr.DMA_PriCtrlData = &DMA_PriCtrlStr;
DMA_InitStr.DMA_Priority = DMA_Priority_High;
DMA_InitStr.DMA_UseBurst = DMA_BurstClear;
DMA_InitStr.DMA_SelectDataStructure = DMA_CTRL_DATA_PRIMARY;
/* Init DMA channel */
DMA_Init(DMA_Channel_REQ_UART1_RX, &DMA_InitStr);
/* DMA_Channel_UART2_RX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t) (&(MDR_UART2 ->DR));
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t) DstBuf2;
/* Init DMA channel */
DMA_Init(DMA_Channel_REQ_UART2_RX, &DMA_InitStr);
/* DMA_Channel_UART1_TX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t) SrcBuf1;
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t) (&(MDR_UART1 ->DR));
DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncByte;
DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncNo;
DMA_InitStr.DMA_Priority = DMA_Priority_Default;
/* Init DMA channel */
DMA_Init(DMA_Channel_REQ_UART1_TX, &DMA_InitStr);
/* DMA_Channel_UART2_TX configuration ---------------------------------*/
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t) SrcBuf2;
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t) (&(MDR_UART2 ->DR));
/* Init DMA channel */
DMA_Init(DMA_Channel_REQ_UART2_TX, &DMA_InitStr);
/* Enable UART1 */
UART_Cmd(MDR_UART1, ENABLE);
/* Enable UART2 */
UART_Cmd(MDR_UART2, ENABLE);
/* Transfer complete */
while ((DMA_GetFlagStatus(DMA_Channel_REQ_UART1_TX, DMA_FLAG_CHNL_ENA )));
while ((DMA_GetFlagStatus(DMA_Channel_REQ_UART1_RX, DMA_FLAG_CHNL_ENA )));
while ((DMA_GetFlagStatus(DMA_Channel_REQ_UART2_TX, DMA_FLAG_CHNL_ENA )));
while ((DMA_GetFlagStatus(DMA_Channel_REQ_UART2_RX, DMA_FLAG_CHNL_ENA )));
/* Check the corectness of written dada */
TransferStatus1 = Verif_mem((BufferSize / 2), SrcBuf1, DstBuf2);
TransferStatus2 = Verif_mem((BufferSize / 2), SrcBuf2, DstBuf1);
/* TransferStatus1, TransferStatus2 = PASSED, if the data transmitted and received
are correct */
/* TransferStatus1, TransferStatus2 = FAILED, if the data transmitted and received
are different */
while (1);
}
void main(void)
#endif
{
ClockConfigure();
#if defined (_USE_DEBUG_UART_)
DebugUARTInit();
#endif /* #if defined (_USE_DEBUG_UART_) */
/* Enable peripheral clocks ----------------------------------------------*/
RST_CLK_PCLKcmd((RST_CLK_PCLK_RST_CLK |
RST_CLK_PCLK_ADC |
RST_CLK_PCLK_PORTD |
RST_CLK_PCLK_PORTB),
ENABLE);
/* Reset PORTD settings */
PORT_DeInit(MDR_PORTD );
/* Configure ADC pin: ADC2 */
/* Configure PORTD pin 9 */
PORT_InitStructure.PORT_Pin = PORT_Pin_9;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_InitStructure.PORT_MODE = PORT_MODE_ANALOG;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
/* Configure PORTB pins 0, 1 for output to switch LED1,2 on/off */
/* Configure PORTB pins 0, 1 */
PORT_InitStructure.PORT_FUNC = PORT_FUNC_PORT;
PORT_InitStructure.PORT_Pin = PORT_Pin_0 | PORT_Pin_1;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_MAXFAST;
PORT_Init(MDR_PORTB, &PORT_InitStructure);
/* ADC Configuration */
/* Reset all ADC settings */
ADC_DeInit();
DEBUG_PRINTF("ADC Init...");
// Inti clock ADC
RST_CLK_ADCclkSelection(RST_CLK_ADCclkCPU_C1);
RST_CLK_ADCclkPrescaler(RST_CLK_ADCclkDIV2);
// Enable clock ADC
RST_CLK_ADCclkEnable(ENABLE);
RST_CLK_PCLKcmd(RST_CLK_PCLK_ADC, ENABLE);
ADC_StructInit(&sADC);
sADC.ADC_StartDelay = 0;
sADC.ADC_TempSensor = ADC_TEMP_SENSOR_Enable;
sADC.ADC_TempSensorAmplifier = ADC_TEMP_SENSOR_AMPLIFIER_Enable;
sADC.ADC_TempSensorConversion = ADC_TEMP_SENSOR_CONVERSION_Disable;
sADC.ADC_IntVRefConversion = ADC_VREF_CONVERSION_Disable;
sADC.ADC_IntVRefTrimming = 0;
sADC.ADC_IntVRefAmplifier = ADC_INT_VREF_AMPLIFIER_Enable;
ADC_Init(&sADC);
ADCx_StructInit(&sADCx);
sADCx.ADC_ClockSource = ADC_CLOCK_SOURCE_CPU;
sADCx.ADC_SamplingMode = ADC_SAMPLING_MODE_CICLIC_CONV;
sADCx.ADC_ChannelSwitching = ADC_CH_SWITCHING_Disable;
sADCx.ADC_ChannelNumber = ADC_CH_ADC2;
sADCx.ADC_Channels = 0;
sADCx.ADC_LevelControl = ADC_LEVEL_CONTROL_Enable;
sADCx.ADC_LowLevel = L_Level;
sADCx.ADC_HighLevel = H_Level;
sADCx.ADC_VRefSource = ADC_VREF_SOURCE_INTERNAL;
sADCx.ADC_IntVRefSource = ADC_INT_VREF_SOURCE_INEXACT;
sADCx.ADC_Prescaler = ADC_CLK_div_16;
sADCx.ADC_DelayGo = 0xF;
ADC1_Init(&sADCx);
/* Enable ADC1 EOCIF and AWOIFEN interupts */
ADC1_ITConfig((ADCx_IT_END_OF_CONVERSION | ADCx_IT_OUT_OF_RANGE), ENABLE);
NVIC_EnableIRQ(ADC_IRQn);
/* ADC1 enable */
ADC1_Cmd(ENABLE);
while (1);
}
//-----------------------------------------------------------------//
// Setup IO Ports
//-----------------------------------------------------------------//
void HW_PortInit(void)
{
PORT_InitTypeDef PORT_InitStructure;
PORT_DeInit(MDR_PORTA);
PORT_DeInit(MDR_PORTB);
PORT_DeInit(MDR_PORTC);
PORT_DeInit(MDR_PORTD);
PORT_DeInit(MDR_PORTE);
PORT_DeInit(MDR_PORTF);
// default output value is 0
// Set some outputs the default design values of 1
//PORT_SetBits(MDR_PORTA, (1<<BUZ1) | (1<<BUZ2) );
PORT_SetBits(MDR_PORTB, (1<<LGREEN) | (1<<LRED) );
/*
Reset PORT initialization structure parameters values
PORT_InitStruct->PORT_Pin = PORT_Pin_All;
PORT_InitStruct->PORT_OE = PORT_OE_IN;
PORT_InitStruct->PORT_PULL_UP = PORT_PULL_UP_OFF;
PORT_InitStruct->PORT_PULL_DOWN = PORT_PULL_DOWN_OFF;
PORT_InitStruct->PORT_PD_SHM = PORT_PD_SHM_OFF;
PORT_InitStruct->PORT_PD = PORT_PD_DRIVER;
PORT_InitStruct->PORT_GFEN = PORT_GFEN_OFF;
PORT_InitStruct->PORT_FUNC = PORT_FUNC_PORT;
PORT_InitStruct->PORT_SPEED = PORT_OUTPUT_OFF;
PORT_InitStruct->PORT_MODE = PORT_MODE_ANALOG;
*/
//================= PORTA =================//
PORT_StructInit(&PORT_InitStructure);
// Typical digital inputs:
PORT_InitStructure.PORT_Pin = (1<<OVERLD) | (1<<ENC_BTN);
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
// Digital input with pull-up
PORT_InitStructure.PORT_Pin = (1<<EEN);
PORT_InitStructure.PORT_PULL_UP = PORT_PULL_UP_ON;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
// Typical digital outputs:
PORT_InitStructure.PORT_Pin = (1<<CLIM_SEL);
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
// Timer outputs to buzzer (TMR1.CH2, TMR1.CH2N)
PORT_InitStructure.PORT_Pin = (1<<BUZ1) | (1<<BUZ2);
PORT_InitStructure.PORT_FUNC = PORT_FUNC_ALTER;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
// USART1 pins
PORT_StructInit(&PORT_InitStructure);
// TX pin
PORT_InitStructure.PORT_Pin = 1<<TXD1;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_OVERRID;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
// RX pin
PORT_InitStructure.PORT_Pin = 1<<RXD1;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_Init(MDR_PORTA, &PORT_InitStructure);
// debug
/* PORT_StructInit(&PORT_InitStructure);
PORT_InitStructure.PORT_Pin = (1<<TXD1) | (1<<RXD1);
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_Init(MDR_PORTA, &PORT_InitStructure); */
//================= PORTB =================//
PORT_StructInit(&PORT_InitStructure);
// Typical digital inputs: buttons and encoder
PORT_InitStructure.PORT_Pin = (1<<SB_ESC) | (1<<SB_LEFT) | (1<<SB_RIGHT) | (1<<SB_OK) | (1<<SB_MODE) | (1<<ENCA) | (1<<ENCB) | (1<<PG) ;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_Init(MDR_PORTB, &PORT_InitStructure);
// Power good
// TODO: add interrupt
PORT_InitStructure.PORT_Pin = (1<<PG) ;
PORT_Init(MDR_PORTB, &PORT_InitStructure);
// Leds and buttons SB_ON, SB_OFF
PORT_InitStructure.PORT_Pin = (1<<LGREEN) | (1<<LRED);
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_Init(MDR_PORTB, &PORT_InitStructure);
//================= PORTC =================//
PORT_StructInit(&PORT_InitStructure);
// LCD Backlight (TMR3.CH1)
PORT_InitStructure.PORT_Pin = (1<<LCD_BL);
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_ALTER;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_Init(MDR_PORTC, &PORT_InitStructure);
// I2C
PORT_InitStructure.PORT_Pin = (1<<SCL) | (1<<SDA);
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_Init(MDR_PORTC, &PORT_InitStructure);
//================= PORTD =================//
PORT_StructInit(&PORT_InitStructure);
// Analog functions
PORT_InitStructure.PORT_Pin = (1<<VREF_P) | (1<<VREF_N) | (1<<TEMP_IN) | (1<<UADC) | (1<<IADC) ;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
// LCD CLK and CS
PORT_InitStructure.PORT_Pin = (1<<LCD_CLK) | (1<<LCD_CS) ;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_ALTER;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
// MOSI
PORT_InitStructure.PORT_Pin = (1<<LCD_MOSI);
PORT_InitStructure.PORT_PULL_DOWN = PORT_PULL_DOWN_ON;
PORT_Init(MDR_PORTD, &PORT_InitStructure);
//================= PORTE =================//
PORT_StructInit(&PORT_InitStructure);
// LCD RST and SEL, Load disable output
PORT_InitStructure.PORT_Pin = (1<<LCD_RST) | (1<<LCD_SEL) | (1<<LDIS);
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTE, &PORT_InitStructure);
// cooler PWM output (TMR3.CH3N)
PORT_InitStructure.PORT_Pin = (1<<CPWM);
PORT_InitStructure.PORT_FUNC = PORT_FUNC_OVERRID;
PORT_Init(MDR_PORTE, &PORT_InitStructure);
// voltage and current PWM outputs (TMR2.CH1N, TMR2.CH3N)
PORT_InitStructure.PORT_Pin = (1<<UPWM) | (1<<IPWM);
PORT_InitStructure.PORT_FUNC = PORT_FUNC_ALTER;
PORT_Init(MDR_PORTE, &PORT_InitStructure);
//================= PORTF =================//
PORT_StructInit(&PORT_InitStructure);
// Feedback channel select, converter enable
PORT_InitStructure.PORT_Pin = (1<<EN) | (1<<STAB_SEL) ;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_SLOW;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTF, &PORT_InitStructure);
// USART2 functions
PORT_StructInit(&PORT_InitStructure);
// TX pin
PORT_InitStructure.PORT_Pin = 1<<TXD2;
PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL;
PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST;
PORT_InitStructure.PORT_FUNC = PORT_FUNC_OVERRID;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_Init(MDR_PORTF, &PORT_InitStructure);
// RX pin
PORT_InitStructure.PORT_Pin = 1<<RXD2;
PORT_InitStructure.PORT_OE = PORT_OE_IN;
PORT_Init(MDR_PORTF, &PORT_InitStructure);
}
void main(void)
#endif
{
RST_CLK_DeInit();
RST_CLK_CPU_PLLconfig (RST_CLK_CPU_PLLsrcHSIdiv2,0);
/* Enable peripheral clocks --------------------------------------------------*/
RST_CLK_PCLKcmd((RST_CLK_PCLK_RST_CLK | RST_CLK_PCLK_DMA | RST_CLK_PCLK_PORTE),ENABLE);
RST_CLK_PCLKcmd((RST_CLK_PCLK_TIMER1 | RST_CLK_PCLK_DAC),ENABLE);
RST_CLK_PCLKcmd((RST_CLK_PCLK_SSP1 | RST_CLK_PCLK_SSP2),ENABLE);
/* Disable all interrupt */
NVIC->ICPR[0] = 0xFFFFFFFF;
NVIC->ICER[0] = 0xFFFFFFFF;
/* Reset PORTE settings */
PORT_DeInit(MDR_PORTE);
/* Configure DAC pin: DAC1_OUT */
/* Configure PORTE pin 9 */
PORT_InitStructure.PORT_Pin = PORT_Pin_2;
PORT_InitStructure.PORT_OE = PORT_OE_OUT;
PORT_InitStructure.PORT_MODE = PORT_MODE_ANALOG;
PORT_Init(MDR_PORTE, &PORT_InitStructure);
/* DMA Configuration */
/* Reset all DMA settings */
DMA_DeInit();
DMA_StructInit(&DMA_InitStr);
/* Set Primary Control Data */
DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t)Sine12bit;
DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t)(&(MDR_DAC->DAC1_DATA));
DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncHalfword;
DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncNo;
DMA_PriCtrlStr.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_PriCtrlStr.DMA_Mode = DMA_Mode_PingPong;
DMA_PriCtrlStr.DMA_CycleSize = 32;
DMA_PriCtrlStr.DMA_NumContinuous = DMA_Transfers_1;
DMA_PriCtrlStr.DMA_SourceProtCtrl = DMA_SourcePrivileged;
DMA_PriCtrlStr.DMA_DestProtCtrl = DMA_DestPrivileged;
/* Set Alternate Control Data */
DMA_AltCtrlStr.DMA_SourceBaseAddr = (uint32_t)Sine12bit;
DMA_AltCtrlStr.DMA_DestBaseAddr = (uint32_t)(&(MDR_DAC->DAC1_DATA));
DMA_AltCtrlStr.DMA_SourceIncSize = DMA_SourceIncHalfword;
DMA_AltCtrlStr.DMA_DestIncSize = DMA_DestIncNo;
DMA_AltCtrlStr.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_AltCtrlStr.DMA_Mode = DMA_Mode_PingPong;
DMA_AltCtrlStr.DMA_CycleSize = 32;
DMA_AltCtrlStr.DMA_NumContinuous = DMA_Transfers_1;
DMA_AltCtrlStr.DMA_SourceProtCtrl = DMA_SourcePrivileged;
DMA_AltCtrlStr.DMA_DestProtCtrl = DMA_DestPrivileged;
/* Set Channel Structure */
DMA_InitStr.DMA_PriCtrlData = &DMA_PriCtrlStr;
DMA_InitStr.DMA_AltCtrlData = &DMA_AltCtrlStr;
DMA_InitStr.DMA_Priority = DMA_Priority_Default;
DMA_InitStr.DMA_UseBurst = DMA_BurstClear;
DMA_InitStr.DMA_SelectDataStructure = DMA_CTRL_DATA_PRIMARY;
/* Init DMA channel TIM1*/
DMA_Init(DMA_Channel_REQ_TIM1, &DMA_InitStr);
/* Enable dma_req or dma_sreq to generate DMA request */
MDR_DMA->CHNL_REQ_MASK_CLR = DMA_SELECT(DMA_Channel_REQ_TIM1);
MDR_DMA->CHNL_USEBURST_CLR = DMA_SELECT(DMA_Channel_REQ_TIM1);
/* Enable DMA_Channel_TIM1 */
DMA_Cmd(DMA_Channel_REQ_TIM1, ENABLE);
/* ADC Configuration */
/* Reset all ADC settings */
DAC_DeInit();
/* DAC channel1 Configuration */
DAC1_Init(DAC1_AVCC);
/* DAC channel1 enable */
DAC1_Cmd(ENABLE);
/* TIMER1 Configuration */
/* Time base configuration */
TIMER_DeInit(MDR_TIMER1);
TIMER_BRGInit(MDR_TIMER1,TIMER_HCLKdiv1);
sTIM_CntInit.TIMER_Prescaler = 0;
sTIM_CntInit.TIMER_Period = 0xFF;
sTIM_CntInit.TIMER_CounterMode = TIMER_CntMode_ClkFixedDir;
sTIM_CntInit.TIMER_CounterDirection = TIMER_CntDir_Up;
sTIM_CntInit.TIMER_EventSource = TIMER_EvSrc_None;
sTIM_CntInit.TIMER_FilterSampling = TIMER_FDTS_TIMER_CLK_div_1;
sTIM_CntInit.TIMER_ARR_UpdateMode = TIMER_ARR_Update_Immediately;
sTIM_CntInit.TIMER_ETR_FilterConf = TIMER_Filter_1FF_at_TIMER_CLK;
sTIM_CntInit.TIMER_ETR_Prescaler = TIMER_ETR_Prescaler_None;
sTIM_CntInit.TIMER_ETR_Polarity = TIMER_ETRPolarity_NonInverted;
sTIM_CntInit.TIMER_BRK_Polarity = TIMER_BRKPolarity_NonInverted;
TIMER_CntInit (MDR_TIMER1,&sTIM_CntInit);
/* Enable DMA for TIMER1 */
TIMER_DMACmd(MDR_TIMER1, TIMER_STATUS_CNT_ARR, TIMER_DMA_Channel0, ENABLE);
/* TIMER1 enable counter */
TIMER_Cmd(MDR_TIMER1,ENABLE);
/* Enable DMA IRQ */
NVIC_EnableIRQ(DMA_IRQn);
/* Infinite loop */
while(1)
{
}
}