static void hisfc350_show_spi(struct hisfc_spi *spi)
{
char buf[20];
PR_MSG("Spi(cs%d): ", spi->chipselect);
PR_MSG("Block:%sB ", ultohstr((unsigned long long)spi->erasesize,
buf, sizeof(buf)));
PR_MSG("Chip:%sB ", ultohstr(spi->chipsize, buf, sizeof(buf)));
PR_MSG("Name:\"%s\"\n", spi->name);
#ifdef CONFIG_HISFC350_SHOW_CYCLE_TIMING
PR_MSG("Spi(cs%d): ", spi->chipselect);
if (spi->addrcycle == 4)
PR_MSG("4 addrcycle ");
PR_MSG("read:%s,%02X,%s ",
hisfc350_get_ifcycle_str(spi->read->iftype),
spi->read->cmd,
hisfc350_get_clock_str(spi->read->clock));
PR_MSG("write:%s,%02X,%s ",
hisfc350_get_ifcycle_str(spi->write->iftype),
spi->write->cmd,
hisfc350_get_clock_str(spi->write->clock));
PR_MSG("erase:%s,%02X,%s\n",
hisfc350_get_ifcycle_str(spi->erase->iftype),
spi->erase->cmd,
hisfc350_get_clock_str(spi->erase->clock));
#endif /* CONFIG_HISFC350_SHOW_CYCLE_TIMING */
}
static int __init spi_ids_init(void)
{
PR_MSG("Spi id table Version %s\n", SPI_DRV_VERSION);
return 0;
}
static int hisfc350_spi_probe(struct hisfc_host *host)
{
unsigned int total = 0;
unsigned char ids[8];
struct spi_info *spiinfo;
struct hisfc_spi *spi = host->spi;
int chipselect = (CONFIG_HISFC350_CHIP_NUM - 1);
host->num_chip = 0;
for (; chipselect >= 0; chipselect--) {
hisfc350_read_ids(host, chipselect, ids);
/* can't find spi flash device. */
if (!(ids[0] | ids[1] | ids[2])
|| ((ids[0] & ids[1] & ids[2]) == 0xFF))
continue;
PR_MSG("Spi(cs%d) ID: 0x%02X 0x%02X 0x%02X"
" 0x%02X 0x%02X 0x%02X\n",
chipselect,
ids[0], ids[1], ids[2], ids[3], ids[4], ids[5]);
spiinfo = spi_serach_ids(hisfc350_spi_info_table, ids);
if (!spiinfo) {
PR_MSG("Spi(cs%d): find unrecognized spi flash.\n",
chipselect);
continue;
}
spi->name = spiinfo->name;
spi->chipselect = chipselect;
spi->chipsize = spiinfo->chipsize;
spi->erasesize = spiinfo->erasesize;
spi->addrcycle = spiinfo->addrcycle;
spi->driver = spiinfo->driver;
spi->host = host;
spi_search_rw(spiinfo, spi->read,
HISFC350_SUPPORT_READ,
HISFC350_SUPPORT_MAX_DUMMY, READ);
spi_search_rw(spiinfo, spi->write,
HISFC350_SUPPORT_WRITE,
HISFC350_SUPPORT_MAX_DUMMY, WRITE);
spi_get_erase(spiinfo, spi->erase);
hisfc350_map_iftype_and_clock(spi);
hisfc350_controller_spi_init(spi, total);
spi->iobase = (char *)host->iobase + total;
if (spi->addrcycle == 4)
spi->driver->entry_4addr(spi, TRUE);
hisfc350_show_spi(spi);
host->num_chip++;
total += spi->chipsize;
spi++;
}
return host->num_chip;
}
static int hinfc504_os_probe(struct platform_device * pltdev)
{
int size;
int result = 0;
struct hinfc_host *host;
struct nand_chip *chip;
struct mtd_info *mtd;
struct resource *res;
size = sizeof(struct hinfc_host) + sizeof(struct nand_chip)
+ sizeof(struct mtd_info);
host = kmalloc(size, GFP_KERNEL);
if (!host) {
PR_BUG("failed to allocate device structure.\n");
return -ENOMEM;
}
memset((char *)host, 0, size);
platform_set_drvdata(pltdev, host);
host->dev = &pltdev->dev;
host->chip = chip = (struct nand_chip *)&host[1];
host->mtd = mtd = (struct mtd_info *)&chip[1];
res = platform_get_resource_byname(pltdev, IORESOURCE_MEM, "base");
if (!res) {
PR_BUG("Can't get resource.\n");
return -EIO;
}
host->iobase = ioremap(res->start, res->end - res->start + 1);
if (!host->iobase) {
PR_BUG("ioremap failed\n");
kfree(host);
return -EIO;
}
mtd->priv = chip;
mtd->owner = THIS_MODULE;
mtd->name = (char*)(pltdev->name);
res = platform_get_resource_byname(pltdev, IORESOURCE_MEM, "buffer");
if (!res) {
PR_BUG("Can't get resource.\n");
return -EIO;
}
chip->IO_ADDR_R = chip->IO_ADDR_W = ioremap_nocache(res->start,
res->end - res->start + 1);
if (!chip->IO_ADDR_R) {
PR_BUG("ioremap failed\n");
return -EIO;
}
host->buffer = dma_alloc_coherent(host->dev,
(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE),
&host->dma_buffer, GFP_KERNEL);
if (!host->buffer) {
PR_BUG("Can't malloc memory for NAND driver.");
return -EIO;
}
chip->priv = host;
host->chip = chip;
chip->cmd_ctrl = hinfc504_cmd_ctrl;
chip->dev_ready = hinfc504_dev_ready;
chip->select_chip = hinfc504_select_chip;
chip->read_byte = hinfc504_read_byte;
chip->read_word = hinfc504_read_word;
chip->write_buf = hinfc504_write_buf;
chip->read_buf = hinfc504_read_buf;
chip->chip_delay = HINFC504_CHIP_DELAY;
chip->options = NAND_NO_AUTOINCR | NAND_SKIP_BBTSCAN;
chip->ecc.layout = NULL;
chip->ecc.mode = NAND_ECC_NONE;
host->clk = clk_get_sys("hinfc504", NULL);
if (IS_ERR(host->clk)) {
PR_BUG("hinfc504 clock not found.\n");
return -EIO;
}
host->enable = hinfc504_os_enable;
if (hinfc504_nand_init(host, chip)) {
PR_BUG("failed to allocate device buffer.\n");
return -EIO;
}
if (nand_otp_len) {
PR_MSG("Copy Nand read retry parameter from boot,"
" parameter length %d.\n", nand_otp_len);
memcpy(host->rr_data, nand_otp, nand_otp_len);
}
if (nand_scan(mtd, CONFIG_HINFC504_MAX_CHIP)) {
result = -ENXIO;
goto fail;
}
register_mtd_partdev(host->mtd);
if (!mtd_device_parse_register(mtd, part_probes_type,
NULL, ptn_info.parts, ptn_info.parts_num))
return 0;
unregister_mtd_partdev(host->mtd);
result = -ENODEV;
nand_release(mtd);
fail:
if (host->buffer) {
dma_free_coherent(host->dev,
(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE),
host->buffer,
host->dma_buffer);
host->buffer = NULL;
}
iounmap(chip->IO_ADDR_W);
iounmap(host->iobase);
kfree(host);
platform_set_drvdata(pltdev, NULL);
return result;
}