/** Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value. Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. If Address > 0x0FFFFFFF, then ASSERT(). @param Address Address that encodes the PCI Bus, Device, Function and Register. @param AndData The value to AND with the PCI configuration register. @return The value written back to the PCI configuration register. **/ UINT16 EFIAPI PciAnd16 ( IN UINTN Address, IN UINT16 AndData ) { return PciCf8And16 (Address, AndData); }
/** Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value. Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). @param Address The address that encodes the PCI Bus, Device, Function and Register. @param AndData The value to AND with the PCI configuration register. @return The value written back to the PCI configuration register. **/ UINT16 EFIAPI PciAnd16 ( IN UINTN Address, IN UINT16 AndData ) { return mRunningOnQ35 ? PciExpressAnd16 (Address, AndData) : PciCf8And16 (Address, AndData); }