void printQueueState(){
int Queue;
printf("\nQueue State:\n");
/* Special Queues */
if(Qmss_getQueueEntryCount(QUEUE_TX_FFTC_A) > 0){
printf("%4d: %d\n", QUEUE_TX_FFTC_A, Qmss_getQueueEntryCount(QUEUE_TX_FFTC_A));
}
if(Qmss_getQueueEntryCount(QUEUE_TX_FFTC_B) > 0){
printf("%4d: %d\n", QUEUE_TX_FFTC_B, Qmss_getQueueEntryCount(QUEUE_TX_FFTC_B));
}
/* General Purpose Queues */
for(Queue = 0; Queue < QUEUE_LAST; Queue++){
if(Qmss_getQueueEntryCount(Queue) > 0){
printf("%4d: %d\n", Queue, Qmss_getQueueEntryCount(Queue));
}
}
printf("\n");
}
/** ============================================================================
* @n@b Setup_Tx
*
* @b Description
* @n This API sets up all relevant data structures and configuration required
* for sending data to PASS/Ethernet. It sets up a Tx free descriptor queue,
* PASS Tx queues required for send.
*
* @param[in]
* @n None
*
* @return Int32
* -1 - Error
* 0 - Success
* =============================================================================
*/
Int32 Setup_Tx (Void)
{
UInt8 isAllocated;
Qmss_Queue qInfo;
Ptr pCppiDesc;
UInt32 i;
/* Open all Transmit (Tx) queues.
*
* These queues are used to send data to PA PDSP/CPSW.
*/
for (i = 0; i < NUM_PA_TX_QUEUES; i ++)
{
if ((gPaTxQHnd[i] = Qmss_queueOpen (Qmss_QueueType_PASS_QUEUE, QMSS_PARAM_NOT_SPECIFIED, &isAllocated)) < 0)
{
uart_write ("Error opening PA Tx queue \n");
return -1;
}
else
{
//platform_write("opened TX queue for PA %d\n",gPaTxQHnd[i]);
}
}
/* Open a Tx Free Descriptor Queue (Tx FDQ).
*
* This queue will be used to hold Tx free decriptors that can be filled
* later with data buffers for transmission onto wire.
*/
if ((gTxFreeQHnd = Qmss_queueOpen (Qmss_QueueType_STARVATION_COUNTER_QUEUE, QMSS_PARAM_NOT_SPECIFIED, &isAllocated)) < 0)
{
uart_write ("Error opening Tx Free descriptor queue \n");
return -1;
}
else
{
//platform_write("opened TX Free queue for PA %d\n",gTxFreeQHnd);
}
qInfo = Qmss_getQueueNumber (gTxFreeQHnd);
/* Attach some free descriptors to the Tx free queue we just opened. */
for (i = 0; i < NUM_TX_DESC; i++)
{
/* Get a free descriptor from the global free queue we setup
* during initialization.
*/
if ((pCppiDesc = Qmss_queuePop (gGlobalFreeQHnd)) == NULL)
{
break;
}
/* The descriptor address returned from the hardware has the
* descriptor size appended to the address in the last 4 bits.
*
* To get the true descriptor size, always mask off the last
* 4 bits of the address.
*/
pCppiDesc = (Ptr) ((UInt32) pCppiDesc & 0xFFFFFFF0);
/* Setup the Completion queue:
*
* Setup the return policy for this desc to return to the free q we just
* setup instead of the global free queue.
*/
Cppi_setReturnQueue ((Cppi_DescType) Cppi_DescType_HOST, pCppiDesc, qInfo);
/* Push descriptor to Tx free queue */
Qmss_queuePushDescSize (gTxFreeQHnd, pCppiDesc, SIZE_CPSW_HOST_DESC);
}
if (i != NUM_TX_DESC)
{
uart_write ("Error allocating Tx free descriptors. only %d queues allotted \n",Qmss_getQueueEntryCount(gTxFreeQHnd));
return -1;
}
//count=Qmss_getQueueEntryCount(gTxFreeQHnd);
//platform_write("Total %d found entries in queue %d\n",count,gTxFreeQHnd);
/* All done with Rx configuration. Return success. */
return 0;
}
/** ============================================================================
* @n@b Init_Qmss
*
* @b Description
* @n This API initializes the QMSS LLD.
*
* @param[in]
* @n None
*
* @return Int32
* -1 - Error
* 0 - Success
* =============================================================================
*/
Int32 Init_Qmss (Void)
{
Int32 result;
Qmss_MemRegInfo memCfg;
Qmss_MemRegInfo sriomemCfg;
Qmss_InitCfg qmssInitConfig;
Cppi_DescCfg cppiDescCfg;
UInt32 numAllocated;
/* Initialize QMSS */
memset (&qmssInitConfig, 0, sizeof (Qmss_InitCfg));
/* Set up QMSS configuration */
/* Use internal linking RAM */
qmssInitConfig.linkingRAM0Base = 0;
qmssInitConfig.linkingRAM0Size = 0;
qmssInitConfig.linkingRAM1Base = 0x0;
qmssInitConfig.maxDescNum = NUM_SRIO_HOST_DESC+NUM_CPSW_HOST_DESC;
qmssInitConfig.pdspFirmware[0].pdspId = Qmss_PdspId_PDSP1;
#ifdef _LITTLE_ENDIAN
qmssInitConfig.pdspFirmware[0].firmware = (void *) &acc48_le;
qmssInitConfig.pdspFirmware[0].size = sizeof (acc48_le);
#else
qmssInitConfig.pdspFirmware[0].firmware = (void *) &acc48_be;
qmssInitConfig.pdspFirmware[0].size = sizeof (acc48_be);
#endif
/* Initialize the Queue Manager */
result = Qmss_init (&qmssInitConfig, qmssGblCfgParams);
if (result != QMSS_SOK)
{
uart_write ("Error initializing Queue Manager SubSystem, Error code : %d\n", result);
return -1;
}
/* Start Queue manager on this core */
Qmss_start ();
/* Setup the descriptor memory regions.
*
* The Descriptor base addresses MUST be global addresses and
* all memory regions MUST be setup in ascending order of the
* descriptor base addresses.
*/
/* Initialize and setup CPSW Host Descriptors required for example */
memset (gHostDesc, 0, SIZE_CPSW_HOST_DESC * NUM_CPSW_HOST_DESC);
memCfg.descBase = (UInt32 *) Convert_CoreLocal2GlobalAddr ((UInt32) gHostDesc);
memCfg.descSize = SIZE_CPSW_HOST_DESC;
memCfg.descNum = NUM_CPSW_HOST_DESC;
memCfg.manageDescFlag = Qmss_ManageDesc_MANAGE_DESCRIPTOR;
memCfg.memRegion = Qmss_MemRegion_MEMORY_REGION0;
memCfg.startIndex = 0;
/* Insert Host Descriptor memory region */
result = Qmss_insertMemoryRegion(&memCfg);
if (result == QMSS_MEMREGION_ALREADY_INITIALIZED)
{
uart_write ("Memory Region %d already Initialized \n", memCfg.memRegion);
}
else if (result < QMSS_SOK)
{
uart_write ("Error: Inserting CPSW memory region %d, Error code : %d\n", memCfg.memRegion, result);
return -1;
}
else
uart_write ("Debug: Memory Region %d inserted :0x%x size of desc %d num of the desc %d\n",memCfg.memRegion,gHostDesc,SIZE_CPSW_HOST_DESC,NUM_CPSW_HOST_DESC);
/* Initialize and setup SRIO Host Descriptors required for example */
memset (host_region, 0, SIZE_SRIO_HOST_DESC * NUM_SRIO_HOST_DESC);
sriomemCfg.descBase = (UInt32 *) Convert_CoreLocal2GlobalAddr ((UInt32) host_region);
sriomemCfg.descSize = SIZE_SRIO_HOST_DESC;
sriomemCfg.descNum = NUM_SRIO_HOST_DESC;
sriomemCfg.manageDescFlag = Qmss_ManageDesc_MANAGE_DESCRIPTOR;
sriomemCfg.memRegion = Qmss_MemRegion_MEMORY_REGION1;
sriomemCfg.startIndex = NUM_CPSW_HOST_DESC;
/* Insert Host Descriptor memory region */
result = Qmss_insertMemoryRegion(&sriomemCfg);
if (result == QMSS_MEMREGION_ALREADY_INITIALIZED)
{
uart_write ("Memory Region %d already Initialized \n", sriomemCfg.memRegion);
}
else if (result < QMSS_SOK)
{
uart_write ("Error: Inserting SRIO memory region %d, Error code : %d\n", sriomemCfg.memRegion, result);
return -1;
}
else
uart_write ("Debug:Memory Region %d inserted :0x%x size of desc %d num of the desc %d\n",sriomemCfg.memRegion,host_region,SIZE_SRIO_HOST_DESC,NUM_SRIO_HOST_DESC);
/* Initialize all the descriptors we just allocated on the
* memory region above. Setup the descriptors with some well
* known values before we use them for data transfers.
*/
memset (&cppiDescCfg, 0, sizeof (cppiDescCfg));
cppiDescCfg.memRegion = Qmss_MemRegion_MEMORY_REGION0;
cppiDescCfg.descNum = NUM_CPSW_HOST_DESC;
cppiDescCfg.destQueueNum = QMSS_PARAM_NOT_SPECIFIED;
cppiDescCfg.queueType = Qmss_QueueType_GENERAL_PURPOSE_QUEUE;
cppiDescCfg.initDesc = Cppi_InitDesc_INIT_DESCRIPTOR;
cppiDescCfg.descType = Cppi_DescType_HOST;
/* By default:
* (1) Return descriptors to tail of queue
* (2) Always return entire packet to this free queue
* (3) Set that PS Data is always present in start of SOP buffer
* (4) Configure free q num < 4K, hence qMgr = 0
* (5) Recycle back to the same Free queue by default.
*/
cppiDescCfg.returnPushPolicy = Qmss_Location_TAIL;
cppiDescCfg.cfg.host.returnPolicy = Cppi_ReturnPolicy_RETURN_ENTIRE_PACKET;
cppiDescCfg.cfg.host.psLocation = Cppi_PSLoc_PS_IN_DESC;
cppiDescCfg.returnQueue.qMgr = 0;
cppiDescCfg.returnQueue.qNum = QMSS_PARAM_NOT_SPECIFIED;
cppiDescCfg.epibPresent = Cppi_EPIB_EPIB_PRESENT;
/* Initialize the descriptors, create a free queue and push descriptors to a global free queue */
if ((gGlobalFreeQHnd = Cppi_initDescriptor (&cppiDescCfg, &numAllocated)) <= 0)
{
uart_write ("Error Initializing Free Descriptors, Error: %d \n", gGlobalFreeQHnd);
return -1;
}
else
uart_write("No of descriptors in CPSW global free queue %d \n",Qmss_getQueueEntryCount(gGlobalFreeQHnd));
/* Queue Manager Initialization Done */
return 0;
}
