Beispiel #1
0
size_t bluetooth_read(size_t len) {
	btm_bt_read_len = len;
	REG_STORE(&(us_dev_regs->US_RPR), (uint32_t) btm_bt_read_buff);
	REG_STORE(&(us_dev_regs->US_RCR), len);

	return 0;
}
static int gic_init(void) {
	uint32_t tmp = REG_LOAD(GICD_CTLR);
	REG_STORE(GICD_CTLR, tmp | 0x1);

	tmp = REG_LOAD(GICC_CTLR);
	REG_STORE(GICC_CTLR, tmp | 0x1);

	/* Set priority filter level */
	REG_STORE(GICC_PMR, 0xFF);

	tmp = REG_LOAD(GICD_TYPER);
	printk("\n"
			"\t\tNumber of SPI: %d\n"
			"\t\tNumber of supported CPU interfaces: %d\n"
			"\t\tSecutity Extension %s implemented\n",
			GICD_TYPER_ITLINES(tmp) * 32,
			1 + GICD_TYPER_CPUNR(tmp),
			GICD_TYPER_SECEXT(tmp) ? "" : "not ");
	if (tmp & (1 << 10)) {
		printk("\t\tNumber of LSPI: %d", GICD_TYPER_LSPI(tmp));
	} else {
		printk("\t\tLSPI not implemented");
	}
	printk("\n\t");

	return 0;
}
Beispiel #3
0
size_t bluetooth_write(uint8_t *buff, size_t len) {
	while (!(REG_LOAD(&(us_dev_regs->US_CSR)) & AT91C_US_ENDTX)) {
	}
	REG_STORE(&(us_dev_regs->US_TPR), (uint32_t) buff);
	REG_STORE(&(us_dev_regs->US_TCR), len);
	return len;
}
Beispiel #4
0
static void init_adc(void) {
	/* Configure the ADC */
	REG_STORE(AT91C_PMC_PCER, (1 << AT91C_ID_ADC));
	REG_STORE(AT91C_ADC_MR, 0);
	REG_ORIN(AT91C_ADC_MR, AT91C_ADC_TRGEN_DIS);
	REG_ORIN(AT91C_ADC_MR, 0x00000500); // 4MHz
	REG_ORIN(AT91C_ADC_MR, 0x001f0000); // 64uS
	REG_ORIN(AT91C_ADC_MR, 0x03000000); // 750nS
	REG_STORE(AT91C_ADC_CHER, AT91C_ADC_CH6 | AT91C_ADC_CH4);
	REG_STORE(AT91C_ADC_CR, AT91C_ADC_START);
}
Beispiel #5
0
static irq_return_t sound_interrupt(unsigned int irq_num, void *dev_id) {
	sampleword_t *next_buff;
	if (current_handler == NULL) { /*inefficient */
		return IRQ_HANDLED;
	}
	next_buff = (*current_handler)();
	REG_STORE(AT91C_SSC_TNPR, (uint32_t) next_buff);
	REG_STORE(AT91C_SSC_TNCR, SAMPLETONENO);

	return IRQ_HANDLED;
}
Beispiel #6
0
void bluetooth_hw_hard_reset(void) {
	pin_config_output(BTM_BT_RST_PIN);
	pin_set_output(BTM_BT_RST_PIN);
	ksleep(1000);

	pin_clear_output(BTM_BT_RST_PIN);
	ksleep(5000);

	pin_config_input(BTM_BT_LINK_PIN);
	REG_STORE(AT91C_PIOA_PPUER, BTM_BT_LINK_PIN);
	REG_STORE(AT91C_PIOA_MDDR, BTM_BT_LINK_PIN);
}
static int this_config(struct time_dev_conf * conf) {
	uint32_t tmp;
	uint8_t  prescaler = 1;

	REG_STORE(PTIMER_LOAD, LOAD_VALUE);

	tmp  = REG_LOAD(PTIMER_CONTROL);
	tmp |= PTIMER_ENABLE | PTIMER_AUTO_RELOAD | PTIMER_IRQ_ENABLE;
	tmp |= prescaler << PTIMER_PRESCALER_SHIFT;

	REG_STORE(PTIMER_CONTROL, tmp);
	return 0;
}
Beispiel #8
0
static int apbuart_setup(struct uart *dev, const struct uart_params *params) {
	int res;

	if (NULL == dev_regs && 0 != (res = dev_regs_init())) {
		return res;
	}

	assert(NULL != dev_regs);

	REG_STORE(&dev_regs->ctrl, UART_DISABLE_ALL);
	REG_STORE(&dev_regs->scaler, UART_SCALER_VAL);
	REG_STORE(&dev_regs->ctrl, UART_CTRL_TE | UART_CTRL_RE | UART_CTRL_RI);

	return 0;
}
Beispiel #9
0
size_t bluetooth_read(size_t len) {
	if (data_pack) {
		pnet_pack_destroy(data_pack);
	}
	data_pack = pnet_pack_create(NULL, len, PNET_PACK_TYPE_SINGLE);

	assert(data_pack);

	data_pack->node = &this_data;

	REG_STORE(&(us_dev_regs->US_RPR), (uint32_t) pnet_pack_get_data(data_pack));
	REG_STORE(&(us_dev_regs->US_RCR), len);

	return 0;
}
Beispiel #10
0
static int at91_pin_init(void) {
	REG_STORE(AT91C_PMC_PCER, 1L << AT91C_ID_PIOA);
	// TODO check return value.
	irq_attach(AT91C_ID_PIOA, irq_pin_handler, 0, NULL, "AT91 PIO pins");
	pin_get_input_changed();
	return 0;
}
Beispiel #11
0
static int apbuart_putc(struct uart *dev, int ch) {
	while (!(UART_STAT_TE & REG_LOAD(&dev_regs->status))) {
	}
	REG_STORE(&dev_regs->data, (uint32_t) ch);

	return 0;
}
Beispiel #12
0
static void init_control_pins(void) {
	/*configure control pins*/
	REG_STORE(AT91C_PIOA_PPUDR, CONFIG_NXT_BT_CMD_PIN);
	pin_config_output(CONFIG_NXT_BT_CS_PIN | CONFIG_NXT_BT_RST_PIN | CONFIG_NXT_BT_CMD_PIN);
	pin_set_output(CONFIG_NXT_BT_CS_PIN | CONFIG_NXT_BT_RST_PIN);
	pin_clear_output(CONFIG_NXT_BT_CMD_PIN);

}
Beispiel #13
0
void irqctrl_disable(unsigned int irq) {
	int n = irq / BITS_PER_REGISTER;
	int m = irq % BITS_PER_REGISTER;

	/* Writing zeroes to this register has no
	 * effect, so we just write single "1" */
	REG_STORE(GICD_ICENABLER(n), 1 << m);
}
Beispiel #14
0
static int stm32_uart_putc(struct uart *dev, int ch) {
	struct uart_stm32 *uart = (struct uart_stm32 *) dev->base_addr;

	while (!(REG_LOAD(&uart->sr) & USART_FLAG_TXE)) { }

	REG_STORE(&uart->dr, ch);

	return 0;
}
Beispiel #15
0
void irqctrl_enable(unsigned int irq) {
	int n = irq / BITS_PER_REGISTER;
	int m = irq % BITS_PER_REGISTER;
	uint32_t tmp;

	/* Writing zeroes to this register has no
	 * effect, so we just write single "1" */
	REG_STORE(GICD_ISENABLER(n), 1 << m);

	/* N-N irq model: all CPUs receive this IRQ */
	REG_STORE(GICD_ICFGR(n), 1 << m);

	/* All CPUs do listen to this IRQ */
	n = irq / 4;
	m = irq % 4;
	tmp  = REG_LOAD(GICD_ITARGETSR(n));
	tmp |= 0xFF << (8 * m);
	REG_STORE(GICD_ITARGETSR(n), tmp);
}
Beispiel #16
0
void software_init_hook(void) {
	REG_STORE(OMAP35X_INTC_SYSCONFIG, INTC_SYSCONFIG_RESET);

	REG_STORE(OMAP35X_INTC_IDLE, 0x0);

	for (int m = 0; m < __IRQCTRL_IRQS_TOTAL; ++m) {
		REG_STORE(OMAP35X_INTC_ILR(m), 0x0);
	}

	REG_STORE(OMAP35X_INTC_MIR_SET(0), ~0);
	REG_STORE(OMAP35X_INTC_MIR_SET(1), ~0);
	REG_STORE(OMAP35X_INTC_MIR_SET(2), ~0);

	REG_STORE(OMAP35X_INTC_ISR_SET(0), 0);
	REG_STORE(OMAP35X_INTC_ISR_SET(1), 0);
	REG_STORE(OMAP35X_INTC_ISR_SET(2), 0);
}
Beispiel #17
0
void sound_start_play(uint32_t freq, useconds_t ms,
	sample_t buff, sample_t next_buff, sound_handler_t sound_hnd) {

	current_handler = sound_hnd;

	if (freq) {
		if (freq < FREQUENCY_MIN) {
			freq = FREQUENCY_MIN;
		}
		if (freq > FREQUENCY_MAX) {
			freq = FREQUENCY_MAX;
		}
	} else {
		freq = 1000;
	}

	REG_STORE(AT91C_SSC_CMR, ((SYS_CLOCK / (2L * 512L)) / freq) + 1L);

	REG_STORE(AT91C_SSC_TNPR, (uint32_t) next_buff);
	REG_STORE(AT91C_SSC_TNCR, SAMPLETONENO);

	REG_STORE(AT91C_SSC_TPR, (uint32_t) buff);
	REG_STORE(AT91C_SSC_TCR, SAMPLETONENO);

	REG_STORE(AT91C_SSC_PTCR, AT91C_PDC_TXTEN);

	if (ms != 0) {
		ksleep(ms);
		sound_stop_play();
	}
}
Beispiel #18
0
static int ti81xx_start(struct usb_hcd *hcd) {
	struct ti81xx_usb *tiusb = hcd2ti(hcd);
	int ret;

	assert(tiusb == (void *) 0x47401000);

	ret = irq_attach(TI8168_USB0_IRQ, ti81xx_irq, 0, hcd, "ti8168 usb0 irq");
	if (0 != ret) {
		return ret;
	}

	REG_ORIN(&tiusb->ctrl, TI81_USB_CTRL_RST);

	while((REG_LOAD(&tiusb->ctrl) & TI81_USB_CTRL_RST));

	REG_STORE(&tiusb->phy_utmi, TI81_USB_PHYUTMI_DEFAULT);

	{
		uint32_t regval = REG_LOAD(&tiusb->mode);
		regval &= ~TI81_USB_MODE_IDDIG;
		regval |= 0x80;
		REG_STORE(&tiusb->mode, regval);
	}

	REG_ORIN(0x48140620, 0x00000003);
	REG_ORIN(0x48140624, 0xf);

	REG_STORE(&tiusb->irq_set0, 0xffffffff);
	REG_STORE(&tiusb->irq_set1, TI81_USB_IRQ_STAT1_ALL_BUT_SOF);
	REG8_STORE(&tiusb->m_devctl, TI81_USB_DEVCTL_SESSION);
	REG8_STORE(&tiusb->m_intrusbe, 0xff);

	ti81xx_endp_fifo_init(tiusb);

	return 0;
}
Beispiel #19
0
/* timer handler
 * we scan PIN_BT4 for changing and if it changed bt state switch to disconnect
 *  mode.
 */
static void  nxt_bt_timer_handler(struct sys_timer *timer, void *param) {
	static int bt_last_state; //TODO init state? //inited with 0, ok
	int bt_state = REG_LOAD(AT91C_ADC_CDR6) > 0x200 ? 1 : 0;

	if (bt_last_state != bt_state) {
		struct pnet_pack *pack = pnet_pack_create(NULL, 1, PNET_PACK_TYPE_SINGLE);
		assert(pack);
		pack->node = &this_ctrl;

		*((uint8_t *) pnet_pack_get_data(pack)) = bt_state;
		if (0 != pnet_entry(pack)) {
			pnet_pack_destroy(pack);
		}
		bt_last_state = bt_state;
	}

	REG_STORE(AT91C_ADC_CR, AT91C_ADC_START);
}
Beispiel #20
0
static int stm32_uart_setup(struct uart *dev, const struct uart_params *params) {
	struct uart_stm32 *uart = (struct uart_stm32 *) dev->base_addr;

	REG_ORIN(RCC_APB1RSTR,RCC_APB1PWR);
	REG_ORIN(RCC_APB2ENR,RCC_APB2GPIOx);
	REG_ORIN(RCC_APB2ENR,RCC_APB2AFIO);

	REG_ORIN(RCC_APB2ENR,RCC_APB2ENR_USART1EN);

	gpio_settings(UART_GPIO, TX_PIN ,
			GPIO_MODE_OUTPUT | GPIO_MODE_OUT_ALTERNATE);
	gpio_settings(UART_GPIO, RX_PIN, GPIO_MODE_INPUT);

	REG_STORE(&uart->brr, SYS_CLOCK / params->baud_rate);
	REG_ORIN(&uart->cr1, USART_FLAG_RE | USART_FLAG_TE);

	REG_ORIN(&uart->cr1, USART_FLAG_UE);

	return 0;
}
Beispiel #21
0
static int omap3_clk_config(struct time_dev_conf *conf) {
	volatile struct gptimerxx_x *gptimer = GPTIMER1_BASE;

	REG_ORIN(CM_FCLKEN_WKUP, 1);
	REG_ORIN(CM_ICLKEN_WKUP, 1);
	REG_ANDIN(CM_CLKSEL_WKUP, ~1);

	REG_STORE(&gptimer->cfg, 0x2);

	REG_STORE(&gptimer->tpir, 232000);
	REG_STORE(&gptimer->tnir, -768000);

	REG_STORE(&gptimer->tcrr, OMAP_LOAD_VALUE);
	REG_STORE(&gptimer->tldr, OMAP_LOAD_VALUE);

	REG_STORE(&gptimer->tclr, GPTIMER_TCLR_START | GPTIMER_TCLR_AUTORELOAD);

	REG_STORE(&gptimer->tier, GPTIMER_TIER_OVERFLOW);
	REG_STORE(&gptimer->twer, GPTIMER_TIER_OVERFLOW);

	return 0;
}
Beispiel #22
0
static int sound_init(void) {
	int res = 0;
	res = irq_attach(AT91C_ID_SSC, sound_interrupt, 0, NULL,
			"Sound Buffer Transfer End");
	// TODO error handling?

	/* Enable MCK clock   */
	REG_STORE(AT91C_PMC_PCER, (1L << AT91C_ID_SSC));
	/* Disable TD on PA17  */ //???
	//REG_STORE(AT91C_PIOA_PER, AT91C_PA17_TD);
	REG_STORE(AT91C_PIOA_PDR, AT91C_PA17_TD);

	REG_STORE(AT91C_SSC_CR, AT91C_SSC_SWRST);
	REG_STORE(AT91C_SSC_TCMR, AT91C_SSC_CKS_DIV +
		AT91C_SSC_CKO_CONTINOUS + AT91C_SSC_START_CONTINOUS);

	REG_STORE(AT91C_SSC_TFMR, (SAMPLEWORDBITS - 1) +
		((SAMPLEWORDS & 0xF) << 8) + AT91C_SSC_MSBF);
	/* TX enable */
	REG_STORE(AT91C_SSC_CR, AT91C_SSC_TXEN);
	REG_STORE(AT91C_SSC_IER, AT91C_SSC_ENDTX);
	sound_stop_play();
	return res;
}
Beispiel #23
0
static void init_usart(void) {
	/* Configure the usart */
	REG_STORE(AT91C_PMC_PCER, (1 << CONFIG_NXT_BT_US_DEV_ID));

	REG_STORE(AT91C_PIOA_PDR, RX_PIN | TX_PIN |
			SCK_PIN | RTS_PIN | CTS_PIN);
	REG_STORE(AT91C_PIOA_ASR, RX_PIN | TX_PIN |
			SCK_PIN | RTS_PIN | CTS_PIN);

	REG_STORE(&(us_dev_regs->US_PTCR), (AT91C_PDC_RXTDIS | AT91C_PDC_TXTDIS));
	REG_STORE(&(us_dev_regs->US_CR),  AT91C_US_RSTSTA | AT91C_US_RSTRX | AT91C_US_RSTTX);
	REG_STORE(&(us_dev_regs->US_CR), AT91C_US_STTTO);
	REG_STORE(&(us_dev_regs->US_RTOR), 10000);
	REG_STORE(&(us_dev_regs->US_MR), (AT91C_US_USMODE_HWHSH & ~AT91C_US_SYNC)
			| AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE
			| AT91C_US_NBSTOP_1_BIT | AT91C_US_OVER);
	REG_STORE(&(us_dev_regs->US_IDR), ~0);
	REG_STORE(&(us_dev_regs->US_IER), AT91C_US_ENDRX);
	REG_STORE(&(us_dev_regs->US_BRGR), CONFIG_SYS_CLOCK / (8 * NXT_BT_BAUD_RATE));
	REG_STORE(&(us_dev_regs->US_RCR), 0);
	REG_STORE(&(us_dev_regs->US_TCR), 0);
	REG_STORE(&(us_dev_regs->US_RNPR), 0);
	REG_STORE(&(us_dev_regs->US_TNPR), 0);
	REG_LOAD(&(us_dev_regs->US_RHR));
	REG_LOAD(&(us_dev_regs->US_CSR));

	REG_STORE(&(us_dev_regs->US_CR), AT91C_US_RXEN | AT91C_US_TXEN);
	REG_STORE(&(us_dev_regs->US_PTCR), AT91C_PDC_RXTEN | AT91C_PDC_TXTEN);
}
static irq_return_t clock_handler(unsigned int irq_nr, void *data) {
	clock_tick_handler(irq_nr, data);
	REG_STORE(PTIMER_IS, 0x1);
	return IRQ_HANDLED;
}
Beispiel #25
0
size_t bluetooth_write(uint8_t *buff, size_t len) {
	REG_STORE(&(us_dev_regs->US_TPR), (uint32_t) buff);
	REG_STORE(&(us_dev_regs->US_TCR), len);
	return len;
}
Beispiel #26
0
void pin_set_input_interrupt(pin_mask_t mask) {
	REG_STORE(AT91C_PIOA_IER, mask);
}
Beispiel #27
0
void sound_stop_play(void) {
	REG_STORE(AT91C_SSC_PTCR, AT91C_PDC_TXTDIS);
}
Beispiel #28
0
void pin_clear_output(pin_mask_t mask) {
	REG_STORE(AT91C_PIOA_CODR, mask);
}
Beispiel #29
0
/* Sends an EOI (end of interrupt) signal to the PICs. */
void irqctrl_eoi(unsigned int irq) {
	REG_STORE(GICC_EOIR, irq);
}
static void mspdebug_diag_putc(const struct diag *diag, char ch) {
	REG_STORE(MSPDEBUG_CONSOLE_BASE, ch);
}