void spirit1_clockout_off() {
/// This is the reverse of spirit1_clockout_on(), described above.
#if (BOARD_FEATURE_RFXTALOUT)
spirit1.clkreq = False;
spirit1_write(RFREG(GPIO3_CONF), RFGPO(GND));
spirit1_write(RFREG(MCU_CK_CONF), 0);
spirit1drv_smart_standby();
#endif
}
void spirit1_load_defaults() {
/// The data ordering is: WRITE LENGTH, WRITE HEADER (0), START ADDR, VALUES
/// Ignore registers that are set later, are unused, or use the hardware default values.
static const ot_u8 spirit1_defaults[] = {
15, 0, 0x01, DRF_ANA_FUNC_CONF0,
RFGPO(READY), RFGPO(GND), RFGPO(GND), RFGPO(GND),
DRF_MCU_CK_CONF,
DRF_IF_OFFSET_ANA, DRF_SYNT3, DRF_SYNT2, DRF_SYNT1,
DRF_SYNT0, DRF_CHSPACE, DRF_IF_OFFSET_DIG,
3, 0, 0xB4, DRF_XO_RCO_TEST,
4, 0, 0x9E, DRF_SYNTH_CONFIG1, DRF_SYNTH_CONFIG0,
3, 0, 0x18, DRF_PAPOWER0,
6, 0, 0x1C, DRF_FDEV0, DRF_CHFLT_LS, DRF_AFC2, DRF_AFC1,
7, 0, 0x23, DRF_CLOCKREC, DRF_AGCCTRL2, DRF_AGCCTRL1, DRF_AGCCTRL0, DRF_ANT_SELECT_CONF,
3, 0, 0x3A, DRF_QI,
3, 0, 0x41, DRF_FIFO_CONFIG0,
4, 0, 0x4F, DRF_PCKT_FLT_OPTIONS, DRF_PROTOCOL2,
//3, 0, 0x93, RFINT_TX_FIFO_ERROR,
6, 0, 0xA3, DRF_DEM_ORDER, DRF_PM_CONFIG2, DRF_PM_CONFIG1, DRF_PM_CONFIG0,
0 //Terminating 0
};
ot_u8* cursor;
cursor = (ot_u8*)spirit1_defaults;
while (*cursor != 0) {
ot_u8 cmd_len = *cursor++;
ot_u8* cmd = cursor;
cursor += cmd_len;
spirit1_spibus_io(cmd_len, 0, cmd);
}
// Early debugging test to make sure data was written (look at first write block)
//{
// volatile ot_u8 test;
// ot_u8 i;
// for (i=0x01; i<=0x0D; ++i) {
// test = spirit1_read(i);
// }
//}
}
OT_WEAK void spirit1_int_on() {
ot_u32 ie_sel;
switch (spirit1.imode) {
case MODE_Listen: ie_sel = RFI_LISTEN;
case MODE_RXData: ie_sel = RFI_RXDATA;
case MODE_CSMA: ie_sel = RFI_CSMA;
case MODE_TXData: ie_sel = RFI_TXFIFO;
default: ie_sel = 0;
}
spirit1_int_config(ie_sel);
}
static const ot_u8 gpio_rx[5] = {
0, RFREG(GPIO2_CONF),
RFGPO(RX_FIFO_ALMOST_FULL), //indicate buffer threshold condition (kept for RX)
RFGPO(SYNC_WORD), //indicate when sync word is qualified
RFGPO(TRX_INDICATOR) //indicate when RX is active (falling edge)
};
static const ot_u8 gpio_tx[5] = {
0, RFREG(GPIO2_CONF),
RFGPO(TX_FIFO_ALMOST_EMPTY), //indicate buffer threshold condition
RFGPO(RSSI_ABOVE_THR), //indicate if RSSI goes above/below CCA threshold
RFGPO(TRX_INDICATOR) //indicate when TX or RX is active
};
inline void spirit1_iocfg_rx() {
spirit1_int_clearall();
spirit1_spibus_io(5, 0, (ot_u8*)gpio_rx);
}
